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Change subject: util/mb/google: Change comments in memory Makefile.inc templates
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Change subject: soc/intel/../thermal: Use `thermal_rmw32` API for setting LTT
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59310/comment/cff1a82d_09110edc
PS1, Line 12: Also, modified `pch_get_ltt_value()` return type from uint16_t to
: uint32_t
> Changing this type should be a separate change. It should be easier to do before this change.
Sure Angel, i have thought that but later ignored, but make sense. Will update the CL.
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Change subject: soc/intel/../thermal: Use `thermal_rmw32` API for setting LTT
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59310/comment/e48594f0_8c3f2e4b
PS1, Line 12: Also, modified `pch_get_ltt_value()` return type from uint16_t to
: uint32_t
Changing this type should be a separate change. It should be easier to do before this change.
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Change subject: soc/intel/common: Include Alder Lake device IDs
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Change subject: soc/intel/../thermal: Drop `ltt_value` local variable
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Change subject: util/chromeos: Update extract_blobs script
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Change subject: mb/{adlrvp, brya, sm}: Set `pch_thermal_trip` for Dynamic Thermal Shutdown
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Change subject: soc/intel/../thermal: Use `thermal_rmw32` API for setting LTT
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Change subject: soc/intel/../thermal: Drop `ltt_value` local variable
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Change subject: util/chromeos: Update extract_blobs script
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Patch Set 3:
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File util/chromeos/extract_blobs.sh:
https://review.coreboot.org/c/coreboot/+/59266/comment/b3c4e357_488f8364
PS1, Line 102:
> AFAIK, every board in the tree that requires a spd.bin has it generated as part of the build.
SPDs are data, they can and should be part of the coreboot repo. Mainboards should already provide them.
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