coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: qualcomm/sc7280: gpio: Support eGPIO scheme
by Shelley Chen (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Ravi kumar, mturney mturney, Julius Werner. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58580 ) Change subject: qualcomm/sc7280: gpio: Support eGPIO scheme ...................................................................... Patch Set 6: (1 comment) File src/soc/qualcomm/common/include/soc/gpio_common.h: https://review.coreboot.org/c/coreboot/+/58580/comment/dcc62677_e4891ad6 PS6, Line 24: BIT(11) Let's do 0x800 since everything else is in hex. -- To view, visit https://review.coreboot.org/c/coreboot/+/58580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2598a41ba3bb8a8a2acff8253b5bb78633f89f9 Gerrit-Change-Number: 58580 Gerrit-PatchSet: 6 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 15 Nov 2021 20:58:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add variant_tpm_gpio_table
by Rob Barnes (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59083 ) Change subject: mb/google/guybrush: Add variant_tpm_gpio_table ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/common/psp_verstage/psp_verstage.c: https://review.coreboot.org/c/coreboot/+/59083/comment/424fd070_425305d0 PS4, Line 242: verstage_soc_init > Indeed. verstage_soc_init does espi setup, which is needed for the later steps. […] verstage_soc_init split up in CL:59318 -- To view, visit https://review.coreboot.org/c/coreboot/+/59083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f Gerrit-Change-Number: 59083 Gerrit-PatchSet: 7 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 15 Nov 2021 20:56:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add variant_tpm_gpio_table
by Rob Barnes (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Julius Werner, Yu-Ping Wu, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59083 to look at the new patch set (#7). Change subject: mb/google/guybrush: Add variant_tpm_gpio_table ...................................................................... mb/google/guybrush: Add variant_tpm_gpio_table Add separate gpio table for TPM i2c and interrupt. Remove TPM gpios from early_gpio_table. This allows for initializing TPM gpios separately from other gpios. BUG=b:200578885 BRANCH=None TEST=Build and boot guybrush Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/bootblock.c M src/mainboard/google/guybrush/variants/baseboard/gpio.c M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/guybrush/variants/guybrush/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c M src/mainboard/google/guybrush/verstage.c M src/soc/amd/common/psp_verstage/include/psp_verstage.h M src/soc/amd/common/psp_verstage/psp_verstage.c 8 files changed, 92 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/59083/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f Gerrit-Change-Number: 59083 Gerrit-PatchSet: 7 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/psp_verstage: Split up verstage_soc_init
by Rob Barnes (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59318 ) Change subject: soc/amd/psp_verstage: Split up verstage_soc_init ...................................................................... soc/amd/psp_verstage: Split up verstage_soc_init Make psp verstage initialization more granular be splitting verstage_soc_init into separate functions. Specifically, create soc init functions for espi, i2c spi, and aoac. BUG=b:200578885 BRANCH=None TEST=Build and boot guybrush Change-Id: I489889a0dfd4016aa4f2b53a2c6a7a1ea4459e60 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/soc/amd/common/psp_verstage/fch.c M src/soc/amd/common/psp_verstage/include/psp_verstage.h M src/soc/amd/common/psp_verstage/psp_verstage.c 3 files changed, 36 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59318/1 diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c index f578bcb..fca4c9a 100644 --- a/src/soc/amd/common/psp_verstage/fch.c +++ b/src/soc/amd/common/psp_verstage/fch.c @@ -152,15 +152,29 @@ return map_fch_devices(); } -void verstage_soc_init(void) +void verstage_soc_espi_init(void) { - if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) - espi_setup(); + if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) + return; + printk(BIOS_DEBUG, "Setting up espi\n"); + espi_setup(); +} - enable_aoac_devices(); +void verstage_soc_i2c_init(void) +{ printk(BIOS_DEBUG, "Setting up i2c\n"); i2c_soc_early_init(); - printk(BIOS_DEBUG, "i2c setup\n"); +} + +void verstage_soc_aoac_init(void) +{ + printk(BIOS_DEBUG, "Setting up aoac\n"); + enable_aoac_devices(); +} + +void verstage_soc_spi_init(void) +{ + printk(BIOS_DEBUG, "Setting up spi\n"); fch_spi_config_modes(); show_spi_speeds_and_modes(); } diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h index 976bc69..dbdf2f2 100644 --- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h +++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h @@ -49,7 +49,10 @@ uint32_t unmap_fch_devices(void); uint32_t verstage_soc_early_init(void); void verstage_mainboard_espi_init(void); -void verstage_soc_init(void); +void verstage_soc_aoac_init(void); +void verstage_soc_espi_init(void); +void verstage_soc_i2c_init(void); +void verstage_soc_spi_init(void); uintptr_t *map_spi_rom(void); uint32_t get_max_workbuf_size(uint32_t *size); diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index f3b4256..8fc2732 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -243,7 +243,19 @@ svc_write_postcode(POSTCODE_LATE_INIT); fch_io_enable_legacy_io(); - verstage_soc_init(); + + printk(BIOS_DEBUG, "calling verstage_soc_espi_init\n"); + verstage_soc_espi_init(); + + printk(BIOS_DEBUG, "calling verstage_soc_aoac_init\n"); + verstage_soc_aoac_init(); + + printk(BIOS_DEBUG, "calling verstage_soc_i2c_init\n"); + verstage_soc_i2c_init(); + + printk(BIOS_DEBUG, "calling verstage_soc_spi_init\n"); + verstage_soc_spi_init(); + verstage_mainboard_init(); post_code(POSTCODE_VERSTAGE_MAIN); -- To view, visit https://review.coreboot.org/c/coreboot/+/59318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I489889a0dfd4016aa4f2b53a2c6a7a1ea4459e60 Gerrit-Change-Number: 59318 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/psp_verstage: Init TPM on S0i3 resume
by Rob Barnes (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Raul Rangel, Andrey Pronin, Kangheui Won, Karthik Ramasubramanian. Hello build bot (Jenkins), Jason Glenesk, Andrey Pronin, Raul Rangel, Marshall Dawson, Kangheui Won, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58870 to look at the new patch set (#15). Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume ...................................................................... soc/amd/psp_verstage: Init TPM on S0i3 resume Add option to initialize the TPM in PSP verstage during s0i3 resume. This is needed if the TPM is reset in s0i3. FSDL is handling restoring everything else, so only the minimum TPM initialization is done. Move aoac and i2c init before psp_verstrage_s0i3_resume becasue i2c needs to be ready before attempting to restore tpm. BUG=b:200578885,b:197965075 TEST=Multiple cycles of S0i3 suspend resume. ~66ms of additional delay. BRANCH=None Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/psp_verstage/include/psp_verstage.h M src/soc/amd/common/psp_verstage/psp_verstage.c 3 files changed, 62 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/58870/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/58870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48 Gerrit-Change-Number: 58870 Gerrit-PatchSet: 15 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Add variant_tpm_gpio_table
by Rob Barnes (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Julius Werner, Yu-Ping Wu, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59083 to look at the new patch set (#6). Change subject: mb/google/guybrush: Add variant_tpm_gpio_table ...................................................................... mb/google/guybrush: Add variant_tpm_gpio_table Add separate gpio table for TPM i2c and interrupt. Remove TPM gpios from early_gpio_table. This allows for initializing TPM gpios separately from other gpios. BUG=b:200578885 BRANCH=None TEST=Build and boot guybrush Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/bootblock.c M src/mainboard/google/guybrush/variants/baseboard/gpio.c M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/guybrush/variants/guybrush/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c M src/mainboard/google/guybrush/verstage.c M src/soc/amd/common/psp_verstage/include/psp_verstage.h M src/soc/amd/common/psp_verstage/psp_verstage.c 8 files changed, 92 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/59083/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/59083 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51d087087b166ec3bb3762bc1150b34db5b22f2f Gerrit-Change-Number: 59083 Gerrit-PatchSet: 6 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cbfs: Add helper functions to look up size and type of a file
by Jakub Czapiga (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Julius Werner, Werner Zeh. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59312 ) Change subject: cbfs: Add helper functions to look up size and type of a file ...................................................................... Patch Set 1: (3 comments) File src/include/cbfs.h: https://review.coreboot.org/c/coreboot/+/59312/comment/ea65afe8_e0a0a501 PS1, Line 134: static inline bool cbfs_file_exists(const char *name); : static inline bool cbfs_ro_file_exists(const char *name); I wonder, if we actually need these functions. cbfs_load() will return CB_CBFS_NOT_FOUND (or other error code) if file does not exist. Are there real use cases for this function? The only one I can think of is with cbfs_map(), but it also returns NULL if file does not exist. https://review.coreboot.org/c/coreboot/+/59312/comment/50b07fca_316e6012 PS1, Line 308: static inline size_t cbfs_get_size(const char *name) Should not these functions be inaccessible for code running in CAR mode and similar? This might make stack big because of cbfs_mdata, which is pretty big. Do early stages have enough stack memory? Or does GCC/Clang optimize it enough? File src/lib/cbfs.c: https://review.coreboot.org/c/coreboot/+/59312/comment/396b322e_9f9351ab PS1, Line 528: if ((err = _cbfs_boot_lookup(prog_name(pstage), false, &mdata, &rdev))) Would not it be cleaner to set err value in a separate line above? Personally I find assign-and-check pattern a anti-pattern. -- To view, visit https://review.coreboot.org/c/coreboot/+/59312 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8092d8f6e04bdfb4df6c626dc7d42b402fe0a8ba Gerrit-Change-Number: 59312 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 15 Nov 2021 20:07:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: commonlib/mem_pool: Allow configuring the alignment
by Julius Werner (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Raul Rangel. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56580 ) Change subject: commonlib/mem_pool: Allow configuring the alignment ...................................................................... Patch Set 13: (1 comment) File src/commonlib/mem_pool.c: https://review.coreboot.org/c/coreboot/+/56580/comment/964a642e_13b9dd96 PS13, Line 11: return NULL; nit: not sure why this is still here when you assert that alignment can't be 0? -- To view, visit https://review.coreboot.org/c/coreboot/+/56580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d77ffe4411f86c54450305320c9f52ab41a3075 Gerrit-Change-Number: 56580 Gerrit-PatchSet: 13 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Mon, 15 Nov 2021 19:48:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/haswell: Remove the fake lapic
by Raul Rangel (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Arthur Heymans, Tristan Corrick, Angel Pons, Alexander Couzens, Patrick Rudolph. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58604 ) Change subject: cpu/intel/haswell: Remove the fake lapic ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/haswell/acpi.c: https://review.coreboot.org/c/coreboot/+/58604/comment/a930ab6d_0d717505 PS1, Line 175: s0ix_enable > > +1 I think that would be a great addition and help clean up some of the confusion. […] One other dumb question. Why is the chip on the lapic and not on the cpu_cluster? i.e., ``` chip cpu/intel/haswell device cpu_cluster 0 on device lapic 0 on end device lapic 0xacac off end end end ``` We were able to drop our lapic devices: https://review.coreboot.org/c/coreboot/+/58510/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69f9c1fe71a773e1fba0942d8a785b6ad26dd9a0 Gerrit-Change-Number: 58604 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 15 Nov 2021 19:35:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: enable gpio locking
by Nick Vaccaro (Code Review) 15 Nov '21

15 Nov '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthik Ramasubramanian. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58352 ) Change subject: soc/intel/alderlake: enable gpio locking ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/alderlake/gpio.c: https://review.coreboot.org/c/coreboot/+/58352/comment/783473b5_deb2ec40 PS8, Line 252: non_host_controllable_gpios > suggestion: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I457bab39f945ab31a89542c6498a73af70cbf9ee Gerrit-Change-Number: 58352 Gerrit-PatchSet: 13 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 15 Nov 2021 19:23:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2021