coreboot-gerrit November 2021

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Change in coreboot[master]: amdfwtool: copy
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59368 ) Change subject: amdfwtool: copy ...................................................................... Patch Set 1: (1 comment) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133536): https://review.coreboot.org/c/coreboot/+/59368/comment/dad98992_eb375389 PS1, Line 1838: memcpy (pspdir_copy, pspdir, 0x30); /* TODO */ space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/59368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id447b7c93f6d54329cccfa16940eec8a7ebda5bd Gerrit-Change-Number: 59368 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 17 Nov 2021 02:33:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Enable GPIO PM after booting to OS
by Scott Chao (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Mark Hsieh, Patrick Rudolph. Scott Chao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59264 ) Change subject: soc/intel/adl: Enable GPIO PM after booting to OS ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > +Scott, I believe you tried this on a device with old cr50 FW? With this change, `gsctool -a -f -M` cannot read old cr50 FW. -- To view, visit https://review.coreboot.org/c/coreboot/+/59264 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5be925caace7a58052476d0995fb9ee0efc2fd2 Gerrit-Change-Number: 59264 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 02:26:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add support for AMD's BIOS recovery feature
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Bao Zheng, Martin Roth, Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57131 ) Change subject: amdfwtool: Add support for AMD's BIOS recovery feature ...................................................................... Patch Set 37: (1 comment) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133532): https://review.coreboot.org/c/coreboot/+/57131/comment/df8b9665_a6b9c570 PS37, Line 1888: btl_entry = search_entry(pspdir2, AMD_FW_PSP_BOOTLOADER); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/57131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2671b95fe089aafdaf61b55bc9d2e8dcf6a66dbc Gerrit-Change-Number: 57131 Gerrit-PatchSet: 37 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 17 Nov 2021 02:26:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/primus: add fw_config_probe for ALC5682I-VS
by Malik Hsu (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Malik Hsu, Tim Wawrzynczak. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59367 to look at the new patch set (#3). Change subject: mb/google/brya/variants/primus: add fw_config_probe for ALC5682I-VS ...................................................................... mb/google/brya/variants/primus: add fw_config_probe for ALC5682I-VS Added fw_config_probe method to distinguish different audio codecs to facilitate the use of different topology files by the OS. BUG=b:205883511 TEST=emerge-brya coreboot chromeos-bootimage and check audio function Signed-off-by: Malik_Hsu <malik_hsu(a)wistron.corp-partner.google.com> Change-Id: I0d5b95e89154b2cb6b371f24cc1b151c23ff642f --- M src/mainboard/google/brya/variants/primus/fw_config.c M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/primus/variant.c 3 files changed, 13 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/59367/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d5b95e89154b2cb6b371f24cc1b151c23ff642f Gerrit-Change-Number: 59367 Gerrit-PatchSet: 3 Gerrit-Owner: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Attention: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Use relative address for EFS gen2
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Eric Peers, Karthik Ramasubramanian, Karthikeyan Ramasubramanian, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56438 ) Change subject: amdfwtool: Use relative address for EFS gen2 ...................................................................... Patch Set 20: (1 comment) File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/c/coreboot/+/56438/comment/2d1c3d5c_04fc93b3 PS19, Line 346: uint32_t > should this be bool type? Done. It will be address_mode in the next patch. So I assume just leave it unchanged. -- To view, visit https://review.coreboot.org/c/coreboot/+/56438 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7701c7819f03586d4ecab3d744056c8c902b630f Gerrit-Change-Number: 56438 Gerrit-PatchSet: 20 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Nov 2021 02:15:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/primus: add fw_config_probe for ALC5682I-VS
by YH Lin (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Malik Hsu, Tim Wawrzynczak. YH Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59367 ) Change subject: mb/google/brya/variants/primus: add fw_config_probe for ALC5682I-VS ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d5b95e89154b2cb6b371f24cc1b151c23ff642f Gerrit-Change-Number: 59367 Gerrit-PatchSet: 2 Gerrit-Owner: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Attention: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 02:14:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Upgrade "relative address" to four address modes
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Kangheui Won, Paul Menzel, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59308 ) Change subject: amdfwtool: Upgrade "relative address" to four address modes ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > The difference for the Majolica(Cezanne non-recovery A/B) is the address mode in 4 tables, PSP, PL2, […] Now this patch is binary compatible for Majolica (Cezanne non AB). The difference has been moved to last "relative address". -- To view, visit https://review.coreboot.org/c/coreboot/+/59308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29a03f4381cd0507e2b2e3b359111e3375a73de1 Gerrit-Change-Number: 59308 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Nov 2021 02:13:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Upgrade "relative address" to four address modes
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Kangheui Won, Paul Menzel, Zheng Bao, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59308 ) Change subject: amdfwtool: Upgrade "relative address" to four address modes ...................................................................... Patch Set 4: (6 comments) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/0ace3031_cb705916 PS4, Line 355: ((mode) == 2 ? (offset) - ctx.current_table : (offset)) )) space prohibited before that close parenthesis ')' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/50d5a380_1559496c PS4, Line 357: #define RUN_TO_OFFSET(ctx, run) ((ctx).address_mode == 0 ? (run) - RUN_BASE(ctx) : (run)) /* TODO: */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/bd26a201_8ea64df3 PS4, Line 478: bdir->header.additional_info_fields.dir_size = table_size / 0x1000;; Statements terminations use 1 semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/7bef7379_1ff6f1b5 PS4, Line 955: biosdir->entries[count].address_mode = SET_ADDR_MODE(1, biosdir); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/43a62f37_1f5f7370 PS4, Line 961: biosdir->entries[count].address_mode = SET_ADDR_MODE(1, biosdir); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133528): https://review.coreboot.org/c/coreboot/+/59308/comment/24582236_fa1e2600 PS4, Line 974: biosdir->entries[count].address_mode = SET_ADDR_MODE(1, biosdir); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29a03f4381cd0507e2b2e3b359111e3375a73de1 Gerrit-Change-Number: 59308 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Nov 2021 02:10:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Medocino
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59369 to review the following change. Change subject: amdfwtool: Medocino ...................................................................... amdfwtool: Medocino Change-Id: Ib00f8f0c3903956088596605d25e11cd01a36e66 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 26 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/59369/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index c9a43ba..d745cf1 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -222,8 +222,9 @@ } amd_fw_entry amd_psp_fw_table[] = { - { .type = AMD_FW_PSP_PUBKEY, .level = PSP_BOTH | PSP_BOTH_AB }, - { .type = AMD_FW_PSP_BOOTLOADER, .level = PSP_BOTH | PSP_LVL1_AB }, + { .type = AMD_FW_PSP_PUBKEY, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_FW_PSP_BOOTLOADER, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_FW_PSP_SMU_FIRMWARE, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_RECOVERY, .level = PSP_LVL1 }, { .type = AMD_FW_PSP_RTM_PUBKEY, .level = PSP_BOTH }, @@ -241,7 +242,7 @@ { .type = AMD_PSP_FUSE_CHAIN, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_HW_IPCFG, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_BOTH_AB }, + { .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_TOKEN_UNLOCK, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_SEC_GASKET, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_SEC_GASKET, .subprog = 2, .level = PSP_BOTH }, @@ -260,6 +261,10 @@ { .type = AMD_FW_KEYDB_TOS, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_SPL_TABLE, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_ABL0, .level = PSP_BOTH | PSP_LVL2_AB }, @@ -1785,10 +1790,12 @@ romsig_offset = ctx.current = AMD_ROMSIG_OFFSET; amd_romsig = BUFF_OFFSET(ctx, romsig_offset); + memset(amd_romsig, 0, sizeof(embedded_firmware)); amd_romsig->signature = EMBEDDED_FW_SIGNATURE; amd_romsig->imc_entry = 0; amd_romsig->gec_entry = 0; amd_romsig->xhci_entry = 0; + amd_romsig->bios3_entry = 0; if (soc_id != PLATFORM_UNKNOWN) { if (soc_id != PLATFORM_STONEYRIDGE) { diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 9c4a5d2..292bd5b 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -51,8 +51,12 @@ AMD_FW_PSP_VERSTAGE = 0x52, AMD_FW_VERSTAGE_SIG = 0x53, AMD_RPMC_NVRAM = 0x54, + AMD_FW_SPL_TABLE = 0x55, AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ISR = 0x59, + AMD_FW_MSMU = 0x5A, + AMD_FW_DMCUB =0x71, + AMD_FW_SPIROM_CFG = 0x5C, AMD_FW_PSP_BOOTLOADER_AB = 0x73, AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_GEC, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index c97af5b..2b8c9dc 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -303,6 +303,18 @@ } else if (strcmp(fw_name, "DMCUINTVECTORSDCN21_FILE") == 0) { fw_type = AMD_FW_DMCU_ISR; subprog = 0; + } else if (strcmp(fw_name, "MSMU_FILE") == 0) { + fw_type = AMD_FW_MSMU; + subprog = 0; + } else if (strcmp(fw_name, "SPL_TABLE") == 0) { + fw_type = AMD_FW_SPL_TABLE; + subprog = 0; + } else if (strcmp(fw_name, "DMCUB_FILE") == 0) { + fw_type = AMD_FW_DMCUB; + subprog = 0; + } else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) { + fw_type = AMD_FW_SPIROM_CFG; + subprog = 0; } else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) { fw_type = AMD_FW_KVM_IMAGE; subprog = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/59369 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib00f8f0c3903956088596605d25e11cd01a36e66 Gerrit-Change-Number: 59369 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: copy
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59368 to review the following change. Change subject: amdfwtool: copy ...................................................................... amdfwtool: copy Change-Id: Id447b7c93f6d54329cccfa16940eec8a7ebda5bd Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 8 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/59368/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 2163a7d..c9a43ba 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -701,7 +701,7 @@ ish->pl2_location = BUFF_TO_RUN_MODE(*ctx, pspdir2, 1); ish->boot_priority = 0xFFFFFFFF; ish->update_retry_count = 0xf; - ish->glitch_retry_count = 0; + ish->glitch_retry_count = 0xffffff00; ish->psp_id = get_psp_id(soc_id); ish->checksum = fletcher32(&ish->boot_priority, sizeof(ish_directory_table) - sizeof(uint32_t)); @@ -710,7 +710,7 @@ ish->pl2_location = BUFF_TO_RUN_MODE(*ctx, pspdir2, 1); ish->boot_priority = 0x2; ish->update_retry_count = 0xf; - ish->glitch_retry_count = 0; + ish->glitch_retry_count = 0xffffff00; ish->psp_id = get_psp_id(soc_id); ish->checksum = fletcher32(&ish->boot_priority, sizeof(ish_directory_table) - sizeof(uint32_t)); @@ -1466,7 +1466,7 @@ char *tmp; char *rom = NULL; embedded_firmware *amd_romsig; - psp_directory_table *pspdir = NULL; + psp_directory_table *pspdir = NULL, *pspdir_copy = NULL; psp_directory_table *pspdir2 = NULL; psp_directory_table *pspdir2_b = NULL; int comboable = 0; @@ -1833,6 +1833,10 @@ pspdir = new_psp_dir(&ctx, cb_config.multi_level); integrate_psp_firmwares(&ctx, pspdir, pspdir2, pspdir2_b, amd_psp_fw_table, PSP_COOKIE, soc_id, &cb_config); + if (cb_config.recovery_ab) { + pspdir_copy = new_psp_dir(&ctx, cb_config.multi_level); + memcpy (pspdir_copy, pspdir, 0x30); /* TODO */ + } } else { /* flat: PSP 1 cookie and no pointer to 2nd table */ pspdir = new_psp_dir(&ctx, cb_config.multi_level); @@ -1840,6 +1844,7 @@ amd_psp_fw_table, PSP_COOKIE, soc_id, &cb_config); } + //amd_romsig->reserved_2Ch = BUFF_TO_RUN(ctx, pspdir_copy); //TODO: if (comboable) amd_romsig->combo_psp_directory = BUFF_TO_RUN(ctx, pspdir); else -- To view, visit https://review.coreboot.org/c/coreboot/+/59368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id447b7c93f6d54329cccfa16940eec8a7ebda5bd Gerrit-Change-Number: 59368 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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coreboot-gerrit November 2021