coreboot-gerrit November 2021

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Change in coreboot[master]: amdfwtool: Use relative address for EFS gen2
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Eric Peers, Karthik Ramasubramanian, Karthikeyan Ramasubramanian, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56438 ) Change subject: amdfwtool: Use relative address for EFS gen2 ...................................................................... Patch Set 21: (1 comment) Patchset: PS21: This patch is kept as simple as possible. So it can work with the psp_verstage change easily. The hardcode value 29 will be removed in patch 59308 anyway. https://review.coreboot.org/c/coreboot/+/59308 -- To view, visit https://review.coreboot.org/c/coreboot/+/56438 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7701c7819f03586d4ecab3d744056c8c902b630f Gerrit-Change-Number: 56438 Gerrit-PatchSet: 21 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:23:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP]soc/amd/mendocino: Add mendocino and mainboard
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59370 ) Change subject: [WIP]soc/amd/mendocino: Add mendocino and mainboard ...................................................................... Patch Set 2: (12 comments) File src/soc/amd/mendocino/fsp_m_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/84cdf5bf_9b831261 PS2, Line 109: for (i = 0; i < num; i++) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/49c38ba2_02f6dd20 PS2, Line 122: for (i = 0; i < num; i++) { braces {} are not necessary for single statement blocks File src/soc/amd/mendocino/psp_verstage/svc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/fec12567_aa28c5cd PS2, Line 6: #define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/0766befa_4e479565 PS2, Line 19: #define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/a7a1b234_6a2e4859 PS2, Line 30: #define SVC_CALL2(SVC_ID, R0, R1, Ret) \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/94fdc647_7065f721 PS2, Line 40: #define SVC_CALL1(SVC_ID, R0, Ret) \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/2a657f7c_04fab1a2 PS2, Line 49: #define SVC_CALL0(SVC_ID, Ret) \ Macros with complex values should be enclosed in parentheses File src/soc/amd/mendocino/root_complex.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/e5717be1_f410c829 PS2, Line 72: * | | X86_RESET_VECTOR = BOOTBLOCK_END - 0x10 line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/1656a2b2_f3448ac4 PS2, Line 75: * +--------------------------------+ BOOTBLOCK_ADDR = BOOTBLOCK_END - C_ENV_BOOTBLOCK_SIZE line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/806d59db_29598d17 PS2, Line 80: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200 line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/4e3d958d_600a8786 PS2, Line 82: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133550): https://review.coreboot.org/c/coreboot/+/59370/comment/8f9506b7_b900748f PS2, Line 85: * +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/59370 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie94272a220b187758865585a785ab8082821eaa8 Gerrit-Change-Number: 59370 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:18:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/../thermal: Use `clrsetbits32` API for setting LTT
by EricR Lai (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Maulik V Vaghela, Angel Pons, Subrata Banik, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59310 ) Change subject: soc/intel/../thermal: Use `clrsetbits32` API for setting LTT ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51fea7bd2146ea29ef476218c006f7350b32c006 Gerrit-Change-Number: 59310 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:15:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/{adlrvp, brya, sm}: Set `pch_thermal_trip` for Dynamic Thermal Shu...
by EricR Lai (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59270 ) Change subject: mb/{adlrvp, brya, sm}: Set `pch_thermal_trip` for Dynamic Thermal Shutdown ...................................................................... Patch Set 4: Code-Review+2 (1 comment) File src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb: https://review.coreboot.org/c/coreboot/+/59270/comment/bfef3384_739acd53 PS4, Line 95: .pch_thermal_trip = 100, > It would still be overrideable by any given mainboard in their overridetree or devicetree files too […] it's okay to set 100, IIRC CPU is highest temp is 120 or 105 before burn it? -- To view, visit https://review.coreboot.org/c/coreboot/+/59270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ee199c19a9d926a4135eeef3b3b481fbff74a79 Gerrit-Change-Number: 59270 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:14:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up common code for thermal configuration
by EricR Lai (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59271 ) Change subject: soc/intel/alderlake: Hook up common code for thermal configuration ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59271 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f972f47845c123f4f74fd75091c9703d54db796 Gerrit-Change-Number: 59271 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:12:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up common code for thermal configuration
by EricR Lai (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Felix Singer, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59271 ) Change subject: soc/intel/alderlake: Hook up common code for thermal configuration ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: In real cases on felwinter and other prohect, if we don't have thermal sink with proto MB which doesn't have mock up. The CPU might damage when do MRC training. This why I want to know can we set in rom-stage. -- To view, visit https://review.coreboot.org/c/coreboot/+/59271 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f972f47845c123f4f74fd75091c9703d54db796 Gerrit-Change-Number: 59271 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:12:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: test
by Rory Liu (Code Review) 17 Nov '21

17 Nov '21

Rory Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59371 ) Change subject: test ...................................................................... test Change-Id: I0028e9ee3f65365e99d94328c42d048c05d2031b Signed-off-by: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> --- A src/mainboard/google/brya/variants/baseboard/brask/test 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/59371/1 diff --git a/src/mainboard/google/brya/variants/baseboard/brask/test b/src/mainboard/google/brya/variants/baseboard/brask/test new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/brask/test -- To view, visit https://review.coreboot.org/c/coreboot/+/59371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0028e9ee3f65365e99d94328c42d048c05d2031b Gerrit-Change-Number: 59371 Gerrit-PatchSet: 1 Gerrit-Owner: Rory Liu <rory.liu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Medocino
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59369 ) Change subject: amdfwtool: Medocino ...................................................................... Patch Set 2: (1 comment) File util/amdfwtool/amdfwtool.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133547): https://review.coreboot.org/c/coreboot/+/59369/comment/b04a14a5_20b3f045 PS2, Line 58: AMD_FW_DMCUB =0x71, spaces required around that '=' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/59369 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib00f8f0c3903956088596605d25e11cd01a36e66 Gerrit-Change-Number: 59369 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:05:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: copy
by build bot (Jenkins) (Code Review) 17 Nov '21

17 Nov '21

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59368 ) Change subject: amdfwtool: copy ...................................................................... Patch Set 2: (1 comment) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133546): https://review.coreboot.org/c/coreboot/+/59368/comment/92a5c579_439bdb3b PS2, Line 1838: memcpy (pspdir_copy, pspdir, 0x30); /* TODO */ space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/59368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id447b7c93f6d54329cccfa16940eec8a7ebda5bd Gerrit-Change-Number: 59368 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:04:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Call the set_efs_table for Stoneyridge
by Bao Zheng (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Martin Roth, Marshall Dawson, Richard Spiegel, Paul Menzel, Zheng Bao, Matt Papageorge. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58871 ) Change subject: amdfwtool: Call the set_efs_table for Stoneyridge ...................................................................... Patch Set 8: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58871/comment/c5bbb4d7_bd3c7893 PS7, Line 8: > Please describe the problem/motivataion. Done https://review.coreboot.org/c/coreboot/+/58871/comment/62a3ad19_26311ec2 PS7, Line 9: Related to https://review.coreboot.org/c/coreboot/+/58555 > Please also add the git commit (short) hash and summary. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24499ff6daf7878b12b6044496f53379116c598f Gerrit-Change-Number: 58871 Gerrit-PatchSet: 8 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Comment-Date: Wed, 17 Nov 2021 03:03:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2021