coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: [RFC]device/pci_device.c: Add way to limit max bus numbers
by Jonathan Zhang (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Arthur Heymans. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59395 ) Change subject: [RFC]device/pci_device.c: Add way to limit max bus numbers ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0582b156df1a5f76119a3687886c4d58f2d3ad6f Gerrit-Change-Number: 59395 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 17 Nov 2021 19:38:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: disabled autonomous GPIO power management
by 9elements QA (Code Review) 17 Nov '21

17 Nov '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59325 ) Change subject: mb/google/brya/var/taeko: disabled autonomous GPIO power management ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 3 / 1 / 4 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/82404 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/82403 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/82402 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/82401 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59325 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib26797fa2d4d0b1a6eb28c5d79b9ac0a6054abd8 Gerrit-Change-Number: 59325 Gerrit-PatchSet: 2 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 17 Nov 2021 19:00:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: security/vboot: Add NVRAM counter for TPM 2.0
by Julius Werner (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Miriam Polzer, Andrey Pronin, Yu-Ping Wu. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59097 ) Change subject: security/vboot: Add NVRAM counter for TPM 2.0 ...................................................................... Patch Set 6: (1 comment) File src/security/vboot/secdata_tpm.c: https://review.coreboot.org/c/coreboot/+/59097/comment/a6247065_a71d0b6f PS6, Line 120: TPMA_NV_WRITE_STCLEAR > No I didn't have this initially. Julius suggested to add it in case we need it at some later point. I was just thinking it doesn't hurt? Is there ever a reason not to set this flag (just in case the need ever comes up in the future)? -- To view, visit https://review.coreboot.org/c/coreboot/+/59097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I511dba3b3461713ce20fb2bda9fced0fee6517e1 Gerrit-Change-Number: 59097 Gerrit-PatchSet: 6 Gerrit-Owner: Miriam Polzer <mpolzer(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Miriam Polzer <mpolzer(a)google.com> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 17 Nov 2021 18:52:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Miriam Polzer <mpolzer(a)google.com> Comment-In-Reply-To: Andrey Pronin <apronin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/trogdor: Adjust mipi panel backlight gpio
by Julius Werner (Code Review) 17 Nov '21

17 Nov '21

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59044 ) Change subject: mb/google/trogdor: Adjust mipi panel backlight gpio ...................................................................... mb/google/trogdor: Adjust mipi panel backlight gpio According hareware design, mipi panel backlight relies on AP_BKLTEN(GPIO_12) and TP_EN(GPIO_85). Meanwhile, TP_EN(GPIO_85) needs pull up to enable PP3300_DISP_ON before AP_BKLTEN(GPIO_12) up. BUG=b:197709288,b:199081803,b:205166230 BRANCH=trogdor TEST=emerge-strongbad coreboot Change-Id: Ie9920e5366f6b1ea9e0da228bd211317516b390a Signed-off-by: Zanxi Chen <chenzanxi(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59044 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/mainboard/google/trogdor/board.h M src/mainboard/google/trogdor/mainboard.c 2 files changed, 9 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h index 208cafc..534cfe9 100644 --- a/src/mainboard/google/trogdor/board.h +++ b/src/mainboard/google/trogdor/board.h @@ -15,7 +15,7 @@ #define GPIO_AMP_ENABLE GPIO(23) /* Display specific GPIOS */ -#define GPIO_BACKLIGHT_ENABLE ((CONFIG(TROGDOR_HAS_MIPI_PANEL)) ? GPIO(85) : GPIO(12)) +#define GPIO_BACKLIGHT_ENABLE GPIO(12) /* MIPI panel specific GPIOs. Only for mipi_panel-enabled devices (e.g. Mrbland). */ #if CONFIG(TROGDOR_HAS_MIPI_PANEL) @@ -23,6 +23,7 @@ #define GPIO_AVDD_LCD_ENABLE GPIO(88) #define GPIO_AVEE_LCD_ENABLE GPIO(21) #define GPIO_VDD_RESET_1V8 GPIO(87) +#define GPIO_TP_EN GPIO(85) #define GPIO_EDP_BRIDGE_ENABLE dead_code_t(gpio_t) #define GPIO_EN_PP3300_DX_EDP dead_code_t(gpio_t) #define GPIO_PS8640_EDP_BRIDGE_PD_L dead_code_t(gpio_t) @@ -33,6 +34,7 @@ #define GPIO_AVDD_LCD_ENABLE dead_code_t(gpio_t) #define GPIO_AVEE_LCD_ENABLE dead_code_t(gpio_t) #define GPIO_VDD_RESET_1V8 dead_code_t(gpio_t) +#define GPIO_TP_EN dead_code_t(gpio_t) #define GPIO_EDP_BRIDGE_ENABLE (CONFIG(TROGDOR_REV0) ? GPIO(14) : GPIO(104)) #define GPIO_EN_PP3300_DX_EDP (CONFIG(TROGDOR_REV0) ? GPIO(106) : \ (CONFIG(BOARD_GOOGLE_TROGDOR) && board_id() == 1 ? GPIO(30) : \ diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 2a2fa94..cfc811d 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -145,6 +145,12 @@ mdelay(5); gpio_output(GPIO_VDD_RESET_1V8, 1); } + /* + * In mipi panel, TP_EN(GPIO 85) need pull up before + * GPIO_BACKLIGHT_ENABLE(GPIO12) up. + */ + if (CONFIG(TROGDOR_HAS_MIPI_PANEL)) + gpio_output(GPIO_TP_EN, 1); } static struct panel_serializable_data *get_mipi_panel(enum lb_fb_orientation *orientation) -- To view, visit https://review.coreboot.org/c/coreboot/+/59044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9920e5366f6b1ea9e0da228bd211317516b390a Gerrit-Change-Number: 59044 Gerrit-PatchSet: 9 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: xuxinxiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/trogdor: Adjust mipi panel backlight gpio
by Julius Werner (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: zanxi chen. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59044 ) Change subject: mb/google/trogdor: Adjust mipi panel backlight gpio ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9920e5366f6b1ea9e0da228bd211317516b390a Gerrit-Change-Number: 59044 Gerrit-PatchSet: 8 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: xuxinxiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 17 Nov 2021 18:50:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/qualcomm/common/usb: Add support for common USB driver
by Julius Werner (Code Review) 17 Nov '21

17 Nov '21

Attention is currently required from: Ravi kumar, Paul Menzel, mturney mturney. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56091 ) Change subject: soc/qualcomm/common/usb: Add support for common USB driver ...................................................................... Patch Set 38: (16 comments) File src/soc/qualcomm/common/Kconfig: https://review.coreboot.org/c/coreboot/+/56091/comment/f4b04bcc_51a0f117 PS34, Line 15: endif > Everything you're adding should be within this if-endif block. Done https://review.coreboot.org/c/coreboot/+/56091/comment/9d15331f_ad00a966 PS34, Line 31: default n > If you follow my other comments I don't think you'll need any Kconfigs for this. […] Done File src/soc/qualcomm/common/include/soc/usb/qmp_usb_phy.h: https://review.coreboot.org/c/coreboot/+/56091/comment/26d584c9_69f7c5ab PS38, Line 15: Don't put random blank lines in struct definitions. File src/soc/qualcomm/common/include/soc/usb/qusb_phy.h: https://review.coreboot.org/c/coreboot/+/56091/comment/18624a30_4705f40b PS38, Line 43: //#define USB3_PCS_PHYSTATUS BIT(6) No commented-out code https://review.coreboot.org/c/coreboot/+/56091/comment/db7bb656_9d6252f7 PS38, Line 95: same here File src/soc/qualcomm/common/include/soc/usb/snps_usb_phy.h: https://review.coreboot.org/c/coreboot/+/56091/comment/a61d72bd_f3b30415 PS38, Line 14: spurious newline File src/soc/qualcomm/common/usb/qmp_usb_phy.c: https://review.coreboot.org/c/coreboot/+/56091/comment/92138e1d_163c71ef PS34, Line 7: #if CONFIG(QMPV4_USB_PHY) > Please factor these out into separate files (e.g. a qmpv3_usb_phy.c and a qmpv4_usb_phy.c). […] Done File src/soc/qualcomm/common/usb/qmpv3_usb_phy.c: https://review.coreboot.org/c/coreboot/+/56091/comment/cea2e03d_29780dba PS38, Line 358: = { Don't put the = on a new line. File src/soc/qualcomm/common/usb/qmpv4_usb_phy.c: https://review.coreboot.org/c/coreboot/+/56091/comment/cd3c4278_92bb11ce PS38, Line 352: = { same File src/soc/qualcomm/common/usb/qusb_phy.c: https://review.coreboot.org/c/coreboot/+/56091/comment/5b51eaa4_6d9327c1 PS38, Line 6: void hs_usb_phy_init(void *board_data); This prototype is already in usb_common.h, just include that instead. https://review.coreboot.org/c/coreboot/+/56091/comment/7bbf29c7_5b089ca4 PS38, Line 11: same here https://review.coreboot.org/c/coreboot/+/56091/comment/2fbe873f_dadbec7c PS38, Line 27: Please try to be somewhat consistent with the continuation line indentation. File src/soc/qualcomm/common/usb/snps_usb_phy.c: https://review.coreboot.org/c/coreboot/+/56091/comment/495f85be_19ca4712 PS38, Line 33: void hs_usb_phy_init(void *board_data); same here https://review.coreboot.org/c/coreboot/+/56091/comment/81c5a8c3_e65f1c52 PS38, Line 44: UTMI_PHY_CMN_CTRL_OVERRIDE_EN, This can still fit on the previous line https://review.coreboot.org/c/coreboot/+/56091/comment/c17dabf0_13253a3f PS38, Line 48: POR, POR); This too (and many more times below). https://review.coreboot.org/c/coreboot/+/56091/comment/b157b686_25e24932 PS38, Line 73: PARAM_OVRD_MASK, override_data->parameter_override_x2); What about parameter_override_x3? -- To view, visit https://review.coreboot.org/c/coreboot/+/56091 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1013ded22855286220cfa747cb25418070fe85a7 Gerrit-Change-Number: 56091 Gerrit-PatchSet: 38 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sandeep Maheswaram <sanm(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Wed, 17 Nov 2021 18:47:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: crossgcc: Upgrade llvm to 13.0.0 version
by HAOUAS Elyes (Code Review) 17 Nov '21

17 Nov '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59400 ) Change subject: crossgcc: Upgrade llvm to 13.0.0 version ...................................................................... crossgcc: Upgrade llvm to 13.0.0 version Change-Id: I8c550d3528a5b1c891b318c08ecfba3a9255e69c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc D util/crossgcc/sum/clang-12.0.0.src.tar.xz.cksum A util/crossgcc/sum/clang-13.0.0.src.tar.xz.cksum D util/crossgcc/sum/clang-tools-extra-12.0.0.src.tar.xz.cksum A util/crossgcc/sum/clang-tools-extra-13.0.0.src.tar.xz.cksum D util/crossgcc/sum/compiler-rt-12.0.0.src.tar.xz.cksum A util/crossgcc/sum/compiler-rt-13.0.0.src.tar.xz.cksum D util/crossgcc/sum/llvm-12.0.0.src.tar.xz.cksum A util/crossgcc/sum/llvm-13.0.0.src.tar.xz.cksum 9 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/59400/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 53c5dba..1f9707c 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -39,7 +39,7 @@ BINUTILS_VERSION=2.37 IASL_VERSION=20210331 # CLANG version number -CLANG_VERSION=12.0.0 +CLANG_VERSION=13.0.0 CMAKE_VERSION=3.21.4 NASM_VERSION=2.15.05 diff --git a/util/crossgcc/sum/clang-12.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-12.0.0.src.tar.xz.cksum deleted file mode 100644 index 42be5d9..0000000 --- a/util/crossgcc/sum/clang-12.0.0.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -51250856f368acef5ab335a16f994bf29ad3d115 tarballs/clang-12.0.0.src.tar.xz diff --git a/util/crossgcc/sum/clang-13.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-13.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..3e6c8aa --- /dev/null +++ b/util/crossgcc/sum/clang-13.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +c071f016b5e8965a52cea4f0905924aaf5495d49 tarballs/clang-13.0.0.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-12.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-12.0.0.src.tar.xz.cksum deleted file mode 100644 index 6328594..0000000 --- a/util/crossgcc/sum/clang-tools-extra-12.0.0.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -5fe54db45be35b8f77acc32f08e01912f8e8b915 tarballs/clang-tools-extra-12.0.0.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-13.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-13.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..f608f98 --- /dev/null +++ b/util/crossgcc/sum/clang-tools-extra-13.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +7fe8345c57469fcf32945a16dc0a719e9131741c tarballs/clang-tools-extra-13.0.0.src.tar.xz diff --git a/util/crossgcc/sum/compiler-rt-12.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-12.0.0.src.tar.xz.cksum deleted file mode 100644 index 650f8e5..0000000 --- a/util/crossgcc/sum/compiler-rt-12.0.0.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -7b02a455fbc6fe395da8d5411072acc04d669d94 tarballs/compiler-rt-12.0.0.src.tar.xz diff --git a/util/crossgcc/sum/compiler-rt-13.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-13.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..a33d640 --- /dev/null +++ b/util/crossgcc/sum/compiler-rt-13.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +f3241c200e739abbfa846c707175fd711d3cf4fe tarballs/compiler-rt-13.0.0.src.tar.xz diff --git a/util/crossgcc/sum/llvm-12.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-12.0.0.src.tar.xz.cksum deleted file mode 100644 index e4f3aa3..0000000 --- a/util/crossgcc/sum/llvm-12.0.0.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -dbc1cf6aa2dbdeccd7ad26c9215b56963a5686d3 tarballs/llvm-12.0.0.src.tar.xz diff --git a/util/crossgcc/sum/llvm-13.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-13.0.0.src.tar.xz.cksum new file mode 100644 index 0000000..7b8473b --- /dev/null +++ b/util/crossgcc/sum/llvm-13.0.0.src.tar.xz.cksum @@ -0,0 +1 @@ +0be63c8b3b44f3af49d9e57130f7b76a6040427c tarballs/llvm-13.0.0.src.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/59400 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c550d3528a5b1c891b318c08ecfba3a9255e69c Gerrit-Change-Number: 59400 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: crossgcc: Upgrade CMake to version 3.21.4
by HAOUAS Elyes (Code Review) 17 Nov '21

17 Nov '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59399 ) Change subject: crossgcc: Upgrade CMake to version 3.21.4 ...................................................................... crossgcc: Upgrade CMake to version 3.21.4 Change-Id: I4272f72dd6ed686dbad5615a0ab44c8c632b5930 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc D util/crossgcc/sum/cmake-3.20.3.tar.gz.cksum A util/crossgcc/sum/cmake-3.21.4.tar.gz.cksum 3 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/59399/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 773b0f0..53c5dba 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -40,7 +40,7 @@ IASL_VERSION=20210331 # CLANG version number CLANG_VERSION=12.0.0 -CMAKE_VERSION=3.20.3 +CMAKE_VERSION=3.21.4 NASM_VERSION=2.15.05 # GCC toolchain archive locations diff --git a/util/crossgcc/sum/cmake-3.20.3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.20.3.tar.gz.cksum deleted file mode 100644 index 2ac43e8..0000000 --- a/util/crossgcc/sum/cmake-3.20.3.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -96e498c4d1ac238b6852b1113102bf2301bb88d8 tarballs/cmake-3.20.3.tar.gz diff --git a/util/crossgcc/sum/cmake-3.21.4.tar.gz.cksum b/util/crossgcc/sum/cmake-3.21.4.tar.gz.cksum new file mode 100644 index 0000000..a72cc15 --- /dev/null +++ b/util/crossgcc/sum/cmake-3.21.4.tar.gz.cksum @@ -0,0 +1 @@ +7d5bde583207dc205cba158ce46f0c389884b211 tarballs/cmake-3.21.4.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/59399 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4272f72dd6ed686dbad5615a0ab44c8c632b5930 Gerrit-Change-Number: 59399 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: crossgcc/buildgcc: Clean-up
by HAOUAS Elyes (Code Review) 17 Nov '21

17 Nov '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59398 ) Change subject: crossgcc/buildgcc: Clean-up ...................................................................... crossgcc/buildgcc: Clean-up Drop unused GCC_AUTOCONF_VERSION. Change-Id: I7d293ae2c8663efdc9ad4146ff32671ffd3e176a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/59398/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 6c1a7a5..773b0f0 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -36,7 +36,6 @@ MPFR_VERSION=4.1.0 MPC_VERSION=1.2.1 GCC_VERSION=11.2.0 -GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.37 IASL_VERSION=20210331 # CLANG version number @@ -852,7 +851,6 @@ print_supported() { case "$PRINTSUPPORTED" in - AUTOCONF|autoconf) printf "%s\n" "$GCC_AUTOCONF_VERSION";; BINUTILS|binutils) printf "%s\n" "$BINUTILS_VERSION";; CLANG|clang) printf "%s\n" "$CLANG_VERSION";; GCC|gcc) printf "%s\n" "$GCC_VERSION";; -- To view, visit https://review.coreboot.org/c/coreboot/+/59398 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d293ae2c8663efdc9ad4146ff32671ffd3e176a Gerrit-Change-Number: 59398 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: crossgcc/Makefile: Clean-up
by HAOUAS Elyes (Code Review) 17 Nov '21

17 Nov '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59397 ) Change subject: crossgcc/Makefile: Clean-up ...................................................................... crossgcc/Makefile: Clean-up coreboot do not build "Make" anymore. Change-Id: I0f159fc912d09ebde6ac7ba5be83933aa251f1d5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/crossgcc/Makefile 1 file changed, 1 insertion(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/59397/1 diff --git a/util/crossgcc/Makefile b/util/crossgcc/Makefile index 288861b..cb552dd 100644 --- a/util/crossgcc/Makefile +++ b/util/crossgcc/Makefile @@ -27,9 +27,6 @@ bash ./buildgcc -P clang $(if $(CPUS),-j $(CPUS)) $(if $(KEEP_SOURCES),-t) $(BUILDGCC_OPTIONS) -d $(DEST) endif -build_make: - bash ./buildgcc -P make $(if $(CPUS),-j $(CPUS)) $(if $(KEEP_SOURCES),-t) $(BUILDGCC_OPTIONS) -d $(DEST) - build_nasm: bash ./buildgcc -P nasm $(if $(CPUS),-j $(CPUS)) $(if $(KEEP_SOURCES),-t) $(BUILDGCC_OPTIONS) -d $(DEST) @@ -68,7 +65,7 @@ distclean: clean rm -rf tarballs -.PHONY: all build_gcc build_iasl build_clang build_make build_nasm \ +.PHONY: all build_gcc build_iasl build_clang build_nasm \ clean distclean clean_tempfiles \ build-i386 build-x64 build-arm build-aarch64 \ build-riscv build-ppc64 build-nds32le -- To view, visit https://review.coreboot.org/c/coreboot/+/59397 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f159fc912d09ebde6ac7ba5be83933aa251f1d5 Gerrit-Change-Number: 59397 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit November 2021