coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/google/chromeec: Add PLD to EC conn in ACPI table
by Won Chung (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Prashant Malani, Nick Vaccaro, Benson Leung. Won Chung has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59401 ) Change subject: ec/google/chromeec: Add PLD to EC conn in ACPI table ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59401/comment/d5765dee_14b364a8 PS1, Line 8: > Add a commit message providing a bit more detail about what's being done in this CL. Added more information. Thank you for review! https://review.coreboot.org/c/coreboot/+/59401/comment/610e46de_360756e6 PS1, Line 10: TEST=emerge-brya coreboot > I believe you also tested this on a brya by dumping the SSDT and verifying the PLD object is written […] Yes, added it too. Thank you for review! File src/ec/google/chromeec/ec_acpi.c: https://review.coreboot.org/c/coreboot/+/59401/comment/739d89c1_57f62598 PS1, Line 125: struct drivers_usb_acpi_config *config; : : config = NULL; > nit: […] Done https://review.coreboot.org/c/coreboot/+/59401/comment/abe323e8_d0c950cc PS1, Line 152: struct acpi_pld pld; > Probably should be 0-initialized. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc56ecd4e8954ffaace3acd9528a064b5fa2cf6f Gerrit-Change-Number: 59401 Gerrit-PatchSet: 2 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Benson Leung <bleung(a)chromium.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:14:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Prashant Malani <pmalani(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add PLD to EC conn in ACPI table
by Won Chung (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Lance Zhao, Won Chung, Nick Vaccaro, Benson Leung, Prashant Malani. Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro, Benson Leung, Prashant Malani, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59401 to look at the new patch set (#2). Change subject: ec/google/chromeec: Add PLD to EC conn in ACPI table ...................................................................... ec/google/chromeec: Add PLD to EC conn in ACPI table Given EC CON and associated USB port objects, custom_pld or pld_group information is retrieved from port and added to ACPI table as _PLD field for typec connector. BUG=b:202446737 TEST=emerge-brya coreboot & SSDT dump in Brya test device Signed-off-by: Won Chung <wonchung(a)google.com> Change-Id: Ibc56ecd4e8954ffaace3acd9528a064b5fa2cf6f Reviewed-on: https://review.coreboot.org/c/coreboot/+/59401 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/acpi/acpigen_usb.c M src/ec/google/chromeec/ec_acpi.c M src/include/acpi/acpigen_usb.h 3 files changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/59401/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc56ecd4e8954ffaace3acd9528a064b5fa2cf6f Gerrit-Change-Number: 59401 Gerrit-PatchSet: 2 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Won Chung <wonchung(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Benson Leung <bleung(a)chromium.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: libpatload: Implement new CBFS access API
by Paul Menzel (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Jakub Czapiga. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59497 ) Change subject: libpatload: Implement new CBFS access API ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59497/comment/ca07069d_d964c010 PS1, Line 7: libpatload libpayload -- To view, visit https://review.coreboot.org/c/coreboot/+/59497 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00da0658dbac0cddf92ad55611def947932d23c7 Gerrit-Change-Number: 59497 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:12:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/security/vboot: Setup secure counter space in TPM NVRAM
by Raul Rangel (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Andrey Pronin, Paul Menzel, Julius Werner, Yu-Ping Wu, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59476 ) Change subject: src/security/vboot: Setup secure counter space in TPM NVRAM ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59476/comment/7dbd8864_4d87e2fc PS1, Line 7: Setup > The verb is spelled with a space: Set up How about adding a presubmit hook ? ;) https://review.coreboot.org/c/coreboot/+/59476/comment/fb5fd890_957fe14a PS1, Line 35: 72057594037927936 > I think because of endianness reasons - The value is 0x1000000000000000. ah, should we adjust the endienness when printing? I guess it sounds like we are removing the increment and read functionality anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/59476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I915fbdada60e242d911b748ad5dc28028de9b657 Gerrit-Change-Number: 59476 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Pronin <apronin(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Pronin <apronin(a)google.com> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:11:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
by Paul Menzel (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Ben Chuang. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59429 ) Change subject: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750 ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59429 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d60cef41baade7457a159d3ce2f8d2e6b66e71c Gerrit-Change-Number: 59429 Gerrit-PatchSet: 1 Gerrit-Owner: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Greg Tu <greg.tu(a)genesyslogic.com.tw> Gerrit-CC: HsuanYang Chen <ynop77(a)gmail.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ben Chuang <benchuanggli(a)gmail.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:10:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/security/vboot: Setup secure counter space in TPM NVRAM
by Paul Menzel (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Andrey Pronin, Raul Rangel, Julius Werner, Yu-Ping Wu, Karthik Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59476 ) Change subject: src/security/vboot: Setup secure counter space in TPM NVRAM ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59476/comment/be8fe4ea_727ee885 PS1, Line 7: Setup The verb is spelled with a space: Set up -- To view, visit https://review.coreboot.org/c/coreboot/+/59476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I915fbdada60e242d911b748ad5dc28028de9b657 Gerrit-Change-Number: 59476 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Pronin <apronin(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Pronin <apronin(a)google.com> Gerrit-Attention: Andrey Pronin <apronin(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:09:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs
by Karthik Ramasubramanian (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: shkim, Henry Sun, Edward Doan. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59480 ) Change subject: mb/google/dedede/var/bugzzy: Configure Acoustic noise mitigation UPDs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id249a143efb9bce70f48fb466fed42e766a10937 Gerrit-Change-Number: 59480 Gerrit-PatchSet: 1 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: shkim <sh_.kim(a)samsung.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Comment-Date: Fri, 19 Nov 2021 18:09:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp_m: Update the FIVR configurations
by Zhixing Ma (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: V Sowmya, Selma Bensaid, Tim Wawrzynczak. Zhixing Ma has uploaded a new patch set (#5) to the change originally created by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/58431 ) Change subject: mb/intel/adlrvp_m: Update the FIVR configurations ...................................................................... mb/intel/adlrvp_m: Update the FIVR configurations This patch sets the optimized FIVR configuration for adl-m rvp, customized based on the pnp measurements to achieve the better power savings in sleep states. TEST=Boot to OS. Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: Ibbc7364913f4c3626176ec3f28907572661c03b2 --- M src/mainboard/intel/adlrvp/devicetree_m.cb 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/58431/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/58431 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbc7364913f4c3626176ec3f28907572661c03b2 Gerrit-Change-Number: 58431 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/adlrvp_m: Configure parameters for VR domains
by Zhixing Ma (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Bora Guvendik, V Sowmya, Selma Bensaid. Zhixing Ma has uploaded a new patch set (#3) to the change originally created by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/58808 ) Change subject: mb/intel/adlrvp_m: Configure parameters for VR domains ...................................................................... mb/intel/adlrvp_m: Configure parameters for VR domains Add power delivery parameters for the VR domains. TEST=Boot to OS Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: I388af3197f8d1a983e2eb157de45a715534b4418 --- M src/mainboard/intel/adlrvp/devicetree_m.cb 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/58808/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I388af3197f8d1a983e2eb157de45a715534b4418 Gerrit-Change-Number: 58808 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: clean up psp fw parsing
by Karthik Ramasubramanian (Code Review) 19 Nov '21

19 Nov '21

Attention is currently required from: Kangheui Won, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59449 ) Change subject: amdfwtool: clean up psp fw parsing ...................................................................... Patch Set 3: (1 comment) File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/59449/comment/3e8b2b94_adba1753 PS2, Line 110: psp_dir_valid_entries > Yes that would be even better, definitely something should be planned. […] If you can push a clean-up CL on top of this, I am fine. But I want to ensure that the clean-up is done and not forgotten. Same comment for below. -- To view, visit https://review.coreboot.org/c/coreboot/+/59449 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id7adb20db7bab73933b457f3449b2d8ce4217b8c Gerrit-Change-Number: 59449 Gerrit-PatchSet: 3 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 19 Nov 2021 17:59:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kangheui Won <khwon(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2021