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Change subject: soc/intel/common/thermal: Hook up IA thermal block to romstage
......................................................................
Patch Set 5: Code-Review+1
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Change subject: soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value()
......................................................................
Patch Set 6: Code-Review+1
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59209 )
Change subject: soc/intel/common/thermal: Allow thermal configuration over PMC
......................................................................
Patch Set 12:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59209/comment/ce077feb_074cd74a
PS11, Line 7: soc/intel/../thermal: Add support for thermal config behind PMC device
> Since you mention "thermal" in the prefix / path, I think this is enough to get an idea what this is […]
Ack
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#12).
Change subject: soc/intel/common/thermal: Allow thermal configuration over PMC
......................................................................
soc/intel/common/thermal: Allow thermal configuration over PMC
Thermal configuration has evolved over PCH generations where
latest PCH has provided an option to allow thermal configuration
using PMC PWRMBASE registers.
This patch adds an option for impacted SoC to select the Kconfig
for allowing thermal configuration using PMC PCH MMIO space.
BUG=b:193774296
TEST=Able to build and boot hatch and adlrvp platform.
Change-Id: I0c6ae72610da39fc18ff252c440d006e83c570a0
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/include/intelblocks/thermal.h
M src/soc/intel/common/block/thermal/Kconfig
M src/soc/intel/common/block/thermal/Makefile.inc
A src/soc/intel/common/block/thermal/thermal_pmc.c
4 files changed, 126 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/59209/12
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59310 )
Change subject: soc/intel/common/thermal: Use `clrsetbits32()` for setting LTT
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59310/comment/0fc6c251_ca86ea14
PS7, Line 7: soc/intel/../thermal: Use `clrsetbits32` API for setting LTT
> I suggest: […]
Ack
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: soc/intel/common/thermal: Use `clrsetbits32()` for setting LTT
......................................................................
soc/intel/common/thermal: Use `clrsetbits32()` for setting LTT
This patch uses `clrsetbits32` helper function to set thermal
device Low Temp Threshold (LTT) value.
BUG=b:193774296
TEST=Able to build and boot hatch and adlrvp with this change.
Change-Id: I51fea7bd2146ea29ef476218c006f7350b32c006
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/thermal/thermal.c
1 file changed, 1 insertion(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/59310/8
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59391 )
Change subject: soc/intel/common/thermal: Hook up IA thermal block to romstage
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59391/comment/d02dd5fb_068a2084
PS3, Line 7: soc/intel/../thermal: Compile IA common thermal block in romstage
> I suggest: […]
Ack
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: soc/intel/common/thermal: Hook up IA thermal block to romstage
......................................................................
soc/intel/common/thermal: Hook up IA thermal block to romstage
This patch ensures IA common thermal block is now able to compile
under romstage with necessary compilation issues fixed.
BUG=b:193774296
Change-Id: I3279f55436977ab9a47e04455d8469e50b5c33c8
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/thermal/Makefile.inc
M src/soc/intel/common/block/thermal/thermal.c
2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/59391/4
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59390 )
Change subject: soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value()
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59390/comment/efe942cc_ce8475f8
PS3, Line 7: /../
> Removed the `dev` part, just mention that in the long description: […]
Ack
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value()
......................................................................
soc/intel/common/thermal: Drop unused parameter of pch_get_ltt_value()
`struct device *dev` as part of the pch_get_ltt_value() argument is
being used hence, replace with `void`.
BUG=b:193774296
Change-Id: Iecdf6f6c3023f896a27e212d7c59b2030a3fd116
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/thermal/thermal.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59390/5
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