coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs i...
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Michał Żygowski, Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59519 ) Change subject: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFS ...................................................................... Patch Set 6: Verified-1 (2 comments) File src/security/intel/txt/ramstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134276): https://review.coreboot.org/c/coreboot/+/59519/comment/c63bd4fd_dbc8c329 PS6, Line 236: static void txt_heap_push_bdr_for_two_acms(u8** heap_struct) "foo** bar" should be "foo **bar" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134276): https://review.coreboot.org/c/coreboot/+/59519/comment/e028be7b_5ec84a7e PS6, Line 326: /* trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/59519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0c37a66d96e1ca3fb4d3f665e3ad35c6f1c5c1e Gerrit-Change-Number: 59519 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:30:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter
by John Su (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: John Su, Felix Held. Hello build bot (Jenkins), Tim Wawrzynczak, Sumeet R Pawnikar, EricR Lai, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59614 to look at the new patch set (#5). Change subject: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter ...................................................................... mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter The DPTF parameters were verified by the thermal team. BUG=b:207463762 BRANCH=brya TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 --- M src/mainboard/google/brya/variants/felwinter/overridetree.cb 1 file changed, 96 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59614/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 Gerrit-Change-Number: 59614 Gerrit-PatchSet: 5 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: security/intel/txt/Kconfig:: Add dependency on SOUTHBRIDGE_INTEL_COMM...
by Michał Żygowski (Code Review) 25 Nov '21

25 Nov '21

Michał Żygowski has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59640 ) Change subject: security/intel/txt/Kconfig:: Add dependency on SOUTHBRIDGE_INTEL_COMMON_ME ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/59640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a4b5404d609006672bf41d81c696a47e078a1d2 Gerrit-Change-Number: 59640 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: security/intel/txt/Kconfig:: Add dependency on SOUTHBRIDGE_INTEL_COMM...
by Michał Żygowski (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59640 ) Change subject: security/intel/txt/Kconfig:: Add dependency on SOUTHBRIDGE_INTEL_COMMON_ME ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: It seems Xeon SP doesn't use SOC_INTEL_COMMON_BLOCK_SA so this patch probably doesn't make sense -- To view, visit https://review.coreboot.org/c/coreboot/+/59640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a4b5404d609006672bf41d81c696a47e078a1d2 Gerrit-Change-Number: 59640 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:28:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update memory settings
by Shon Wang (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Kevin Chiu, YH Lin, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Nick Vaccaro, Nick Vaccaro, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59334 to look at the new patch set (#8). Change subject: mb/google/brya/var/vell: update memory settings ...................................................................... mb/google/brya/var/vell: update memory settings BUG=b:205908918 TEST=emerge-brya coreboot Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/vell/Makefile.inc A src/mainboard/google/brya/variants/vell/memory.c D src/soc/intel/alderlake/meminit.c 3 files changed, 103 insertions(+), 283 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/59334/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/59334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Gerrit-Change-Number: 59334 Gerrit-PatchSet: 8 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59523 ) Change subject: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT ...................................................................... Patch Set 5: Verified-1 (1 comment) File src/northbridge/intel/sandybridge/romstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134271): https://review.coreboot.org/c/coreboot/+/59523/comment/6071fb2b_3fab63e9 PS5, Line 32: /* trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/59523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b912f121593fa55c11813262f09be1a1055e950 Gerrit-Change-Number: 59523 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:22:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs i...
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59519 ) Change subject: security/intel/txt: Fix HEAP_ACM format depending on number of ACMs in CBFS ...................................................................... Patch Set 5: Verified-1 (2 comments) File src/security/intel/txt/ramstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134268): https://review.coreboot.org/c/coreboot/+/59519/comment/3a9ba897_a23ccddb PS5, Line 236: static void txt_heap_push_bdr_for_two_acms(u8** heap_struct) "foo** bar" should be "foo **bar" Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134268): https://review.coreboot.org/c/coreboot/+/59519/comment/a847f0e9_5bee54cd PS5, Line 326: /* trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/59519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0c37a66d96e1ca3fb4d3f665e3ad35c6f1c5c1e Gerrit-Change-Number: 59519 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:21:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/dell/optiplex_9010/romstage.c: Add interrupt routing map
by Michał Żygowski (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Felix Held. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59525 ) Change subject: mb/dell/optiplex_9010/romstage.c: Add interrupt routing map ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Nothing special here. Simply reproduce the routing from original firmware. -- To view, visit https://review.coreboot.org/c/coreboot/+/59525 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdc41a1e6627b68813fb264aed7e30df58fc6d54 Gerrit-Change-Number: 59525 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:19:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: superio/smsc/sch5545: Fix KBD and Runtime Registers init
by Michał Żygowski (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Felix Held. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59524 ) Change subject: superio/smsc/sch5545: Fix KBD and Runtime Registers init ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Normally I would add a switch case in the superio.c sch5545_init for the Runtime Registers too, but it is already too late and the platform may hang before reaching it. Anything against it Felix? -- To view, visit https://review.coreboot.org/c/coreboot/+/59524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I790cac3ce1101565b64ed54d9c6b50f5e9aa4cf6 Gerrit-Change-Number: 59524 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:17:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT
by Michał Żygowski (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59523 to look at the new patch set (#7). Change subject: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT ...................................................................... nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT Initialize the DPR register and check if SCLEAN needs to be run. Allows to reliably boot the platform if ungraceful shutdown occured or the memory controller has been locked by TXT. TEST=Dell OptiPlex 9010 with Intel TXT enabled boots successfully after 4s power button override or power cable unplug when SENTER was executed. Successfully boot QubesOS 4.0 with TBoot v1.8.2 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I4b912f121593fa55c11813262f09be1a1055e950 --- M src/northbridge/intel/sandybridge/romstage.c 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/59523/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b912f121593fa55c11813262f09be1a1055e950 Gerrit-Change-Number: 59523 Gerrit-PatchSet: 7 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021