coreboot-gerrit November 2021

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Change in coreboot[master]: mb/google/dedede/var/drawcia: Generate new SPD ID for new memory part
by Robert Chen (Code Review) 25 Nov '21

25 Nov '21

Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59642 ) Change subject: mb/google/dedede/var/drawcia: Generate new SPD ID for new memory part ...................................................................... mb/google/dedede/var/drawcia: Generate new SPD ID for new memory part Add new memory parts in memory_parts_used.txt and generate SPD id for these parts: Samsung K4U6E3S4AA-MGCL BUG=b:204014463 TEST=run part_id_gen to generate SPD id Change-Id: Icb0f211508450b16b2e5d214ae6adc9852718a59 --- M src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc M src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt 3 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/59642/1 diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc index 015541be..74c52f9 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc @@ -4,4 +4,8 @@ # util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt SPD_SOURCES = +<<<<<<< Updated upstream SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B +======= +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL, K4U6E3S4AA-MGCL +>>>>>>> Stashed changes diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt index bcdc762..5fbc84b 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt @@ -8,3 +8,9 @@ H9HCNNNBKMMLXR-NEE 0 (0000) K4U6E3S4AA-MGCR 0 (0000) MT53E512M32D1NP-046 WT:B 0 (0000) +<<<<<<< Updated upstream +======= +H54G46CYRBX267 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) +K4U6E3S4AA-MGCL 0 (0000) +>>>>>>> Stashed changes diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt index 09ed381..6387b41 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt @@ -2,3 +2,9 @@ H9HCNNNBKMMLXR-NEE K4U6E3S4AA-MGCR MT53E512M32D1NP-046 WT:B +<<<<<<< Updated upstream +======= +H54G46CYRBX267 +K4U6E3S4AB-MGCL +K4U6E3S4AA-MGCL +>>>>>>> Stashed changes -- To view, visit https://review.coreboot.org/c/coreboot/+/59642 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb0f211508450b16b2e5d214ae6adc9852718a59 Gerrit-Change-Number: 59642 Gerrit-PatchSet: 1 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek: add watchdog status dump
by Yu-Ping Wu (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59641 ) Change subject: soc/mediatek: add watchdog status dump ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59641/comment/23ff4971_934c8bed PS1, Line 7: add watchdog status dump Log watchdog status File src/soc/mediatek/common/wdt.c: https://review.coreboot.org/c/coreboot/+/59641/comment/abbef990_7ec445a0 PS1, Line 19: watchdog status: %#x How about WDT: Status = %#x -- To view, visit https://review.coreboot.org/c/coreboot/+/59641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 Gerrit-Change-Number: 59641 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 02:50:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: add watchdog status dump
by Rex-BC Chen (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59641 ) Change subject: soc/mediatek: add watchdog status dump ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 Gerrit-Change-Number: 59641 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 25 Nov 2021 02:18:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: add watchdog status dump
by Rex-BC Chen (Code Review) 25 Nov '21

25 Nov '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59641 ) Change subject: soc/mediatek: add watchdog status dump ...................................................................... soc/mediatek: add watchdog status dump Reveal watchdog status value on bootblock stage. BUG=b:207646327 TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 --- M src/soc/mediatek/common/wdt.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/59641/1 diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c index b228e56..86ee782 100644 --- a/src/soc/mediatek/common/wdt.c +++ b/src/soc/mediatek/common/wdt.c @@ -16,6 +16,8 @@ mtk_wdt_clr_status(wdt_sta); + printk(BIOS_DEBUG, "watchdog status: %#x\n", wdt_sta); + printk(BIOS_INFO, "WDT: Last reset was "); if (wdt_sta & MTK_WDT_STA_HW_RST) { printk(BIOS_INFO, "hardware watchdog\n"); -- To view, visit https://review.coreboot.org/c/coreboot/+/59641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c5ad222a41085616565dd5c10b0e967bb64ec63 Gerrit-Change-Number: 59641 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C
by Mark Hsieh (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Marco Chen, Zhuohao Lee, Felix Held. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59580 ) Change subject: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/brya/Kconfig: https://review.coreboot.org/c/coreboot/+/59580/comment/bc6a9ce3_f26d9792 PS5, Line 75: default 0x1 > this will break all of the other boards, see CB:59560 Updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/59580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26d059a7ea5a3fdf00de260214c00d3bba9aa7f7 Gerrit-Change-Number: 59580 Gerrit-PatchSet: 6 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:58:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Subrata Banik, Andrey Petrov, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59324 ) Change subject: [WIP] src/drivers/intel/fsp2_0: Add FSP 2.3 support ...................................................................... Patch Set 7: (1 comment) File src/drivers/intel/fsp2_0/Kconfig: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134287): https://review.coreboot.org/c/coreboot/+/59324/comment/a7662af0_336834a8 PS7, Line 40: trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/59324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica1bd004286c785aa8a431f39d8efc69982874c1 Gerrit-Change-Number: 59324 Gerrit-PatchSet: 7 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:50:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: update memory settings
by Shon Wang (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Kevin Chiu, YH Lin, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Nick Vaccaro, Nick Vaccaro, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59334 to look at the new patch set (#9). Change subject: mb/google/brya/var/vell: update memory settings ...................................................................... mb/google/brya/var/vell: update memory settings BUG=b:205908918 TEST=emerge-brya coreboot Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/vell/Makefile.inc A src/mainboard/google/brya/variants/vell/memory.c 2 files changed, 103 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/59334/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/59334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Gerrit-Change-Number: 59334 Gerrit-PatchSet: 9 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT
by build bot (Jenkins) (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59523 ) Change subject: nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT ...................................................................... Patch Set 6: Verified-1 (1 comment) File src/northbridge/intel/sandybridge/romstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134279): https://review.coreboot.org/c/coreboot/+/59523/comment/176adfda_50b55485 PS6, Line 32: /* trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/59523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b912f121593fa55c11813262f09be1a1055e950 Gerrit-Change-Number: 59523 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:33:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter
by John Su (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Tim Wawrzynczak, Felix Held. John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59614 ) Change subject: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59614/comment/d1582350_19ab6e75 PS4, Line 9: paramerters > Thanks for the suggestion. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 Gerrit-Change-Number: 59614 Gerrit-PatchSet: 5 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:31:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: John Su <john_su(a)compal.corp-partner.google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter
by John Su (Code Review) 25 Nov '21

25 Nov '21

Attention is currently required from: Tim Wawrzynczak, Felix Held. John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59614 ) Change subject: mb/google/brya/var/felwinter: Add DPTF parameters for Felwinter ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59614/comment/3d6d6afe_0515e79c PS4, Line 9: paramerters > `parameters` […] Thanks for the suggestion. -- To view, visit https://review.coreboot.org/c/coreboot/+/59614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I634d6d98c28e75ad41488921df6b8e836e253ff1 Gerrit-Change-Number: 59614 Gerrit-PatchSet: 5 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Nov 2021 01:31:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2021