coreboot-gerrit November 2021

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Change in coreboot[master]: soc/intel/common: Update CSE components during recovery mode
by Sridhar Siricilla (Code Review) 26 Nov '21

26 Nov '21

Sridhar Siricilla has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59690 ) Change subject: soc/intel/common: Update CSE components during recovery mode ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/59690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa23a54e4ab5d887482b6a7fa70d6d6f83d905c0 Gerrit-Change-Number: 59690 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/common: Update CSE components during recovery mode
by Sridhar Siricilla (Code Review) 26 Nov '21

26 Nov '21

Sridhar Siricilla has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/59690 ) Change subject: soc/intel/common: Update CSE components during recovery mode ...................................................................... Removed reviewer Patrick Rudolph. -- To view, visit https://review.coreboot.org/c/coreboot/+/59690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa23a54e4ab5d887482b6a7fa70d6d6f83d905c0 Gerrit-Change-Number: 59690 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: soc/intel/common: Rename compare_cse_version() function name
by Sridhar Siricilla (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Patrick Rudolph. Hello Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59689 to look at the new patch set (#2). Change subject: soc/intel/common: Rename compare_cse_version() function name ...................................................................... soc/intel/common: Rename compare_cse_version() function name The patch renames the compare_cse_version() function to cse_compare_partition_version(). It makes the function generic so that it can be used to check version of any CSE component like IOM, NPHY etc. TEST=Verified coreboot code build for Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I88a44a3c0ba2ad8a589602a35ea644dab535b287 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/59689/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59689 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88a44a3c0ba2ad8a589602a35ea644dab535b287 Gerrit-Change-Number: 59689 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/smmstore: Remove SMMSTORE_IN_CBFS
by Angel Pons (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Patrick Rudolph, Matt DeVillier, Julius Werner. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59680 ) Change subject: drivers/smmstore: Remove SMMSTORE_IN_CBFS ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59680 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0604a4ffd20b46774631d585925311b65d5a0e9 Gerrit-Change-Number: 59680 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 13:03:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Update CSE components during recovery mode
by build bot (Jenkins) (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59690 ) Change subject: soc/intel/common: Update CSE components during recovery mode ...................................................................... Patch Set 1: (3 comments) File src/soc/intel/common/block/cse/cse_lite.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134490): https://review.coreboot.org/c/coreboot/+/59690/comment/0b6a47ee_01c37ae7 PS1, Line 926: else { else should follow close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134490): https://review.coreboot.org/c/coreboot/+/59690/comment/2003e692_9b0ef3ae PS1, Line 939: if (sub_part_fw_update(&cse_bp_info.bp_info) == trailing whitespace Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-134490): https://review.coreboot.org/c/coreboot/+/59690/comment/103ab2d0_77044b77 PS1, Line 943: die (" ERROR: GLOBAL RESET Failed to reset the system\n"); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/59690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa23a54e4ab5d887482b6a7fa70d6d6f83d905c0 Gerrit-Change-Number: 59690 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 26 Nov 2021 13:01:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Update CSE components during recovery mode
by Sridhar Siricilla (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Patrick Rudolph. Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59690 ) Change subject: soc/intel/common: Update CSE components during recovery mode ...................................................................... soc/intel/common: Update CSE components during recovery mode The patch updates the CSE partitions during recovery mode. TEST=Verified on ADL-P RVP. Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: Ifa23a54e4ab5d887482b6a7fa70d6d6f83d905c0 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 31 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59690/1 diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 70f7cfa..4862c6b 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -900,7 +900,11 @@ { static struct get_bp_info_rsp cse_bp_info; - if (vboot_recovery_mode_enabled()) { + /* + * If system is in recovery mode, skip CSE Lite update if CSE sub-partition update + * is not enabled and continue to update CSE sub-partitions. + */ + if (vboot_recovery_mode_enabled() && !CONFIG(SOC_INTEL_CSE_SUB_PART_UPDATE)) { printk(BIOS_DEBUG, "cse_lite: Skip switching to RW in the recovery path\n"); return; } @@ -913,7 +917,32 @@ if (!cse_get_bp_info(&cse_bp_info)) { printk(BIOS_ERR, "cse_lite: Failed to get CSE boot partition info\n"); - cse_trigger_vboot_recovery(CSE_COMMUNICATION_ERROR); + + /* + * If system is in recovery mode, don't trigger recovery again */ + if (!vboot_recovery_mode_enabled) { + cse_trigger_vboot_recovery(CSE_COMMUNICATION_ERROR); + } + else { + printk(BIOS_ERR, + "cse_lite: System is already in Recovery Mode, so no action\n"); + return; + } + } + + /* + * If system is in recovery mode, CSE Lite update has to be skipped but CSE + * sub-partitions like NPHY and IOM have to to be updated. If CSE sub-parition update + * fails during recovery, just continue to boot. + */ + if (CONFIG(SOC_INTEL_CSE_SUB_PART_UPDATE) && vboot_recovery_mode_enabled()) { + if (sub_part_fw_update(&cse_bp_info.bp_info) == + CSE_LITE_SKU_PART_UPDATE_SUCCESS) { + cse_board_reset(); + do_global_reset(); + die (" ERROR: GLOBAL RESET Failed to reset the system\n"); + } + return; } if (!cse_fix_data_failure_err(&cse_bp_info.bp_info)) -- To view, visit https://review.coreboot.org/c/coreboot/+/59690 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa23a54e4ab5d887482b6a7fa70d6d6f83d905c0 Gerrit-Change-Number: 59690 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common: Rename compose_cse_version() function name
by Sridhar Siricilla (Code Review) 26 Nov '21

26 Nov '21

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59689 ) Change subject: soc/intel/common: Rename compose_cse_version() function name ...................................................................... soc/intel/common: Rename compose_cse_version() function name The patch renames the compare_cse_version() function to cse_compare_partition_version(). It makes the function generic so that it can be used to check version of any CSE component like IOM, NPHY etc. TEST=Verified coreboot code build for Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I88a44a3c0ba2ad8a589602a35ea644dab535b287 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/59689/1 diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 281d381..91c8f5c 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -502,7 +502,7 @@ * If ver_cmp_status < 0, coreboot downgrades CSE RW region * If ver_cmp_status > 0, coreboot upgrades CSE RW region */ -static int compare_cse_version(const struct fw_version *a, const struct fw_version *b) +static int cse_compare_partition_version(const struct fw_version *a, const struct fw_version *b) { if (a->major != b->major) return a->major - b->major; @@ -611,7 +611,7 @@ cbfs_unmap(version_str); - ret = compare_cse_version(&cbfs_rw_version, cse_get_rw_version(cse_bp_info)); + ret = cse_compare_partition_version(&cbfs_rw_version, cse_get_rw_version(cse_bp_info)); if (ret == 0) return CSE_UPDATE_NOT_REQUIRED; else if (ret < 0) -- To view, visit https://review.coreboot.org/c/coreboot/+/59689 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88a44a3c0ba2ad8a589602a35ea644dab535b287 Gerrit-Change-Number: 59689 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C
by Mark Hsieh (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Marco Chen, Zhuohao Lee, Felix Held. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59580 ) Change subject: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26d059a7ea5a3fdf00de260214c00d3bba9aa7f7 Gerrit-Change-Number: 59580 Gerrit-PatchSet: 7 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 26 Nov 2021 12:42:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C
by Mark Hsieh (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: YH Lin, Tim Wawrzynczak, Marco Chen, Zhuohao Lee, Felix Held. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Marco Chen, Zhuohao Lee, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59580 to look at the new patch set (#7). Change subject: mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C ...................................................................... mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C DVT schematic will exchange TPM_I2C3 to TPM_I2C1, that may need swap TPM I2C with touchscreen I2C to avoid TPM I2C fall on muxed ISH I2C, need change I2C map, sch amd GPIO map. b/196293623 BUG=207613972 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I26d059a7ea5a3fdf00de260214c00d3bba9aa7f7 --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/gimble/gpio.c M src/mainboard/google/brya/variants/gimble/overridetree.cb 3 files changed, 42 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/59580/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/59580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26d059a7ea5a3fdf00de260214c00d3bba9aa7f7 Gerrit-Change-Number: 59580 Gerrit-PatchSet: 7 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Will Tsai <will_tsai(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/mainboard/emulation/qemu-power9: require hb-mode=on
by Krystian Hebel (Code Review) 26 Nov '21

26 Nov '21

Attention is currently required from: Paul Menzel, Sergii Dmytruk, Timothy Pearson, Ron Minnich. Krystian Hebel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57082 ) Change subject: src/mainboard/emulation/qemu-power9: require hb-mode=on ...................................................................... Patch Set 16: (1 comment) File src/arch/ppc64/rom_media.c: https://review.coreboot.org/c/coreboot/+/57082/comment/8e16a566_266f6319 PS16, Line 6: MEM_REGION_DEV_RO_INIT(0x8000000, CONFIG_ROM_SIZE); To get more hardware-like experience, this should be at 0x00060300FC000000 (note that LPC base is defined in arch/io.h, maybe define an offset to flash there and include it here) and QEMU should be started with `-bios build/coreboot.rom --drive file=build/coreboot.rom,if=mtd`. `bios` is what is initially loaded to cache (HW) or RAM (QEMU) so technically passing just bootblock file would suffice, and `drive ...if=mtd` is what is mounted as flash device. Even though it complicates QEMU command line, it would allow to make more code shared between QEMU and real hardware in the future. One quirk is that QEMU always mounts it at the address mentioned above regardless of mounted file size, while hardware maps it so flash ends at 0x00060300FCFFFFFF. I don't know of any POWER9 platform that use different flash size than 64MB so it shouldn't matter. -- To view, visit https://review.coreboot.org/c/coreboot/+/57082 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bdc97a095bd46fccc862985b3bd24f4fa5bc054 Gerrit-Change-Number: 57082 Gerrit-PatchSet: 16 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Fri, 26 Nov 2021 12:33:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021