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Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59492 )
Change subject: libpayload: Add libpayload_boot_device_read function
......................................................................
Patch Set 2:
(1 comment)
File payloads/libpayload/libc/boot_device.c:
https://review.coreboot.org/c/coreboot/+/59492/comment/31b0c868_7b1aa035
PS1, Line 8: __attribute__((weak)) ssize_t libpayload_boot_device_read(void *buf, size_t offset, size_t size)
> Do we really want this? I think if a payload is using the new CBFS API, it can also be expected to p […]
Ok, I removed this implementation. Initially I wanted to have it to make old FMAP function behave correctly, but if we have a new one, then it is not necessary.
Ad. x86: Are you talking on implementing the libpayload_boot_device_read based on arch/x86/rom_media.c ?
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Change subject: mb/google/brya/var/brask: Set PL and PsysPL
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/brask/ramstage.c:
https://review.coreboot.org/c/coreboot/+/59576/comment/6875ba3a_c769755d
PS2, Line 41: 13.52A
> The Psys_pmax is just a SW setting which tells IMVP9. […]
Thanks Hou-Hsun for the explanation. Could Quanta please add this description to the comment?
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Hello build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Rizwan Qureshi, Sumeet R Pawnikar, Subrata Banik, Sridhar Siricilla, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/alderlake: Add the CnviDdrRfim configuration
......................................................................
soc/intel/alderlake: Add the CnviDdrRfim configuration
FSP v2422_01 introduced new FSPM UPD CnviDdrRfim. Add CnviDdrRfim
config to control the CnviDdrRfim UPD from devicetree. Setting
CnviDdrRfim to 1 enable CNVi DDR RFIM
BUG=b:201724512
BRANCH=None
TEST=Build and boot brya with debug FSP and verify CnviDdrRfim UPD value.
Change-Id: Ia06c9ed77d78821fd4724046bae2f31c9d771518
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/romstage/fsp_params.c
2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/58132/9
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Change subject: soc/intel/elkhartlake: Introduce Intel PSE
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Patch Set 58: Code-Review+2
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Change subject: mb/google/brya/var/brask: Set PL and PsysPL
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/brask/ramstage.c:
https://review.coreboot.org/c/coreboot/+/59576/comment/dfe91092_67d2e39d
PS2, Line 41: 13.52A
> This looks weird to me. The max current of the typec is 5A. […]
The Psys_pmax is just a SW setting which tells IMVP9.1 the mapping b/w system input current and the actual system power (There is no voltage info for IMVP9.1).
Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading, and the Psys_pmax setting is 270.4W.
Then IMVP9.1 can calculate the current system power = 270.4W * 5A / 13.52A = 100W, which is the actual system power.
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Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time
......................................................................
Patch Set 29:
(3 comments)
File src/arch/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/51671/comment/f89e5e28_64f3afc7
PS27, Line 355: present
> nit: Missing a period
Done
File src/arch/x86/bootblock.ld:
https://review.coreboot.org/c/coreboot/+/51671/comment/9a944e81_9febcc42
PS27, Line 57: _ID_SECTION_END = SIZEOF(.ecfw_ptr) && SIZEOF(.id) > _ID_SECTION_END - _ECFW_PTR ? _ECFW_PTR : _ID_SECTION_END;
> Reposting my CB:51059 comment about this: […]
Done. As Arthur stated in CB:51059, _ID_SECTION_END is fixed at either 0xffffff80 or _X86_RESET_VECTOR, overlapping is left for the linker to detect.
File src/ec/hp/kbc1126/Kconfig:
https://review.coreboot.org/c/coreboot/+/51671/comment/25f3e22c_94b850eb
PS27, Line 30: if KBC1126_FIRMWARE
> > I'd much prefer to always add the `. […]
Done as Arthur recommended.
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