coreboot-gerrit October 2021

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Change in coreboot[master]: soc/amd/common/block/espi_util: Refactor ESPI Setup
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58114 to look at the new patch set (#4). Change subject: soc/amd/common/block/espi_util: Refactor ESPI Setup ...................................................................... soc/amd/common/block/espi_util: Refactor ESPI Setup ESPI is setup in two different locations in bootblock depending on early port80 routing configuration. Also ESPI is setup in PSP, if verified boot starts before bootblock. Consolidate all the scenarios by initializating ESPI very early in fch_pre_init if verified boot starts after bootblock and ESPI is enabled. BUG=None TEST=Build and boot to OS in Guybrush. Perform S5->S0, G3->S0, warm reset and suspend/resume cycles for 50 iterations each. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: Icfeba17dae0a964c9ca73686e29c18d965589934 --- M src/soc/amd/cezanne/bootblock.c M src/soc/amd/cezanne/early_fch.c M src/soc/amd/cezanne/include/soc/southbridge.h M src/soc/amd/common/block/include/amdblocks/espi.h M src/soc/amd/common/block/lpc/espi_util.c M src/soc/amd/picasso/early_fch.c 6 files changed, 19 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/58114/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfeba17dae0a964c9ca73686e29c18d965589934 Gerrit-Change-Number: 58114 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Felix Held. Karthik Ramasubramanian has uploaded a new patch set (#3) to the change originally created by Felix Held. ( https://review.coreboot.org/c/coreboot/+/57782 ) Change subject: soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init ...................................................................... soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init Since the GPIO mux/control MMIO regions are within the ACPIMMIO region, we need to call enable_acpimmio_decode_pm04 here first so that accessing the GPIO registers will work. BUG=None TEST=Build and boot to OS in Guybrush. Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/amd/cezanne/early_fch.c M src/soc/amd/picasso/early_fch.c 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/57782/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Gerrit-Change-Number: 57782 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/cse_serger: Add a new tool for stitching CSE components
by build bot (Jenkins) (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Cliff Huang, Martin Roth, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Bernardo Perez Priego, Andrew McRae. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55503 ) Change subject: util/cse_serger: Add a new tool for stitching CSE components ...................................................................... Patch Set 25: (2 comments) File util/cbfstool/cse_serger.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130230): https://review.coreboot.org/c/coreboot/+/55503/comment/88838a6e_05c185a5 PS25, Line 272: ERROR("Part(%d) exceeds file size. Part offset=0x%x, Part size = 0x%x, File size = 0x%zx\n", line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-130230): https://review.coreboot.org/c/coreboot/+/55503/comment/086884ac_d3d4880b PS25, Line 920: if (c < LONGOPT_START) { braces {} are not necessary for any arm of this statement -- To view, visit https://review.coreboot.org/c/coreboot/+/55503 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90dd809b47fd16afdc80e66431312721082496aa Gerrit-Change-Number: 55503 Gerrit-PatchSet: 25 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Andrew McRae <amcrae(a)google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.corp-partner.google.com> Gerrit-Attention: Andrew McRae <amcrae(a)google.com> Gerrit-Comment-Date: Tue, 12 Oct 2021 06:57:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Enable ACPIMMIO decode first in fch_pre_init
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57782 ) Change subject: mb/google/guybrush: Enable ACPIMMIO decode first in fch_pre_init ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/guybrush/bootblock.c: https://review.coreboot.org/c/coreboot/+/57782/comment/8e41dac8_eb0906de PS1, Line 30: enable_acpimmio_decode_pm04 > CB:58114 with the comment i added there should properly solve this issue and make this patch obsolet […] With ESPI setup refactoring, I have moved it back to enabling ACPIMMIO Decode as the first thing in fch_pre_init. -- To view, visit https://review.coreboot.org/c/coreboot/+/57782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Gerrit-Change-Number: 57782 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 12 Oct 2021 06:55:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Override SPI Fast speeds
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Felix Held. Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58117 to look at the new patch set (#4). Change subject: mb/google/guybrush: Override SPI Fast speeds ...................................................................... mb/google/guybrush: Override SPI Fast speeds Add support to override SPI fast speeds based on board version from both bootblock and verstage. Overrides apply for Guybrush only and SPI speed is overridden from 66 MHz to 100 MHz starting board version 4. This will help to improve the boot time on board version by ~60 ms and still allow the old boards to boot with 66 MHz. BUG=b:199779306 TEST=Build and boot to OS in Guybrush. Perform S5->S0, G3->S0, warm reset and suspend/resume cycles for 50 iterations each. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I5bf03ab8772f27aca346589e9c5662caf014d0d2 --- M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/guybrush/bootblock.c M src/mainboard/google/guybrush/verstage.c 3 files changed, 37 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/58117/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bf03ab8772f27aca346589e9c5662caf014d0d2 Gerrit-Change-Number: 58117 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common/block/lpc: Refactor ESPI Setup
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58114 to look at the new patch set (#3). Change subject: soc/amd/common/block/lpc: Refactor ESPI Setup ...................................................................... soc/amd/common/block/lpc: Refactor ESPI Setup ESPI is setup in two different locations in bootblock depending on early port80 routing configuration. Also ESPI is setup in PSP, if verified boot starts before bootblock. Consolidate all the scenarios by initializating ESPI as part of lpc_early_init if verified boot starts after bootblock and ESPI is enabled. BUG=None TEST=Build and boot to OS in Guybrush. Perform S5->S0, G3->S0, warm reset and suspend/resume cycles for 50 iterations each. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: Icfeba17dae0a964c9ca73686e29c18d965589934 --- M src/soc/amd/cezanne/bootblock.c M src/soc/amd/cezanne/early_fch.c M src/soc/amd/cezanne/include/soc/southbridge.h M src/soc/amd/common/block/include/amdblocks/espi.h M src/soc/amd/common/block/lpc/espi_util.c M src/soc/amd/picasso/early_fch.c 6 files changed, 19 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/58114/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/58114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfeba17dae0a964c9ca73686e29c18d965589934 Gerrit-Change-Number: 58114 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Enable ACPIMMIO decode first in fch_pre_init
by Karthik Ramasubramanian (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Raul Rangel, Martin Roth, Karthik Ramasubramanian. Karthik Ramasubramanian has uploaded a new patch set (#2) to the change originally created by Felix Held. ( https://review.coreboot.org/c/coreboot/+/57782 ) Change subject: mb/google/guybrush: Enable ACPIMMIO decode first in fch_pre_init ...................................................................... mb/google/guybrush: Enable ACPIMMIO decode first in fch_pre_init Since the GPIO mux/control MMIO regions are within the ACPIMMIO region, we need to call enable_acpimmio_decode_pm04 here first so that accessing the GPIO registers will work. BUG=None TEST=Build and boot to OS in Guybrush. Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/amd/cezanne/early_fch.c M src/soc/amd/picasso/early_fch.c 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/57782/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Gerrit-Change-Number: 57782 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/sasukette: Enable PIXA touchpad
by Zhi7 Li (Code Review) 12 Oct '21

12 Oct '21

Zhi7 Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58239 ) Change subject: mb/google/dedede/var/sasukette: Enable PIXA touchpad ...................................................................... mb/google/dedede/var/sasukette: Enable PIXA touchpad Add PIXA touchpad into devicetree for sasukette. BUG=b:202796169 BRANCH=dedede TEST=built sasukette firmware and verified touchpad function Signed-off-by: Zhi Li <lizhi7(a)huaqin.corp-partner.google.com> Change-Id: I5bc8353692a753ec9254ab02b4ff0481386624b2 --- M src/mainboard/google/dedede/variants/sasukette/overridetree.cb 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/58239/1 diff --git a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb index 8a87462..4d50783 100644 --- a/src/mainboard/google/dedede/variants/sasukette/overridetree.cb +++ b/src/mainboard/google/dedede/variants/sasukette/overridetree.cb @@ -181,6 +181,15 @@ register "hid_desc_reg_offset" = "0x20" device i2c 2a on end end + chip drivers/i2c/hid + register "generic.hid" = ""PIXA2635"" + register "generic.desc" = ""PIXA Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B3_IRQ)" + register "generic.wake" = "GPE0_DW0_03" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2d on end + end chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" -- To view, visit https://review.coreboot.org/c/coreboot/+/58239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bc8353692a753ec9254ab02b4ff0481386624b2 Gerrit-Change-Number: 58239 Gerrit-PatchSet: 1 Gerrit-Owner: Zhi7 Li <lizhi7(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/cse_serger: Add command `create-cse-region`
by Furquan Shaikh (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Bernardo Perez Priego. Hello build bot (Jenkins), Tim Wawrzynczak, Bernardo Perez Priego, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58215 to look at the new patch set (#4). Change subject: util/cse_serger: Add command `create-cse-region` ...................................................................... util/cse_serger: Add command `create-cse-region` This change adds a new command `create-cse-region` to cse_serger tool which takes as inputs offset:size and file for different CSE partitions and generates the entire CSE region image. BUG=b:189177186 Change-Id: Ib087f5516e5beb6390831ef4e34b0b067d3fbc8b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M util/cbfstool/cse_serger.c 1 file changed, 99 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/58215/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58215 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib087f5516e5beb6390831ef4e34b0b067d3fbc8b Gerrit-Change-Number: 58215 Gerrit-PatchSet: 4 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Enable support for CSE stitching
by Furquan Shaikh (Code Review) 12 Oct '21

12 Oct '21

Attention is currently required from: Cliff Huang, Sridhar Siricilla, Bernardo Perez Priego, Patrick Rudolph. Hello build bot (Jenkins), Cliff Huang, Tim Wawrzynczak, Sridhar Siricilla, Bernardo Perez Priego, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58125 to look at the new patch set (#18). Change subject: soc/intel/alderlake: Enable support for CSE stitching ...................................................................... soc/intel/alderlake: Enable support for CSE stitching This change enables support for stitching of BP1 and BP2 partitions for CSE. This currently mimics what Intel FIT tool does w.r.t. adding different components to the different partitions. BP1: * Dummy components: DLMP, IFPP, SBDT, UFSP, UFSG, OEMP. * Decomposed components from CSE FPT file: RBEP, MFTP. * Input components: PMCP, IOMP, NPHY, TBTP, PCHC. BP2: * Dummy components: DLMP, IFPP, SBDT, UFSP, UFSG, OEMP, ISHP. * Decomposed components from CSE FPT file: RBEP, FTPR, NFTP. * Input components: PMCP, IOMP, NPHY, TBTP, PCHC, IUNP. BUG=b:189177580,b:189177538 Change-Id: I2b14405aab2a4919431d9c16bc7ff2eb1abf1f6b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/Makefile.inc 2 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/58125/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/58125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b14405aab2a4919431d9c16bc7ff2eb1abf1f6b Gerrit-Change-Number: 58125 Gerrit-PatchSet: 18 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2021