Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48775 )
Change subject: {soc,vc,mb}/intel: Remove support for Cannon Lake SoC
......................................................................
Patch Set 10: Code-Review-1
What's the downsite to have this in the tree? Skylake-SP FSP Binaries are also not available publicly (and most likely never will) - however this should also stay in the tree. I am a friend of having broad support here.
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Change subject: device/pnp,util/sconfig: introduce and use `REG8` resource type
......................................................................
Patch Set 8:
> Patch Set 8:
>
> since MSC0-MSCE only cover a few possible registers that might need to be written, I don't see much reason to have special cases for MSC0-MSCE. not sure if the sio driver providing a mask of possible writable registers provides any value, it might however create some confusion that some register writes have some special handling in the sio driver and some not
that's what I actually mean, yes. there's no mask, we would need to implement/define them all
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48925 )
Change subject: device/pnp,util/sconfig: introduce and use `REG8` resource type
......................................................................
Patch Set 8:
since MSC0-MSCE only cover a few possible registers that might need to be written, I don't see much reason to have special cases for MSC0-MSCE. not sure if the sio driver providing a mask of possible writable registers provides any value, it might however create some confusion that some register writes have some special handling in the sio driver and some not
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49054 )
Change subject: drivers/intel/gma: add macro for one internal panel in gfx struct
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/49054/1/src/drivers/intel/gma/gma.h
File src/drivers/intel/gma/gma.h:
https://review.coreboot.org/c/coreboot/+/49054/1/src/drivers/intel/gma/gma.…
PS1, Line 33: at port A
Actually, I'm not sure if/how Intel really uses the port encoding.
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Change subject: drivers/intel/gma: add macro for one internal panel in gfx struct
......................................................................
Patch Set 1: Code-Review+2
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48713 )
Change subject: soc/intel/tigerlake: Hook up FSP repository
......................................................................
Patch Set 7:
> > I can only give a +1 because there's a Tigerlake UP3 reference board in the tree, which would need the IOT version of FSP.
> >
> > For reference, UP3: IOT, UP4: Client.
>
> Oh, yes. Thanks! I am not sure if UP4 is the Client version (the FSP repo doesn't mention UP4 anywhere), but some news sites are saying so.
>
> So I would just add another Kconfig option for differentiation UP3 / UP4.
>
> What should I use for the extension? UP3 / UP4 or IOT / CLIENT?
_IOT vs _CLIENT sounds good.
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48970 )
Change subject: MAINTAINERS: Add maintainer for ACPI
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Patch Set 4: Code-Review+1
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49054 )
Change subject: drivers/intel/gma: add macro for one internal panel in gfx struct
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/49054/1/src/drivers/intel/gma/gma.h
File src/drivers/intel/gma/gma.h:
https://review.coreboot.org/c/coreboot/+/49054/1/src/drivers/intel/gma/gma.…
PS1, Line 33: /* Shortcut for one internal panel at port A */
> it doesn't; 4 means 'Internal/Integrated Digital Flat Panel' (from ACPI 6. […]
Ah, well
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48750 )
Change subject: mb/clevo/l140cu: add panel settings to the dt and hook up GMA ACPI
......................................................................
Patch Set 39:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48750/39//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/48750/39//COMMIT_MSG@15
PS39, Line 15: Test: Panel gets enabled when the payload starts on Clevo L141CU.
for unknown reasons this suddenly stopped working... need to debug this.
some abstract art: https://paste.xinu.at/jLQkqYJJgm0dgu8nJ/
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48750 )
Change subject: mb/clevo/l140cu: add panel settings to the dt and hook up GMA ACPI
......................................................................
Patch Set 39:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48750/34//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/48750/34//COMMIT_MSG@12
PS34, Line 12: Brightness control still requires ACPI code to link the EC events to it.
: This will be done in a separate change later.
> I'm confused. […]
Keyboard events come from the ec; they need to be recognized as brightness keys by the os, which requires EC ACPI code
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