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Change in coreboot[master]: [WIP] sb,soc/intel: Consolidate set_acpi_mode()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41987 ) Change subject: [WIP] sb,soc/intel: Consolidate set_acpi_mode() ...................................................................... [WIP] sb,soc/intel: Consolidate set_acpi_mode() Change-Id: I50bdce6a8e9043b209c5558b5ab613f945b4b787 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/smm/smi_trigger.c M src/include/cpu/x86/smm.h M src/soc/intel/apollolake/pmc.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/cannonlake/pmc.c M src/soc/intel/common/block/include/intelblocks/pmc.h M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/denverton_ns/pmc.c M src/soc/intel/icelake/pmc.c M src/soc/intel/jasperlake/pmc.c M src/soc/intel/skylake/pmc.c M src/soc/intel/tigerlake/pmc.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 18 files changed, 26 insertions(+), 84 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/41987/1 diff --git a/src/cpu/x86/smm/smi_trigger.c b/src/cpu/x86/smm/smi_trigger.c index f0a968d..586d3ce 100644 --- a/src/cpu/x86/smm/smi_trigger.c +++ b/src/cpu/x86/smm/smi_trigger.c @@ -4,6 +4,15 @@ #include <console/console.h> #include <cpu/x86/smm.h> +void set_acpi_mode_on_exit(void) +{ + if (acpi_disable_sci_on_exit()) { + apm_control(APM_CNT_ACPI_DISABLE); + } else { + apm_control(APM_CNT_ACPI_ENABLE); + } +} + int apm_control(u8 cmd) { if (!CONFIG(HAVE_SMI_HANDLER)) diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 4fdf58f..d71414f 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -31,6 +31,7 @@ /* Send cmd to APM_CNT with HAVE_SMI_HANDLER checking. */ int apm_control(u8 cmd); +void set_acpi_mode_on_exit(void); void io_trap_handler(int smif); int southbridge_io_trap_handler(int smif); diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c index 2eb8f11..0a4dcfb 100644 --- a/src/soc/intel/apollolake/pmc.c +++ b/src/soc/intel/apollolake/pmc.c @@ -96,7 +96,7 @@ /* Set up GPE configuration */ pmc_gpe_init(); - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); if (cfg != NULL) set_slp_s3_assertion_width(cfg->slp_s3_assertion_width_usecs); diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index b841291..1dbd4dd 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -407,13 +407,6 @@ pch_iobp_update(0xCE00C000, ~1UL, 0x00000000); } -static void pch_set_acpi_mode(void) -{ - if (!acpi_is_wakeup_s3()) { - apm_control(APM_CNT_ACPI_DISABLE); - } -} - static void lpc_init(struct device *dev) { /* Legacy initialization */ @@ -433,7 +426,7 @@ pch_pm_init(dev); pch_cg_init(dev); - pch_set_acpi_mode(); + set_acpi_mode_on_exit(); } static void pch_lpc_add_mmio_resources(struct device *dev) diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index e1b56e9..c2971bc 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -112,7 +112,7 @@ { /* * PMC initialization happens earlier for this SoC because FSP-Silicon - * init hides PMC from PCI bus. However, pmc_set_acpi_mode, which + * init hides PMC from PCI bus. However, set_acpi_mode_on_exit, which * disables ACPI mode doesn't need to happen that early and can be * delayed till typical BS_DEV_INIT. This ensures that ACPI mode * disabling happens the same way for all SoCs and hence the ordering of @@ -127,7 +127,7 @@ * hidden and hence the PMC driver never gets enumerated and so init is * not called for it. */ - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); } BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, soc_acpi_mode_init, NULL); diff --git a/src/soc/intel/common/block/include/intelblocks/pmc.h b/src/soc/intel/common/block/include/intelblocks/pmc.h index 75e2127..7625a63 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmc.h +++ b/src/soc/intel/common/block/include/intelblocks/pmc.h @@ -49,7 +49,7 @@ int pmc_soc_get_resources(struct pmc_resource_config *cfg); /* API to set ACPI mode */ -void pmc_set_acpi_mode(void); +void set_acpi_mode_on_exit(void); /* * Returns a reference to the PMC MUX device for the given port number. diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index 7d25493..7979bfd 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -91,13 +91,6 @@ pch_pmc_add_io_resources(dev, config); } -void pmc_set_acpi_mode(void) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } -} - static struct device_operations device_ops = { .read_resources = pch_pmc_read_resources, .set_resources = pci_dev_set_resources, diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c index 3d84a0b..5a79764 100644 --- a/src/soc/intel/denverton_ns/pmc.c +++ b/src/soc/intel/denverton_ns/pmc.c @@ -22,13 +22,6 @@ static void pch_power_options(struct device *dev) { /* TODO */ } -static void pch_set_acpi_mode(void) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } -} - static void pmc_init(struct device *dev) { printk(BIOS_DEBUG, "pch: pmc_init\n"); @@ -46,7 +39,7 @@ pch_power_options(dev); /* Configure ACPI mode. */ - pch_set_acpi_mode(); + set_acpi_mode_on_exit(); } static void pci_pmc_read_resources(struct device *dev) diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index 5bd4438..d654c32 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -78,7 +78,7 @@ pmc_set_power_failure_state(true); pmc_gpe_init(); - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc); config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc); diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c index 5bd4438..d654c32 100644 --- a/src/soc/intel/jasperlake/pmc.c +++ b/src/soc/intel/jasperlake/pmc.c @@ -78,7 +78,7 @@ pmc_set_power_failure_state(true); pmc_gpe_init(); - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc); config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc); diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 14e9d4c..92a67d0 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -140,7 +140,7 @@ /* Note that certain bits may be cleared from running script as * certain bit fields are write 1 to clear. */ reg_script_run_on_dev(dev, pch_pmc_misc_init_script); - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc); config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc); diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c index 84a18e3..9c3c6a4 100644 --- a/src/soc/intel/tigerlake/pmc.c +++ b/src/soc/intel/tigerlake/pmc.c @@ -78,7 +78,7 @@ pmc_set_power_failure_state(true); pmc_gpe_init(); - pmc_set_acpi_mode(); + set_acpi_mode_on_exit(); config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc); config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc); diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index c3e79a4..7bfde3f 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -406,13 +406,6 @@ RCBA32_OR(0x3564, 0x3); } -static void pch_set_acpi_mode(void) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } -} - static void pch_disable_smm_only_flashing(struct device *dev) { u8 reg8; @@ -578,7 +571,7 @@ pch_disable_smm_only_flashing(dev); - pch_set_acpi_mode(); + set_acpi_mode_on_exit(); pch_fixups(dev); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 42e856d..4231cc7 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -316,15 +316,6 @@ RCBA32(CG) = reg32; } -static void i82801gx_set_acpi_mode(struct device *dev) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } else { - apm_control(APM_CNT_ACPI_ENABLE); - } -} - #define SPIBASE 0x3020 static void i82801gx_spi_init(void) { @@ -389,7 +380,7 @@ /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); - i82801gx_set_acpi_mode(dev); + set_acpi_mode_on_exit(); i82801gx_spi_init(); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index eeff94a..5e30a0e 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -350,15 +350,6 @@ RCBA32(0x38c0) |= 7; } -static void i82801ix_set_acpi_mode(struct device *dev) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } else { - apm_control(APM_CNT_ACPI_ENABLE); - } -} - static void lpc_init(struct device *dev) { printk(BIOS_DEBUG, "i82801ix: %s\n", __func__); @@ -399,7 +390,7 @@ /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); - i82801ix_set_acpi_mode(dev); + set_acpi_mode_on_exit(); /* Don't allow evil boot loaders, kernels, or * userspace applications to deceive us: diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 5bb69e3..7fd0954 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -355,15 +355,6 @@ RCBA32(0x38c0) |= 7; } -static void i82801jx_set_acpi_mode(struct device *dev) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } else { - apm_control(APM_CNT_ACPI_ENABLE); - } -} - static void lpc_init(struct device *dev) { printk(BIOS_DEBUG, "i82801jx: %s\n", __func__); @@ -404,7 +395,7 @@ /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); - i82801jx_set_acpi_mode(dev); + set_acpi_mode_on_exit(); } unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 1a05eff..9a115f7 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -410,13 +410,6 @@ RCBA32_OR(0x3564, 0x3); } -static void pch_set_acpi_mode(void) -{ - if (acpi_disable_sci_on_exit()) { - apm_control(APM_CNT_ACPI_DISABLE); - } -} - static void pch_disable_smm_only_flashing(struct device *dev) { u8 reg8; @@ -481,7 +474,7 @@ pch_disable_smm_only_flashing(dev); - pch_set_acpi_mode(); + set_acpi_mode_on_exit(); pch_fixups(dev); } diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 2d5b6f6..d3a066e 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -471,12 +471,6 @@ pch_iobp_update(0xCE00C000, ~1UL, 0x00000000); // bit0=0 in BWG 1.4.0 } -static void pch_set_acpi_mode(void) -{ - if (acpi_disable_sci_on_exit()) - apm_control(APM_CNT_ACPI_DISABLE); -} - static void pch_disable_smm_only_flashing(struct device *dev) { u8 reg8; @@ -547,7 +541,7 @@ pch_disable_smm_only_flashing(dev); - pch_set_acpi_mode(); + set_acpi_mode_on_exit(); pch_fixups(dev); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50bdce6a8e9043b209c5558b5ab613f945b4b787 Gerrit-Change-Number: 41987 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

2 7

Change in coreboot[master]: ACPI: Add default_inject_dsdt()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42927 ) Change subject: ACPI: Add default_inject_dsdt() ...................................................................... ACPI: Add default_inject_dsdt() Change-Id: I61a9b07ec3fdaeef0622df82e106405f01e89a9e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/gnvs.c M src/include/acpi/acpi_gnvs.h M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/include/soc/acpi.h M src/soc/intel/braswell/southcluster.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/include/soc/acpi.h M src/soc/intel/denverton_ns/lpc.c M src/soc/intel/skylake/acpi.c M src/soc/intel/xeon_sp/cpx/acpi.c M src/soc/intel/xeon_sp/skx/acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 20 files changed, 14 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/42927/1 diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index 671afbd..e8f1cec 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -63,7 +63,7 @@ return gnvs; } -void acpi_inject_nvsa(void) +void default_inject_dsdt(const struct device *device) { if (!gnvs) return; diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index 1a4813a..b8e2a37 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -7,7 +7,6 @@ void *acpi_get_gnvs(void); void *gnvs_get_or_create(void); -void acpi_inject_nvsa(void); void gnvs_assign_chromeos(void); @@ -16,12 +15,8 @@ uint32_t *gnvs_cbmc_ptr(void); void *gnvs_chromeos_ptr(void); -/* - * Creates acpi gnvs and adds it to the DSDT table. - * GNVS creation is chipset specific and is done in soc specific acpi.c file. - */ struct device; -void southbridge_inject_dsdt(const struct device *device); +void default_inject_dsdt(const struct device *device); /* * This function populates the gnvs structure in acpi table. diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 75eacd2..9147289 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -480,15 +480,10 @@ } } -static void southcluster_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, - .acpi_inject_dsdt = southcluster_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 065c37a..7743b72 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -479,11 +479,6 @@ return current; } -void southcluster_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - __weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) { } diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h index cd54f2c..32f034c 100644 --- a/src/soc/intel/braswell/include/soc/acpi.h +++ b/src/soc/intel/braswell/include/soc/acpi.h @@ -8,7 +8,6 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt); unsigned long acpi_madt_irq_overrides(unsigned long current); -void southcluster_inject_dsdt(const struct device *device); unsigned long southcluster_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index 094e1c2..ca6b76c 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -557,7 +557,7 @@ static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, - .acpi_inject_dsdt = southcluster_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = southcluster_write_acpi_tables, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index cf5d0fb..928dbba 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -563,11 +563,6 @@ pch_lpc_add_io_resources(dev); } -static void southcluster_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - static unsigned long broadwell_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp) @@ -584,7 +579,7 @@ .read_resources = &pch_lpc_read_resources, .set_resources = &pci_dev_set_resources, .enable_resources = &pci_dev_enable_resources, - .acpi_inject_dsdt = southcluster_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = broadwell_write_acpi_tables, .init = &lpc_init, .scan_bus = &scan_static_bus, diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 3e4418e..5d0d191 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -222,11 +222,6 @@ } #endif -void southbridge_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - static int calculate_power(int tdp, int p1_ratio, int ratio) { u32 m; diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 7c0a846..f67efa2 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -274,9 +274,4 @@ return current; } -void southcluster_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - __weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {} diff --git a/src/soc/intel/denverton_ns/include/soc/acpi.h b/src/soc/intel/denverton_ns/include/soc/acpi.h index 9bc5ed0..1b2726e 100644 --- a/src/soc/intel/denverton_ns/include/soc/acpi.h +++ b/src/soc/intel/denverton_ns/include/soc/acpi.h @@ -11,6 +11,5 @@ unsigned long southcluster_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); -void southcluster_inject_dsdt(const struct device *device); #endif /* _DENVERTON_NS_ACPI_H_ */ diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c index 228e0f6..dfa45d9 100644 --- a/src/soc/intel/denverton_ns/lpc.c +++ b/src/soc/intel/denverton_ns/lpc.c @@ -537,7 +537,7 @@ .read_resources = lpc_read_resources, .set_resources = pci_dev_set_resources, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_inject_dsdt = southcluster_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = southcluster_write_acpi_tables, #endif .enable_resources = lpc_enable_resources, diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 43a2371..b9719d5 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -624,11 +624,6 @@ return acpi_align_current(current); } -void southbridge_inject_dsdt(const struct device *device) -{ - acpi_inject_nvsa(); -} - /* Save wake source information for calculating ACPI _SWS values */ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) { diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index 6d0d062..d55dcb8 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -108,7 +108,7 @@ void southbridge_inject_dsdt(const struct device *device) { - acpi_inject_nvsa(); + default_inject_dsdt(device); /* Add IIOStack ACPI Resource Templates */ uncore_inject_dsdt(); diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index 89d3b7c..5d32656 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -954,7 +954,7 @@ void southbridge_inject_dsdt(const struct device *device) { - acpi_inject_nvsa(); + default_inject_dsdt(device); // Add IIOStack ACPI Resource Templates uncore_inject_dsdt(); diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 1f13b89..4e12127 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -654,11 +654,6 @@ gnvs->pcnt = dev_count_cpu(); } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - void acpi_fill_fadt(acpi_fadt_t *fadt) { struct device *dev = pcidev_on_root(0x1f, 0); @@ -835,7 +830,7 @@ .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .write_acpi_tables = acpi_write_hpet, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .init = lpc_init, diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 14c1579..9e1fd88 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -615,11 +615,6 @@ gnvs->mpen = 1; /* Enable Multi Processing */ } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; @@ -634,7 +629,7 @@ .read_resources = i82801gx_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 485aaef..ebe41ec 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -455,11 +455,6 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; @@ -478,7 +473,7 @@ .read_resources = i82801ix_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index adacc4d..037b99b 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -614,11 +614,6 @@ } } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; @@ -637,7 +632,7 @@ .read_resources = i82801jx_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 3b67463..07114e1 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -559,11 +559,6 @@ gnvs->pcnt = dev_count_cpu(); } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - void acpi_fill_fadt(acpi_fadt_t *fadt) { struct device *dev = pcidev_on_root(0x1f, 0); @@ -721,7 +716,7 @@ .read_resources = pch_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .write_acpi_tables = acpi_write_hpet, diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index fe19650..a526390 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -695,11 +695,6 @@ gnvs->pcnt = dev_count_cpu(); } -void southbridge_inject_dsdt(const struct device *dev) -{ - acpi_inject_nvsa(); -} - void acpi_fill_fadt(acpi_fadt_t *fadt) { struct device *dev = pcidev_on_root(0x1f, 0); @@ -898,7 +893,7 @@ .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .acpi_fill_ssdt = southbridge_fill_ssdt, - .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_inject_dsdt = default_inject_dsdt, .acpi_name = lpc_acpi_name, .write_acpi_tables = southbridge_write_acpi_tables, .init = lpc_init, -- To view, visit https://review.coreboot.org/c/coreboot/+/42927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I61a9b07ec3fdaeef0622df82e106405f01e89a9e Gerrit-Change-Number: 42927 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: ACPI: Call mainboard_fill_gnvs() early
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42926 ) Change subject: ACPI: Call mainboard_fill_gnvs() early ...................................................................... ACPI: Call mainboard_fill_gnvs() early Change-Id: I515e830808a95eee3ce72b16fd26da6ec79dac85 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/gnvs.c M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/skylake/acpi.c M src/soc/intel/xeon_sp/cpx/acpi.c M src/soc/intel/xeon_sp/skx/acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 15 files changed, 3 insertions(+), 86 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/42926/1 diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index b5f2ad2..671afbd 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -57,6 +57,9 @@ if (CONFIG(CHROMEOS)) gnvs_assign_chromeos(); + soc_fill_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); + return gnvs; } diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 3ad0d271..75eacd2 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -482,13 +482,6 @@ static void southcluster_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 7bd895c..065c37a 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -481,13 +481,6 @@ void southcluster_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 34aa9d2..cf5d0fb 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -565,12 +565,6 @@ static void southcluster_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 6b35e69..3e4418e 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -224,13 +224,6 @@ void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index ef10d77..7c0a846 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -276,12 +276,6 @@ void southcluster_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 99c053c..43a2371 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -626,11 +626,6 @@ void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index 6274029..6d0d062 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -108,11 +108,6 @@ void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); acpi_inject_nvsa(); /* Add IIOStack ACPI Resource Templates */ diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index e107cf8..89d3b7c 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -954,12 +954,6 @@ void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); // Add IIOStack ACPI Resource Templates diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 6b0ad83..1f13b89 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -656,13 +656,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index c39820a..14c1579 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -617,12 +617,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 9f9058f..485aaef 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -457,11 +457,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index e2462c7..adacc4d 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -616,11 +616,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 8e32f78..3b67463 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -561,13 +561,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index ead33ce..fe19650 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -697,13 +697,6 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - if (!gnvs) - return; - - soc_fill_gnvs(gnvs); - mainboard_fill_gnvs(gnvs); - acpi_inject_nvsa(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/42926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I515e830808a95eee3ce72b16fd26da6ec79dac85 Gerrit-Change-Number: 42926 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: soc/intel: Rename to soc_fill_gnvs()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42925 ) Change subject: soc/intel: Rename to soc_fill_gnvs() ...................................................................... soc/intel: Rename to soc_fill_gnvs() Replace acpi_create_gnvs() under soc/ to reflect their changed funcionality. Change-Id: I7bdbe0d6f795252e713e9785ada2b6320e6604b9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/apollolake/acpi.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/icelake/acpi.c M src/soc/intel/jasperlake/acpi.c M src/soc/intel/skylake/acpi.c M src/soc/intel/tigerlake/acpi.c M src/soc/intel/xeon_sp/cpx/acpi.c 8 files changed, 12 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/42925/1 diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index c30da13..396b67c 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -71,7 +71,7 @@ return cstate_map; } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { struct soc_intel_apollolake_config *cfg; cfg = config_of_soc(); diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 31b5a51..7f7c445 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -181,7 +181,7 @@ return read32((void *)pmc_bar + IRQ_REG); } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { const struct soc_intel_cannonlake_config *config; config = config_of_soc(); diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 6a18c07..6b35e69 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -222,17 +222,15 @@ } #endif -__weak void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} - void southbridge_inject_dsdt(const struct device *device) { struct global_nvs *gnvs = acpi_get_gnvs(); if (!gnvs) return; - acpi_create_gnvs(gnvs); + soc_fill_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); + acpi_inject_nvsa(); } diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 5008d09..f7d00b3 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -177,7 +177,7 @@ return read32((void *)pmc_bar + IRQ_REG); } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { config_t *config = config_of_soc(); diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index 1c783a2..b22cb9b 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -272,7 +272,7 @@ return current; } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { config_t *config = config_of_soc(); diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 9c5661a..99c053c 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -154,7 +154,7 @@ return cores; } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { const struct soc_intel_skylake_config *config = config_of_soc(); @@ -630,7 +630,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + soc_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 8228b1c..0da96b8 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -272,7 +272,7 @@ return current; } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { config_t *config = config_of_soc(); diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index 88181f7..6274029 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -112,14 +112,14 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + soc_fill_gnvs(gnvs); acpi_inject_nvsa(); /* Add IIOStack ACPI Resource Templates */ uncore_inject_dsdt(); } -void acpi_create_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* CPU core count */ gnvs->pcnt = dev_count_cpu(); -- To view, visit https://review.coreboot.org/c/coreboot/+/42925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7bdbe0d6f795252e713e9785ada2b6320e6604b9 Gerrit-Change-Number: 42925 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

1 2

Change in coreboot[master]: soc/intel: Replace acpi_init_gnvs()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42924 ) Change subject: soc/intel: Replace acpi_init_gnvs() ...................................................................... soc/intel: Replace acpi_init_gnvs() Rename these to soc_fill_gnvs() and move the callsite away from mb/. Change-Id: I760c36f65c6122103f2be98fc11ee13832c2772e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/include/acpi/acpi_gnvs.h M src/mainboard/facebook/fbg1701/acpi_tables.c M src/mainboard/google/auron/acpi_tables.c M src/mainboard/google/cyan/acpi_tables.c M src/mainboard/google/jecht/acpi_tables.c M src/mainboard/google/rambi/acpi_tables.c M src/mainboard/intel/harcuvar/acpi_tables.c M src/mainboard/intel/strago/acpi_tables.c M src/mainboard/intel/wtm2/acpi_tables.c M src/mainboard/ocp/tiogapass/acpi_tables.c M src/mainboard/portwell/m107/acpi_tables.c M src/mainboard/protectli/vault_bsw/acpi_tables.c M src/mainboard/purism/librem_bdw/acpi_tables.c M src/mainboard/scaleway/tagada/acpi_tables.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/xeon_sp/skx/acpi.c 21 files changed, 10 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/42924/1 diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index e006349..1a4813a 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -31,7 +31,6 @@ struct global_nvs; void acpi_create_gnvs(struct global_nvs *gnvs); -void acpi_init_gnvs(struct global_nvs *gnvs); void soc_fill_gnvs(struct global_nvs *gnvs); void mainboard_fill_gnvs(struct global_nvs *gnvs); diff --git a/src/mainboard/facebook/fbg1701/acpi_tables.c b/src/mainboard/facebook/fbg1701/acpi_tables.c index 999fd1e..7538af0 100644 --- a/src/mainboard/facebook/fbg1701/acpi_tables.c +++ b/src/mainboard/facebook/fbg1701/acpi_tables.c @@ -8,8 +8,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/google/auron/acpi_tables.c b/src/mainboard/google/auron/acpi_tables.c index 79c9fc6..1277a23 100644 --- a/src/mainboard/google/auron/acpi_tables.c +++ b/src/mainboard/google/auron/acpi_tables.c @@ -9,8 +9,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/google/cyan/acpi_tables.c b/src/mainboard/google/cyan/acpi_tables.c index e9e3f6cab..a30cd6a 100644 --- a/src/mainboard/google/cyan/acpi_tables.c +++ b/src/mainboard/google/cyan/acpi_tables.c @@ -8,8 +8,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/google/jecht/acpi_tables.c b/src/mainboard/google/jecht/acpi_tables.c index 52233bd..359edb5 100644 --- a/src/mainboard/google/jecht/acpi_tables.c +++ b/src/mainboard/google/jecht/acpi_tables.c @@ -11,8 +11,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 766b581..698eee9 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -11,8 +11,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index 80d1db1..30d028c 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -12,8 +12,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Disable USB ports in S5 */ gnvs->s5u0 = 0; gnvs->s5u1 = 0; diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index 76771cb..863bfae 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -13,8 +13,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/intel/wtm2/acpi_tables.c b/src/mainboard/intel/wtm2/acpi_tables.c index fad31df..1e7b2b7 100644 --- a/src/mainboard/intel/wtm2/acpi_tables.c +++ b/src/mainboard/intel/wtm2/acpi_tables.c @@ -11,8 +11,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/ocp/tiogapass/acpi_tables.c b/src/mainboard/ocp/tiogapass/acpi_tables.c index 20f83e3..4d0e88d 100644 --- a/src/mainboard/ocp/tiogapass/acpi_tables.c +++ b/src/mainboard/ocp/tiogapass/acpi_tables.c @@ -3,11 +3,6 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - acpi_init_gnvs(gnvs); -} - void mainboard_fill_fadt(acpi_fadt_t *fadt) { fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; diff --git a/src/mainboard/portwell/m107/acpi_tables.c b/src/mainboard/portwell/m107/acpi_tables.c index 999fd1e..7538af0 100644 --- a/src/mainboard/portwell/m107/acpi_tables.c +++ b/src/mainboard/portwell/m107/acpi_tables.c @@ -8,8 +8,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/protectli/vault_bsw/acpi_tables.c b/src/mainboard/protectli/vault_bsw/acpi_tables.c index aaa886d..42ee438 100644 --- a/src/mainboard/protectli/vault_bsw/acpi_tables.c +++ b/src/mainboard/protectli/vault_bsw/acpi_tables.c @@ -7,9 +7,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - - acpi_init_gnvs(gnvs); - /* Enable USB ports in S3 */ gnvs->s3u0 = 1; gnvs->s3u1 = 1; diff --git a/src/mainboard/purism/librem_bdw/acpi_tables.c b/src/mainboard/purism/librem_bdw/acpi_tables.c index 9bec071..f4df438 100644 --- a/src/mainboard/purism/librem_bdw/acpi_tables.c +++ b/src/mainboard/purism/librem_bdw/acpi_tables.c @@ -6,11 +6,6 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - acpi_init_gnvs(gnvs); -} - unsigned long acpi_fill_madt(unsigned long current) { /* Local APICs */ diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c index 1c0061f..cfaffe3 100644 --- a/src/mainboard/scaleway/tagada/acpi_tables.c +++ b/src/mainboard/scaleway/tagada/acpi_tables.c @@ -6,8 +6,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) { - acpi_init_gnvs(gnvs); - /* Disable USB ports in S5 */ gnvs->s5u0 = 0; gnvs->s5u1 = 0; diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index c6a543c..1805b6e 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -55,7 +55,7 @@ } }; -void acpi_init_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 516e7d9..3ad0d271 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -486,6 +486,7 @@ if (!gnvs) return; + soc_fill_gnvs(gnvs); mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 5834a6f..7bd895c 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -59,7 +59,7 @@ } }; -void acpi_init_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ gnvs->pm1i = -1; @@ -485,6 +485,7 @@ if (!gnvs) return; + soc_fill_gnvs(gnvs); mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index a119f9a..6e28c61 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -147,7 +147,7 @@ return cores; } -void acpi_init_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ gnvs->pm1i = -1; diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index a3c51a2..34aa9d2 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -569,6 +569,7 @@ if (!gnvs) return; + soc_fill_gnvs(gnvs); mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 88c5269..ef10d77 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -58,7 +58,7 @@ } }; -void acpi_init_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* CPU core count */ gnvs->pcnt = dev_count_cpu(); @@ -280,6 +280,7 @@ if (!gnvs) return; + soc_fill_gnvs(gnvs); mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index dd5fc46..e107cf8 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -48,7 +48,7 @@ return sci_irq; } -void acpi_init_gnvs(struct global_nvs *gnvs) +void soc_fill_gnvs(struct global_nvs *gnvs) { /* CPU core count */ gnvs->pcnt = dev_count_cpu(); @@ -958,6 +958,7 @@ if (!gnvs) return; + soc_fill_gnvs(gnvs); mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); -- To view, visit https://review.coreboot.org/c/coreboot/+/42924 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I760c36f65c6122103f2be98fc11ee13832c2772e Gerrit-Change-Number: 42924 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: mb/x/acpi_tables: Rename to mainboard_fill_gnvs()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42866 ) Change subject: mb/x/acpi_tables: Rename to mainboard_fill_gnvs() ...................................................................... mb/x/acpi_tables: Rename to mainboard_fill_gnvs() Rename acpi_create_gnvs() functions under mb/ to reflect their changed functionality. Change-Id: Ia366867ef73d1ade9805dc29b8e14b3073f44f60 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/gnvs.c M src/include/acpi/acpi_gnvs.h M src/mainboard/apple/macbook21/acpi_tables.c M src/mainboard/apple/macbookair4_2/gnvs.c M src/mainboard/asrock/b75pro3-m/acpi_tables.c M src/mainboard/asrock/b85m_pro4/acpi_tables.c M src/mainboard/asrock/g41c-gs/acpi_tables.c M src/mainboard/asrock/h81m-hds/acpi_tables.c M src/mainboard/asus/h61m-cs/acpi_tables.c M src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c M src/mainboard/asus/p5gc-mx/acpi_tables.c M src/mainboard/asus/p5qc/acpi_tables.c M src/mainboard/asus/p5ql-em/acpi_tables.c M src/mainboard/asus/p5qpl-am/acpi_tables.c M src/mainboard/asus/p8h61-m_lx/acpi_tables.c M src/mainboard/asus/p8h61-m_lx3_r2_0/acpi_tables.c M src/mainboard/asus/p8h61-m_pro/acpi_tables.c M src/mainboard/asus/p8z77-m_pro/acpi_tables.c M src/mainboard/asus/p8z77-v_lx2/acpi_tables.c M src/mainboard/compulab/intense_pc/acpi_tables.c M src/mainboard/dell/optiplex_9010/acpi_tables.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/facebook/fbg1701/acpi_tables.c M src/mainboard/foxconn/d41s/acpi_tables.c M src/mainboard/foxconn/g41s-k/acpi_tables.c M src/mainboard/getac/p470/acpi_tables.c M src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c M src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c M src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c M src/mainboard/gigabyte/ga-h61m-series/acpi_tables.c M src/mainboard/google/auron/acpi_tables.c M src/mainboard/google/beltino/acpi_tables.c M src/mainboard/google/butterfly/acpi_tables.c M src/mainboard/google/cyan/acpi_tables.c M src/mainboard/google/jecht/acpi_tables.c M src/mainboard/google/link/acpi_tables.c M src/mainboard/google/parrot/acpi_tables.c M src/mainboard/google/rambi/acpi_tables.c M src/mainboard/google/slippy/acpi_tables.c M src/mainboard/google/stout/acpi_tables.c M src/mainboard/hp/compaq_8200_elite_sff/acpi_tables.c M src/mainboard/hp/snb_ivb_laptops/acpi_tables.c M src/mainboard/hp/z220_sff_workstation/acpi_tables.c M src/mainboard/ibase/mb899/acpi_tables.c M src/mainboard/intel/baskingridge/acpi_tables.c M src/mainboard/intel/d510mo/acpi_tables.c M src/mainboard/intel/d945gclf/acpi_tables.c M src/mainboard/intel/dcp847ske/acpi_tables.c M src/mainboard/intel/dg41wv/acpi_tables.c M src/mainboard/intel/dg43gt/acpi_tables.c M src/mainboard/intel/emeraldlake2/acpi_tables.c M src/mainboard/intel/harcuvar/acpi_tables.c M src/mainboard/intel/strago/acpi_tables.c M src/mainboard/intel/wtm2/acpi_tables.c M src/mainboard/kontron/986lcd-m/acpi_tables.c M src/mainboard/kontron/ktqm77/acpi_tables.c M src/mainboard/lenovo/l520/acpi_tables.c M src/mainboard/lenovo/s230u/acpi_tables.c M src/mainboard/lenovo/t400/acpi_tables.c M src/mainboard/lenovo/t410/acpi_tables.c M src/mainboard/lenovo/t420/acpi_tables.c M src/mainboard/lenovo/t420s/acpi_tables.c M src/mainboard/lenovo/t430/acpi_tables.c M src/mainboard/lenovo/t430s/acpi_tables.c M src/mainboard/lenovo/t440p/acpi_tables.c M src/mainboard/lenovo/t520/acpi_tables.c M src/mainboard/lenovo/t530/acpi_tables.c M src/mainboard/lenovo/t60/acpi_tables.c M src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c M src/mainboard/lenovo/x131e/acpi_tables.c M src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c M src/mainboard/lenovo/x200/acpi_tables.c M src/mainboard/lenovo/x201/acpi_tables.c M src/mainboard/lenovo/x220/acpi_tables.c M src/mainboard/lenovo/x230/acpi_tables.c M src/mainboard/lenovo/x60/acpi_tables.c M src/mainboard/msi/ms7707/acpi_tables.c M src/mainboard/ocp/tiogapass/acpi_tables.c M src/mainboard/packardbell/ms2290/acpi_tables.c M src/mainboard/portwell/m107/acpi_tables.c M src/mainboard/protectli/vault_bsw/acpi_tables.c M src/mainboard/purism/librem_bdw/acpi_tables.c M src/mainboard/roda/rk886ex/acpi_tables.c M src/mainboard/roda/rk9/acpi_tables.c M src/mainboard/roda/rv11/acpi_tables.c M src/mainboard/samsung/lumpy/acpi_tables.c M src/mainboard/samsung/stumpy/acpi_tables.c M src/mainboard/sapphire/pureplatinumh61/acpi_tables.c M src/mainboard/scaleway/tagada/acpi_tables.c M src/mainboard/supermicro/x10slm-f/acpi_tables.c M src/mainboard/supermicro/x9scl/acpi_tables.c M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/xeon_sp/skx/acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 102 files changed, 90 insertions(+), 124 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/42866/1 diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index e572a37..b5f2ad2 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -30,6 +30,7 @@ } __weak void soc_fill_gnvs(struct global_nvs *gnvs_) { } +__weak void mainboard_fill_gnvs(struct global_nvs *gnvs_) { } void *gnvs_get_or_create(void) { diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index d827a07..e006349 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -34,5 +34,6 @@ void acpi_init_gnvs(struct global_nvs *gnvs); void soc_fill_gnvs(struct global_nvs *gnvs); +void mainboard_fill_gnvs(struct global_nvs *gnvs); #endif diff --git a/src/mainboard/apple/macbook21/acpi_tables.c b/src/mainboard/apple/macbook21/acpi_tables.c index 52c2fbb..6970dfc 100644 --- a/src/mainboard/apple/macbook21/acpi_tables.c +++ b/src/mainboard/apple/macbook21/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/apple/macbookair4_2/gnvs.c b/src/mainboard/apple/macbookair4_2/gnvs.c index 846f079..06763d3 100644 --- a/src/mainboard/apple/macbookair4_2/gnvs.c +++ b/src/mainboard/apple/macbookair4_2/gnvs.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Disable USB ports in S3 by default */ gnvs->s3u0 = 0; diff --git a/src/mainboard/asrock/b75pro3-m/acpi_tables.c b/src/mainboard/asrock/b75pro3-m/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/asrock/b75pro3-m/acpi_tables.c +++ b/src/mainboard/asrock/b75pro3-m/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/asrock/b85m_pro4/acpi_tables.c b/src/mainboard/asrock/b85m_pro4/acpi_tables.c index eed290d..59c4186 100644 --- a/src/mainboard/asrock/b85m_pro4/acpi_tables.c +++ b/src/mainboard/asrock/b85m_pro4/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/lynxpoint/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/asrock/g41c-gs/acpi_tables.c b/src/mainboard/asrock/g41c-gs/acpi_tables.c index 9eef159..720652663 100644 --- a/src/mainboard/asrock/g41c-gs/acpi_tables.c +++ b/src/mainboard/asrock/g41c-gs/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->cmap = 0x01; /* Enable COM 1 port */ diff --git a/src/mainboard/asrock/h81m-hds/acpi_tables.c b/src/mainboard/asrock/h81m-hds/acpi_tables.c index 8ec5b11..1790663 100644 --- a/src/mainboard/asrock/h81m-hds/acpi_tables.c +++ b/src/mainboard/asrock/h81m-hds/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/lynxpoint/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/asus/h61m-cs/acpi_tables.c b/src/mainboard/asus/h61m-cs/acpi_tables.c index 852b0b4..1c0ed37 100644 --- a/src/mainboard/asus/h61m-cs/acpi_tables.c +++ b/src/mainboard/asus/h61m-cs/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c b/src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c index 14a79f8..d6eed91 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c +++ b/src/mainboard/asus/maximus_iv_gene-z/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/asus/p5gc-mx/acpi_tables.c b/src/mainboard/asus/p5gc-mx/acpi_tables.c index 496d419..a5228fa 100644 --- a/src/mainboard/asus/p5gc-mx/acpi_tables.c +++ b/src/mainboard/asus/p5gc-mx/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/asus/p5qc/acpi_tables.c b/src/mainboard/asus/p5qc/acpi_tables.c index 65db55f..0d0b24c 100644 --- a/src/mainboard/asus/p5qc/acpi_tables.c +++ b/src/mainboard/asus/p5qc/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801jx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ diff --git a/src/mainboard/asus/p5ql-em/acpi_tables.c b/src/mainboard/asus/p5ql-em/acpi_tables.c index 4f59ed0..e678bab 100644 --- a/src/mainboard/asus/p5ql-em/acpi_tables.c +++ b/src/mainboard/asus/p5ql-em/acpi_tables.c @@ -4,7 +4,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801jx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ diff --git a/src/mainboard/asus/p5qpl-am/acpi_tables.c b/src/mainboard/asus/p5qpl-am/acpi_tables.c index 9eef159..720652663 100644 --- a/src/mainboard/asus/p5qpl-am/acpi_tables.c +++ b/src/mainboard/asus/p5qpl-am/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->cmap = 0x01; /* Enable COM 1 port */ diff --git a/src/mainboard/asus/p8h61-m_lx/acpi_tables.c b/src/mainboard/asus/p8h61-m_lx/acpi_tables.c index 14a79f8..d6eed91 100644 --- a/src/mainboard/asus/p8h61-m_lx/acpi_tables.c +++ b/src/mainboard/asus/p8h61-m_lx/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/asus/p8h61-m_lx3_r2_0/acpi_tables.c b/src/mainboard/asus/p8h61-m_lx3_r2_0/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/asus/p8h61-m_lx3_r2_0/acpi_tables.c +++ b/src/mainboard/asus/p8h61-m_lx3_r2_0/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/asus/p8h61-m_pro/acpi_tables.c b/src/mainboard/asus/p8h61-m_pro/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/asus/p8h61-m_pro/acpi_tables.c +++ b/src/mainboard/asus/p8h61-m_pro/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/asus/p8z77-m_pro/acpi_tables.c b/src/mainboard/asus/p8z77-m_pro/acpi_tables.c index e401b65..c1da5cb 100644 --- a/src/mainboard/asus/p8z77-m_pro/acpi_tables.c +++ b/src/mainboard/asus/p8z77-m_pro/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* critical temp that will shutdown the pc == 95C degrees */ gnvs->tcrt = 95; diff --git a/src/mainboard/asus/p8z77-v_lx2/acpi_tables.c b/src/mainboard/asus/p8z77-v_lx2/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/asus/p8z77-v_lx2/acpi_tables.c +++ b/src/mainboard/asus/p8z77-v_lx2/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/compulab/intense_pc/acpi_tables.c b/src/mainboard/compulab/intense_pc/acpi_tables.c index f905187..fba85e1 100644 --- a/src/mainboard/compulab/intense_pc/acpi_tables.c +++ b/src/mainboard/compulab/intense_pc/acpi_tables.c @@ -4,7 +4,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> /* FIXME: check this function. */ -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/dell/optiplex_9010/acpi_tables.c b/src/mainboard/dell/optiplex_9010/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/dell/optiplex_9010/acpi_tables.c +++ b/src/mainboard/dell/optiplex_9010/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index 51baae5..0480af4 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -14,7 +14,7 @@ #include "../qemu-i440fx/acpi.h" #include <southbridge/intel/i82801ix/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ diff --git a/src/mainboard/facebook/fbg1701/acpi_tables.c b/src/mainboard/facebook/fbg1701/acpi_tables.c index 5fe4a42..999fd1e 100644 --- a/src/mainboard/facebook/fbg1701/acpi_tables.c +++ b/src/mainboard/facebook/fbg1701/acpi_tables.c @@ -6,7 +6,7 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/foxconn/d41s/acpi_tables.c b/src/mainboard/foxconn/d41s/acpi_tables.c index 496d419..a5228fa 100644 --- a/src/mainboard/foxconn/d41s/acpi_tables.c +++ b/src/mainboard/foxconn/d41s/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/foxconn/g41s-k/acpi_tables.c b/src/mainboard/foxconn/g41s-k/acpi_tables.c index 781abcc..38c0704 100644 --- a/src/mainboard/foxconn/g41s-k/acpi_tables.c +++ b/src/mainboard/foxconn/g41s-k/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->cmap = 1; /* COM 1 port */ diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index d555c10..d388721 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -10,7 +10,7 @@ #include "mainboard.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable COM port(s) */ gnvs->cmap = 0x01; diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c index 496d419..a5228fa 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c index 3012052..f22470c 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c @@ -4,7 +4,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = CRITICAL_TEMPERATURE; gnvs->tpsv = PASSIVE_TEMPERATURE; diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c index f7296e1..78f2ad6 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->lptp = 0; /* LPT port */ diff --git a/src/mainboard/gigabyte/ga-h61m-series/acpi_tables.c b/src/mainboard/gigabyte/ga-h61m-series/acpi_tables.c index 852b0b4..1c0ed37 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-h61m-series/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/google/auron/acpi_tables.c b/src/mainboard/google/auron/acpi_tables.c index 10dc637..79c9fc6 100644 --- a/src/mainboard/google/auron/acpi_tables.c +++ b/src/mainboard/google/auron/acpi_tables.c @@ -7,7 +7,7 @@ #include <soc/nvs.h> #include <variant/thermal.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/google/beltino/acpi_tables.c b/src/mainboard/google/beltino/acpi_tables.c index a34a1e9..b603d3d 100644 --- a/src/mainboard/google/beltino/acpi_tables.c +++ b/src/mainboard/google/beltino/acpi_tables.c @@ -10,7 +10,7 @@ #include <vendorcode/google/chromeos/gnvs.h> #include <variant/thermal.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c index 7ac37b2..5492e16 100644 --- a/src/mainboard/google/butterfly/acpi_tables.c +++ b/src/mainboard/google/butterfly/acpi_tables.c @@ -5,7 +5,7 @@ #include <vendorcode/google/chromeos/gnvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Disable USB ports in S3 by default */ gnvs->s3u0 = 0; diff --git a/src/mainboard/google/cyan/acpi_tables.c b/src/mainboard/google/cyan/acpi_tables.c index 2f2f298..e9e3f6cab 100644 --- a/src/mainboard/google/cyan/acpi_tables.c +++ b/src/mainboard/google/cyan/acpi_tables.c @@ -6,7 +6,7 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/google/jecht/acpi_tables.c b/src/mainboard/google/jecht/acpi_tables.c index 1b96df6..52233bd 100644 --- a/src/mainboard/google/jecht/acpi_tables.c +++ b/src/mainboard/google/jecht/acpi_tables.c @@ -9,7 +9,7 @@ #include <soc/nvs.h> #include <variant/thermal.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/google/link/acpi_tables.c b/src/mainboard/google/link/acpi_tables.c index 5b0621e..cc3f9a8 100644 --- a/src/mainboard/google/link/acpi_tables.c +++ b/src/mainboard/google/link/acpi_tables.c @@ -4,7 +4,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Disable USB ports in S3 by default */ gnvs->s3u0 = 0; diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index a4d3319..f493840 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -13,7 +13,7 @@ #include "thermal.h" #include "onboard.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Disable USB ports in S3 by default */ gnvs->s3u0 = 0; diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index 54735ce..766b581 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -9,7 +9,7 @@ #include <soc/nvs.h> #include <soc/iomap.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c index 6e9981b..50ceeb9 100644 --- a/src/mainboard/google/slippy/acpi_tables.c +++ b/src/mainboard/google/slippy/acpi_tables.c @@ -9,7 +9,7 @@ #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 101e8f1..964a221 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -14,7 +14,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Disable USB ports in S3 by default */ gnvs->s3u0 = 0; diff --git a/src/mainboard/hp/compaq_8200_elite_sff/acpi_tables.c b/src/mainboard/hp/compaq_8200_elite_sff/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/acpi_tables.c +++ b/src/mainboard/hp/compaq_8200_elite_sff/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/hp/snb_ivb_laptops/acpi_tables.c b/src/mainboard/hp/snb_ivb_laptops/acpi_tables.c index 8999b72..20a67f7 100644 --- a/src/mainboard/hp/snb_ivb_laptops/acpi_tables.c +++ b/src/mainboard/hp/snb_ivb_laptops/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { // the lid is open by default. gnvs->lids = 1; diff --git a/src/mainboard/hp/z220_sff_workstation/acpi_tables.c b/src/mainboard/hp/z220_sff_workstation/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/hp/z220_sff_workstation/acpi_tables.c +++ b/src/mainboard/hp/z220_sff_workstation/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/ibase/mb899/acpi_tables.c b/src/mainboard/ibase/mb899/acpi_tables.c index 52c2fbb..6970dfc 100644 --- a/src/mainboard/ibase/mb899/acpi_tables.c +++ b/src/mainboard/ibase/mb899/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c index d31735d..e9886e6 100644 --- a/src/mainboard/intel/baskingridge/acpi_tables.c +++ b/src/mainboard/intel/baskingridge/acpi_tables.c @@ -10,7 +10,7 @@ #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/intel/d510mo/acpi_tables.c b/src/mainboard/intel/d510mo/acpi_tables.c index 496d419..a5228fa 100644 --- a/src/mainboard/intel/d510mo/acpi_tables.c +++ b/src/mainboard/intel/d510mo/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c index 496d419..a5228fa 100644 --- a/src/mainboard/intel/d945gclf/acpi_tables.c +++ b/src/mainboard/intel/d945gclf/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/intel/dcp847ske/acpi_tables.c b/src/mainboard/intel/dcp847ske/acpi_tables.c index 43e5062..ac2f3fb 100644 --- a/src/mainboard/intel/dcp847ske/acpi_tables.c +++ b/src/mainboard/intel/dcp847ske/acpi_tables.c @@ -4,7 +4,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable USB ports in S3 by default */ gnvs->s3u0 = 1; diff --git a/src/mainboard/intel/dg41wv/acpi_tables.c b/src/mainboard/intel/dg41wv/acpi_tables.c index 9eef159..720652663 100644 --- a/src/mainboard/intel/dg41wv/acpi_tables.c +++ b/src/mainboard/intel/dg41wv/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->cmap = 0x01; /* Enable COM 1 port */ diff --git a/src/mainboard/intel/dg43gt/acpi_tables.c b/src/mainboard/intel/dg43gt/acpi_tables.c index 65db55f..0d0b24c 100644 --- a/src/mainboard/intel/dg43gt/acpi_tables.c +++ b/src/mainboard/intel/dg43gt/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801jx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->osys = 2002; /* At least WINXP SP2 (HPET fix) */ diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index 2ae7de4..dd82cd6 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -9,7 +9,7 @@ #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable USB ports in S3 */ gnvs->s3u0 = 1; diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index 5040b0b..80d1db1 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -10,7 +10,7 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index 2df0d15..76771cb 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -11,7 +11,7 @@ #include <boardid.h> #include "onboard.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/intel/wtm2/acpi_tables.c b/src/mainboard/intel/wtm2/acpi_tables.c index 416f945..fad31df 100644 --- a/src/mainboard/intel/wtm2/acpi_tables.c +++ b/src/mainboard/intel/wtm2/acpi_tables.c @@ -9,7 +9,7 @@ #include <soc/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c index 52c2fbb..6970dfc 100644 --- a/src/mainboard/kontron/986lcd-m/acpi_tables.c +++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/kontron/ktqm77/acpi_tables.c b/src/mainboard/kontron/ktqm77/acpi_tables.c index 3012052..f22470c 100644 --- a/src/mainboard/kontron/ktqm77/acpi_tables.c +++ b/src/mainboard/kontron/ktqm77/acpi_tables.c @@ -4,7 +4,7 @@ #include <southbridge/intel/bd82x6x/nvs.h> #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = CRITICAL_TEMPERATURE; gnvs->tpsv = PASSIVE_TEMPERATURE; diff --git a/src/mainboard/lenovo/l520/acpi_tables.c b/src/mainboard/lenovo/l520/acpi_tables.c index 6f69102..91c1234 100644 --- a/src/mainboard/lenovo/l520/acpi_tables.c +++ b/src/mainboard/lenovo/l520/acpi_tables.c @@ -4,7 +4,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/s230u/acpi_tables.c b/src/mainboard/lenovo/s230u/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/s230u/acpi_tables.c +++ b/src/mainboard/lenovo/s230u/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t400/acpi_tables.c b/src/mainboard/lenovo/t400/acpi_tables.c index 14b5a8b..ad36e42 100644 --- a/src/mainboard/lenovo/t400/acpi_tables.c +++ b/src/mainboard/lenovo/t400/acpi_tables.c @@ -7,7 +7,7 @@ #include <device/device.h> #include <southbridge/intel/i82801ix/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ diff --git a/src/mainboard/lenovo/t410/acpi_tables.c b/src/mainboard/lenovo/t410/acpi_tables.c index f957656..45ae4d3 100644 --- a/src/mainboard/lenovo/t410/acpi_tables.c +++ b/src/mainboard/lenovo/t410/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/ibexpeak/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t420/acpi_tables.c b/src/mainboard/lenovo/t420/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/t420/acpi_tables.c +++ b/src/mainboard/lenovo/t420/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/t420s/acpi_tables.c +++ b/src/mainboard/lenovo/t420s/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t430/acpi_tables.c b/src/mainboard/lenovo/t430/acpi_tables.c index 5cb1fd3..29d8eba 100644 --- a/src/mainboard/lenovo/t430/acpi_tables.c +++ b/src/mainboard/lenovo/t430/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t430s/acpi_tables.c b/src/mainboard/lenovo/t430s/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/t430s/acpi_tables.c +++ b/src/mainboard/lenovo/t430s/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t440p/acpi_tables.c b/src/mainboard/lenovo/t440p/acpi_tables.c index c235d12..93016a8 100644 --- a/src/mainboard/lenovo/t440p/acpi_tables.c +++ b/src/mainboard/lenovo/t440p/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/lynxpoint/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default. */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t520/acpi_tables.c b/src/mainboard/lenovo/t520/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/t520/acpi_tables.c +++ b/src/mainboard/lenovo/t520/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t530/acpi_tables.c b/src/mainboard/lenovo/t530/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/t530/acpi_tables.c +++ b/src/mainboard/lenovo/t530/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c index 62fcfe9..4a9c6ae 100644 --- a/src/mainboard/lenovo/t60/acpi_tables.c +++ b/src/mainboard/lenovo/t60/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c b/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c index 9eef159..720652663 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->pwrs = 1; /* Power state (AC = 1) */ gnvs->cmap = 0x01; /* Enable COM 1 port */ diff --git a/src/mainboard/lenovo/x131e/acpi_tables.c b/src/mainboard/lenovo/x131e/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/x131e/acpi_tables.c +++ b/src/mainboard/lenovo/x131e/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c b/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c +++ b/src/mainboard/lenovo/x1_carbon_gen1/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c index 14b5a8b..ad36e42 100644 --- a/src/mainboard/lenovo/x200/acpi_tables.c +++ b/src/mainboard/lenovo/x200/acpi_tables.c @@ -7,7 +7,7 @@ #include <device/device.h> #include <southbridge/intel/i82801ix/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ diff --git a/src/mainboard/lenovo/x201/acpi_tables.c b/src/mainboard/lenovo/x201/acpi_tables.c index f957656..45ae4d3 100644 --- a/src/mainboard/lenovo/x201/acpi_tables.c +++ b/src/mainboard/lenovo/x201/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/ibexpeak/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/x220/acpi_tables.c b/src/mainboard/lenovo/x220/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/x220/acpi_tables.c +++ b/src/mainboard/lenovo/x220/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/x230/acpi_tables.c b/src/mainboard/lenovo/x230/acpi_tables.c index 0f32e9f..9669ca2 100644 --- a/src/mainboard/lenovo/x230/acpi_tables.c +++ b/src/mainboard/lenovo/x230/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c index 62fcfe9..4a9c6ae 100644 --- a/src/mainboard/lenovo/x60/acpi_tables.c +++ b/src/mainboard/lenovo/x60/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/msi/ms7707/acpi_tables.c b/src/mainboard/msi/ms7707/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/msi/ms7707/acpi_tables.c +++ b/src/mainboard/msi/ms7707/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/ocp/tiogapass/acpi_tables.c b/src/mainboard/ocp/tiogapass/acpi_tables.c index 300e8f6..20f83e3 100644 --- a/src/mainboard/ocp/tiogapass/acpi_tables.c +++ b/src/mainboard/ocp/tiogapass/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); } diff --git a/src/mainboard/packardbell/ms2290/acpi_tables.c b/src/mainboard/packardbell/ms2290/acpi_tables.c index 17ed31e..84f40bb 100644 --- a/src/mainboard/packardbell/ms2290/acpi_tables.c +++ b/src/mainboard/packardbell/ms2290/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/ibexpeak/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/portwell/m107/acpi_tables.c b/src/mainboard/portwell/m107/acpi_tables.c index 5fe4a42..999fd1e 100644 --- a/src/mainboard/portwell/m107/acpi_tables.c +++ b/src/mainboard/portwell/m107/acpi_tables.c @@ -6,7 +6,7 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/protectli/vault_bsw/acpi_tables.c b/src/mainboard/protectli/vault_bsw/acpi_tables.c index 5267dcd..aaa886d 100644 --- a/src/mainboard/protectli/vault_bsw/acpi_tables.c +++ b/src/mainboard/protectli/vault_bsw/acpi_tables.c @@ -5,7 +5,7 @@ #include <soc/acpi.h> #include <string.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/purism/librem_bdw/acpi_tables.c b/src/mainboard/purism/librem_bdw/acpi_tables.c index ca6f64b..9bec071 100644 --- a/src/mainboard/purism/librem_bdw/acpi_tables.c +++ b/src/mainboard/purism/librem_bdw/acpi_tables.c @@ -6,7 +6,7 @@ #include <soc/acpi.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); } diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c index 52c2fbb..6970dfc 100644 --- a/src/mainboard/roda/rk886ex/acpi_tables.c +++ b/src/mainboard/roda/rk886ex/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/i82801gx/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable both COM ports */ gnvs->cmap = 0x01; diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c index b0e8993..1eaadce 100644 --- a/src/mainboard/roda/rk9/acpi_tables.c +++ b/src/mainboard/roda/rk9/acpi_tables.c @@ -7,7 +7,7 @@ #include <device/device.h> #include <southbridge/intel/i82801ix/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ diff --git a/src/mainboard/roda/rv11/acpi_tables.c b/src/mainboard/roda/rv11/acpi_tables.c index aea50a1..bee9643 100644 --- a/src/mainboard/roda/rv11/acpi_tables.c +++ b/src/mainboard/roda/rv11/acpi_tables.c @@ -5,7 +5,7 @@ #include <variant/thermal.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* The lid is open by default */ gnvs->lids = 1; diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index e730bc2..2524101 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -12,7 +12,7 @@ #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* * Disable 3G in suspend by default. diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index dcdd4e5..16295ff 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -9,7 +9,7 @@ #include "thermal.h" -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { /* Enable Front USB ports in S3 by default */ gnvs->s3u0 = 1; diff --git a/src/mainboard/sapphire/pureplatinumh61/acpi_tables.c b/src/mainboard/sapphire/pureplatinumh61/acpi_tables.c index ccbb75c..d27cf01 100644 --- a/src/mainboard/sapphire/pureplatinumh61/acpi_tables.c +++ b/src/mainboard/sapphire/pureplatinumh61/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c index a251d22..1c0061f 100644 --- a/src/mainboard/scaleway/tagada/acpi_tables.c +++ b/src/mainboard/scaleway/tagada/acpi_tables.c @@ -4,7 +4,7 @@ #include <acpi/acpi_gnvs.h> #include <soc/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { acpi_init_gnvs(gnvs); diff --git a/src/mainboard/supermicro/x10slm-f/acpi_tables.c b/src/mainboard/supermicro/x10slm-f/acpi_tables.c index 8ec5b11..1790663 100644 --- a/src/mainboard/supermicro/x10slm-f/acpi_tables.c +++ b/src/mainboard/supermicro/x10slm-f/acpi_tables.c @@ -3,6 +3,3 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/lynxpoint/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) -{ -} diff --git a/src/mainboard/supermicro/x9scl/acpi_tables.c b/src/mainboard/supermicro/x9scl/acpi_tables.c index 28c9d8e..e68746c 100644 --- a/src/mainboard/supermicro/x9scl/acpi_tables.c +++ b/src/mainboard/supermicro/x9scl/acpi_tables.c @@ -3,7 +3,7 @@ #include <acpi/acpi_gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> -void acpi_create_gnvs(struct global_nvs *gnvs) +void mainboard_fill_gnvs(struct global_nvs *gnvs) { gnvs->tcrt = 100; gnvs->tpsv = 90; diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 96af716..516e7d9 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -486,7 +486,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index af4bcab..5834a6f 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -485,7 +485,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index dcb3ac9..a3c51a2 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -569,7 +569,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 34bf9e6..88c5269 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -280,7 +280,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index fd33c29..dd5fc46 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -958,7 +958,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); // Add IIOStack ACPI Resource Templates diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index d5077de..6b0ad83 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -661,7 +661,7 @@ return; soc_fill_gnvs(gnvs); - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index a733b6a..c39820a 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -622,7 +622,7 @@ return; soc_fill_gnvs(gnvs); - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index aba789b..9f9058f 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -461,7 +461,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index a371ba1..e2462c7 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -620,7 +620,7 @@ if (!gnvs) return; - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 723fd0d..8e32f78 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -566,7 +566,7 @@ return; soc_fill_gnvs(gnvs); - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index ca7300d..ead33ce 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -702,7 +702,7 @@ return; soc_fill_gnvs(gnvs); - acpi_create_gnvs(gnvs); + mainboard_fill_gnvs(gnvs); acpi_inject_nvsa(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/42866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia366867ef73d1ade9805dc29b8e14b3073f44f60 Gerrit-Change-Number: 42866 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

3 9

Change in coreboot[master]: sb/intel: Factor out soc_fill_gnvs()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42864 ) Change subject: sb/intel: Factor out soc_fill_gnvs() ...................................................................... sb/intel: Factor out soc_fill_gnvs() Name the common part of GNVS initialisation as soc_fill_gnvs(). It is also moved before the call to acpi_create_gnvs(), which followup will rename to mainbord_fill_gnvs() to reflect that implementation is under mb/. Change-Id: Ic4cf1548b65a86212d6e45d460fcd23bb8036365 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/gnvs.c M src/include/acpi/acpi_gnvs.h M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 8 files changed, 58 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/42864/1 diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index 40c9745..23b69a1 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -29,6 +29,8 @@ *gnvs_cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE); } +__weak void soc_fill_gnvs(struct global_nvs *gnvs) { } + void *gnvs_get_or_create(void) { size_t gnvs_size; diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index 6173fa1..d827a07 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -33,4 +33,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs); void acpi_init_gnvs(struct global_nvs *gnvs); +void soc_fill_gnvs(struct global_nvs *gnvs); + #endif diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 3f142db..d5077de 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -15,7 +15,6 @@ #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <cpu/x86/smm.h> -#include <cbmem.h> #include <string.h> #include "chip.h" #include "pch.h" @@ -648,25 +647,23 @@ pch_enable(dev); } +void soc_fill_gnvs(struct global_nvs *gnvs) +{ + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); +} + void southbridge_inject_dsdt(const struct device *dev) { struct global_nvs *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { + soc_fill_gnvs(gnvs); + acpi_create_gnvs(gnvs); - acpi_create_gnvs(gnvs); - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 129e9b1..a733b6a 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -16,7 +16,6 @@ #include <cpu/x86/smm.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> -#include <cbmem.h> #include <string.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/pmbase.h> @@ -610,23 +609,21 @@ outb(POST_OS_BOOT, 0x80); } +void soc_fill_gnvs(struct global_nvs *gnvs) +{ + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ +} + void southbridge_inject_dsdt(const struct device *dev) { struct global_nvs *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + soc_fill_gnvs(gnvs); + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index bbbdd71..efad617 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -15,7 +15,6 @@ #include <acpi/acpi_gnvs.h> #include <cpu/x86/smm.h> #include <acpi/acpigen.h> -#include <cbmem.h> #include <string.h> #include "chip.h" #include "i82801ix.h" @@ -458,20 +457,10 @@ void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = acpi_get_gnvs(); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uintptr_t)gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 645ebd6..a371ba1 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -16,7 +16,6 @@ #include <cpu/x86/smm.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> -#include <cbmem.h> #include <string.h> #include "chip.h" #include "i82801jx.h" @@ -618,16 +617,11 @@ void southbridge_inject_dsdt(const struct device *dev) { struct global_nvs *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 6e5c025..723fd0d 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -16,7 +16,6 @@ #include <acpi/acpi_gnvs.h> #include <elog.h> #include <acpi/acpigen.h> -#include <cbmem.h> #include <string.h> #include <cpu/x86/smm.h> #include "chip.h" @@ -553,24 +552,23 @@ pch_enable(dev); } +void soc_fill_gnvs(struct global_nvs *gnvs) +{ + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); +} + void southbridge_inject_dsdt(const struct device *dev) { struct global_nvs *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { + soc_fill_gnvs(gnvs); + acpi_create_gnvs(gnvs); - acpi_create_gnvs(gnvs); - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 21cdac7..ca7300d 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -13,7 +13,6 @@ #include <acpi/acpi.h> #include <acpi/acpi_gnvs.h> #include <cpu/x86/smm.h> -#include <cbmem.h> #include <string.h> #include "chip.h" #include "nvs.h" @@ -689,24 +688,23 @@ pch_enable(dev); } +void soc_fill_gnvs(struct global_nvs *gnvs) +{ + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs; + struct global_nvs *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + soc_fill_gnvs(gnvs); + acpi_create_gnvs(gnvs); - if (gnvs) { - acpi_create_gnvs(gnvs); - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) -- To view, visit https://review.coreboot.org/c/coreboot/+/42864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4cf1548b65a86212d6e45d460fcd23bb8036365 Gerrit-Change-Number: 42864 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 4

Change in coreboot[master]: [WIP] ACPI: Refactor GNVS generation
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42494 ) Change subject: [WIP] ACPI: Refactor GNVS generation ...................................................................... [WIP] ACPI: Refactor GNVS generation Change-Id: I45a2d9cb7f07609a1ff03fd70f17c3f2d4f013b9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/skylake/acpi.c M src/soc/intel/xeon_sp/cpx/acpi.c M src/soc/intel/xeon_sp/skx/acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 16 files changed, 97 insertions(+), 216 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/42494/1 diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index dae0105..2d5ffff 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -12,7 +12,7 @@ #include <arch/ioapic.h> #include <arch/smp/mpspec.h> #include <cpu/x86/smm.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <device/device.h> #include <device/pci.h> #include <amdblocks/acpimmio.h> @@ -244,30 +244,20 @@ return acpi_write_hpet(device, current, rsdp); } -static void acpi_create_gnvs(struct global_nvs_t *gnvs) +void southbridge_inject_dsdt(const struct device *device) { + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; + /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; /* CPU core count */ gnvs->pcnt = dev_count_cpu(); -} -void southbridge_inject_dsdt(const struct device *device) -{ - struct global_nvs_t *gnvs; - - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uintptr_t)gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } static void acpigen_soc_get_gpio_in_local5(uintptr_t addr) diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index b79ed0e..381459e 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -11,7 +11,7 @@ #include <device/pci_ops.h> #include <arch/ioapic.h> #include <cpu/x86/smm.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <device/device.h> #include <device/pci.h> #include <amdblocks/acpimmio.h> @@ -219,30 +219,20 @@ return acpi_write_hpet(device, current, rsdp); } -static void acpi_create_gnvs(struct global_nvs_t *gnvs) +void southbridge_inject_dsdt(const struct device *device) { + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; + /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; /* CPU core count */ gnvs->pcnt = dev_count_cpu(); -} -void southbridge_inject_dsdt(const struct device *device) -{ - struct global_nvs_t *gnvs; - - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uintptr_t)gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } static void acpigen_soc_get_gpio_in_local5(uintptr_t addr) diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index a2d2488..fe91759 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -6,7 +6,7 @@ #include <device/pci_ops.h> #include <acpi/acpi.h> #include <bootstate.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <device/device.h> @@ -482,21 +482,13 @@ static void southcluster_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } - static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index d16e404..c393601 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -4,7 +4,7 @@ #include <acpi/acpigen.h> #include <device/mmio.h> #include <arch/smp/mpspec.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> @@ -476,24 +476,19 @@ void southcluster_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + acpi_create_gnvs(gnvs); - if (gnvs) { - acpi_create_gnvs(gnvs); + /* Fill in the Wi-Fi Region ID */ + if (CONFIG(HAVE_REGULATORY_DOMAIN)) + gnvs->cid1 = wifi_regulatory_domain(); + else + gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN; - /* Fill in the Wi-Fi Region ID */ - if (CONFIG(HAVE_REGULATORY_DOMAIN)) - gnvs->cid1 = wifi_regulatory_domain(); - else - gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN; - - /* Add it to DSDT */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } __weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index aabc23d..7ee9ef2 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -12,7 +12,7 @@ #include <arch/ioapic.h> #include <acpi/acpi.h> #include <cpu/x86/smm.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <reg_script.h> #include <string.h> #include <soc/gpio.h> @@ -565,18 +565,12 @@ static void southcluster_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } static unsigned long broadwell_write_acpi_tables(const struct device *device, diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index c9a56ce..576ec75 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -228,18 +228,12 @@ void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uintptr_t) gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } static int calculate_power(int tdp, int p1_ratio, int ratio) diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index f14ac58..3e45c5d 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -8,6 +8,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <intelblocks/acpi.h> #include <soc/acpi.h> @@ -275,18 +276,12 @@ void southcluster_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32)gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } __weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {} diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index a5125f6..9a8200f 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -6,6 +6,7 @@ #include <arch/ioapic.h> #include <arch/smp/mpspec.h> #include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <cpu/x86/msr.h> @@ -626,18 +627,12 @@ void southbridge_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } /* Save wake source information for calculating ACPI _SWS values */ diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index ba5128e..7c01a01 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -4,7 +4,7 @@ #include <arch/ioapic.h> #include <arch/smp/mpspec.h> #include <assert.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <cf9_reset.h> #include <console/console.h> #include <cpu/x86/smm.h> @@ -108,19 +108,12 @@ void southbridge_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - printk(BIOS_SPEW, "%s injecting NVSA with 0x%x\n", __FILE__, (uint32_t)gnvs); - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uint32_t)gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); /* Add IIOStack ACPI Resource Templates */ uncore_inject_dsdt(); diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index 072bb6a..5db880e 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -6,6 +6,7 @@ #include <intelblocks/acpi.h> #include <device/pci.h> #include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <cpu/x86/smm.h> #include <soc/acpi.h> #include <soc/cpu.h> @@ -953,19 +954,12 @@ void southbridge_inject_dsdt(const struct device *device) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - /* Add it to DSDT. */ - printk(BIOS_SPEW, "%s injecting NVSA with 0x%x\n", __FILE__, (uint32_t)gnvs); - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uint32_t)gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); // Add IIOStack ACPI Resource Templates uncore_inject_dsdt(); diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 806dc5f..1caddd5 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -14,7 +14,6 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> #include <cpu/x86/smm.h> -#include <cbmem.h> #include <acpi/acpi_gnvs.h> #include <string.h> #include "chip.h" @@ -651,22 +650,14 @@ static void southbridge_inject_dsdt(const struct device *dev) { global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); - acpi_create_gnvs(gnvs); - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 2cb66da..88709bb 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -16,7 +16,6 @@ #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> -#include <cbmem.h> #include <string.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/pmbase.h> @@ -615,20 +614,11 @@ static void southbridge_inject_dsdt(const struct device *dev) { global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { - - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 62c47c9..cc49fb4 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -12,10 +12,9 @@ #include <device/pci_ops.h> #include <arch/ioapic.h> #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <cpu/x86/smm.h> #include <acpi/acpigen.h> -#include <cbmem.h> -#include <acpi/acpi_gnvs.h> #include <string.h> #include "chip.h" #include "i82801ix.h" @@ -458,20 +457,9 @@ static void southbridge_inject_dsdt(const struct device *dev) { - global_nvs_t *gnvs = acpi_get_gnvs(); - - if (gnvs) { - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (uintptr_t)gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 5f31fca..659500b 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -15,7 +15,6 @@ #include <cpu/x86/smm.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> -#include <cbmem.h> #include <acpi/acpi_gnvs.h> #include <string.h> #include "chip.h" @@ -618,16 +617,11 @@ static void southbridge_inject_dsdt(const struct device *dev) { global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { - acpi_create_gnvs(gnvs); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_create_gnvs(gnvs); + acpi_inject_nvsa(); } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index ae075ce..14135a6 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -15,7 +15,6 @@ #include <acpi/acpi.h> #include <elog.h> #include <acpi/acpigen.h> -#include <cbmem.h> #include <acpi/acpi_gnvs.h> #include <string.h> #include <cpu/x86/smm.h> @@ -556,21 +555,16 @@ static void southbridge_inject_dsdt(const struct device *dev) { global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - if (gnvs) { + acpi_create_gnvs(gnvs); - acpi_create_gnvs(gnvs); + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - - /* Add it to SSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 735956a..f4ab30a 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -12,7 +12,7 @@ #include <arch/ioapic.h> #include <acpi/acpi.h> #include <cpu/x86/smm.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <string.h> #include "chip.h" #include "nvs.h" @@ -669,8 +669,6 @@ static void pch_lpc_read_resources(struct device *dev) { - global_nvs_t *gnvs; - /* Get the normal PCI resources of this device. */ pci_dev_read_resources(dev); @@ -679,7 +677,6 @@ /* Add IO resources. */ pch_lpc_add_io_resources(dev); - } static void pch_lpc_enable(struct device *dev) @@ -693,22 +690,17 @@ static void southbridge_inject_dsdt(const struct device *dev) { - global_nvs_t *gnvs; + global_nvs_t *gnvs = acpi_get_gnvs(); + if (!gnvs) + return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + acpi_create_gnvs(gnvs); - if (gnvs) { - acpi_create_gnvs(gnvs); + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); - - /* Add it to DSDT. */ - acpigen_write_scope("\\"); - acpigen_write_name_dword("NVSA", (u32) gnvs); - acpigen_pop_len(); - } + acpi_inject_nvsa(); } void acpi_fill_fadt(acpi_fadt_t *fadt) -- To view, visit https://review.coreboot.org/c/coreboot/+/42494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45a2d9cb7f07609a1ff03fd70f17c3f2d4f013b9 Gerrit-Change-Number: 42494 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/braswell: Refactor acpi_init_gnvs()
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42863 ) Change subject: soc/intel/braswell: Refactor acpi_init_gnvs() ...................................................................... soc/intel/braswell: Refactor acpi_init_gnvs() Move GNVS details to different function, called from acpi_create_gnvs(). Change-Id: Ief02c078fe37753c0d29418394a351105a1aacc8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/braswell/acpi.c 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/42863/1 diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index cb8b1b5..b0179ee 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -70,6 +70,12 @@ /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = nc_read_top_of_low_memory(); + + /* Fill in the Wi-Fi Region ID */ + if (CONFIG(HAVE_REGULATORY_DOMAIN)) + gnvs->cid1 = wifi_regulatory_domain(); + else + gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN; } static int acpi_sci_irq(void) @@ -483,12 +489,6 @@ if (gnvs) { acpi_create_gnvs(gnvs); - /* Fill in the Wi-Fi Region ID */ - if (CONFIG(HAVE_REGULATORY_DOMAIN)) - gnvs->cid1 = wifi_regulatory_domain(); - else - gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN; - /* Add it to DSDT */ acpigen_write_scope("\\"); acpigen_write_name_dword("NVSA", (u32) gnvs); -- To view, visit https://review.coreboot.org/c/coreboot/+/42863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief02c078fe37753c0d29418394a351105a1aacc8 Gerrit-Change-Number: 42863 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: ACPI: Drop redundant ChromeOS setup for GNVS
by Kyösti Mälkki (Code Review) 31 Jul '20

31 Jul '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42493 ) Change subject: ACPI: Drop redundant ChromeOS setup for GNVS ...................................................................... ACPI: Drop redundant ChromeOS setup for GNVS Already done in common gnvs_get_or_create() implementation. Change-Id: I90fa2bc28ae76da734b3f88be057435aed9fe374 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/icelake/acpi.c M src/soc/intel/jasperlake/acpi.c M src/soc/intel/skylake/acpi.c M src/soc/intel/tigerlake/acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 13 files changed, 0 insertions(+), 118 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/42493/1 diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 3d45760..dae0105 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -246,12 +246,6 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs) { - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&gnvs->chromeos); - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index f5f5073..b79ed0e 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -221,12 +221,6 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs) { - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&gnvs->chromeos); - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 500ad44..476b0d7 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -75,12 +75,6 @@ struct soc_intel_apollolake_config *cfg; cfg = config_of_soc(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&gnvs->chromeos); - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Set unknown wake source */ gnvs->pm1i = ~0ULL; diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 3a8a542..b098026 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -20,7 +20,6 @@ #include <soc/pmc.h> #include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #define MWAIT_RES(state, sub_state) \ { \ @@ -67,17 +66,6 @@ /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = nc_read_top_of_low_memory(); - - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } } static int acpi_sci_irq(void) diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index cbea1ae..d16e404 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -23,7 +23,6 @@ #include <soc/pm.h> #include <string.h> #include <types.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> #define MWAIT_RES(state, sub_state) \ @@ -71,17 +70,6 @@ /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = nc_read_top_of_low_memory(); - - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } } static int acpi_sci_irq(void) diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 609e2da..ace6948 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -14,7 +14,6 @@ #include <cpu/x86/tsc.h> #include <cpu/intel/turbo.h> #include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> @@ -155,17 +154,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } } unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 83bb8e2..b8931f4 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -19,7 +19,6 @@ #include <soc/pm.h> #include <soc/systemagent.h> #include <string.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> #include "chip.h" @@ -193,17 +192,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 915c741..aaeb292 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -17,7 +17,6 @@ #include <soc/soc_chip.h> #include <soc/systemagent.h> #include <string.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> /* @@ -188,16 +187,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index bc80c84..6440688 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -282,16 +282,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 628e933..a5125f6 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -29,7 +29,6 @@ #include <soc/systemagent.h> #include <string.h> #include <types.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <wrdd.h> #include <device/pci_ops.h> @@ -165,17 +164,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else { - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 71dfcad..77109e0 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -282,16 +282,6 @@ /* CPU core count */ gnvs->pcnt = dev_count_cpu(); - if (CONFIG(CHROMEOS)) { - /* Initialize Verified Boot data */ - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - gnvs->chromeos.vbt2 = google_ec_running_ro() ? - ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; - } else - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; - } - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable; diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 5195825..806dc5f 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -660,9 +660,6 @@ gnvs->mpen = 1; /* Enable Multi Processing */ gnvs->pcnt = dev_count_cpu(); -#if CONFIG(CHROMEOS) - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); -#endif /* Add it to DSDT. */ diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 0ac9ad0..735956a 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -704,12 +704,6 @@ gnvs->mpen = 1; /* Enable Multi Processing */ gnvs->pcnt = dev_count_cpu(); -#if CONFIG(CHROMEOS) - chromeos_init_chromeos_acpi(&(gnvs->chromeos)); -#endif - - - /* Add it to DSDT. */ acpigen_write_scope("\\"); acpigen_write_name_dword("NVSA", (u32) gnvs); -- To view, visit https://review.coreboot.org/c/coreboot/+/42493 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90fa2bc28ae76da734b3f88be057435aed9fe374 Gerrit-Change-Number: 42493 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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