coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: libpayload/drivers/nvram: Add function to write RTC
by Angel Pons (Code Review) 16 Mar '20

16 Mar '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23585 ) Change subject: libpayload/drivers/nvram: Add function to write RTC ...................................................................... Patch Set 7: Code-Review+1 (1 comment) https://review.coreboot.org/c/coreboot/+/23585/7/payloads/libpayload/driver… File payloads/libpayload/drivers/nvram.c: https://review.coreboot.org/c/coreboot/+/23585/7/payloads/libpayload/driver… PS7, Line 185: !(statusB & NVRAM_RTC_FORMAT_BINARY) Maybe place this check inside a wrapper for nvram_write()? That way, the writes don't have to be duplicated -- To view, visit https://review.coreboot.org/c/coreboot/+/23585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17b4c1ee0dcc649738ac6a7400b087d07213eaf0 Gerrit-Change-Number: 23585 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 16 Mar 2020 09:10:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/i945: Program CxODT value for each channel
by Paul Menzel (Code Review) 16 Mar '20

16 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18548 ) Change subject: nb/intel/i945: Program CxODT value for each channel ...................................................................... Patch Set 35: (1 comment) https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… File src/northbridge/intel/i945/raminit.c: https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… PS34, Line 2450: one > no […] We are talking about `(populated_dimms & 3) == 1 != (populated_dimms & 3) == 2)`, right? If `(populated_dimms & 3) == 0`, the statement above evaluates to false as `0 != 0` is not true. The value wouldn’t be written. -- To view, visit https://review.coreboot.org/c/coreboot/+/18548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aec35f45250da554ddc5a68f5add157c313399c Gerrit-Change-Number: 18548 Gerrit-PatchSet: 35 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 16 Mar 2020 08:54:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/i945: Program CxODT value for each channel
by HAOUAS Elyes (Code Review) 16 Mar '20

16 Mar '20

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18548 ) Change subject: nb/intel/i945: Program CxODT value for each channel ...................................................................... Patch Set 35: (1 comment) https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… File src/northbridge/intel/i945/raminit.c: https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… PS34, Line 2450: one > Looking at patch set 35, you agree with my statement? no we write on C0ODT here if ( (dimm0 populated and dimm1 not populated) or (dimm0 not populated and dimm1 is populated ) old mask (let say only for channel 0) is : case #1: 00b & 11b = 0 <-- here we don't have to write on C0ODT case #2: 10b & 11b = 2 case #3: 01b & 11b = 1 case #4: 11b & 11b = 3 <-- here we don't have to write on C0ODT in your statement, (popp & 3 == 0) is missing and also you are using only case #3 -- To view, visit https://review.coreboot.org/c/coreboot/+/18548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aec35f45250da554ddc5a68f5add157c313399c Gerrit-Change-Number: 18548 Gerrit-PatchSet: 35 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 16 Mar 2020 08:33:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8183: Add get dram type API at ATF
by huayang duan (Code Review) 16 Mar '20

16 Mar '20

Hello Duan huayang, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/39097 to review the following change. Change subject: soc/mediatek/mt8183: Add get dram type API at ATF ...................................................................... soc/mediatek/mt8183: Add get dram type API at ATF DVFS module need know the dram type at ATF for loading the correct spm binary. BRANCH=kukui BUG=none TEST=bootup pass Change-Id: I20afc00c4c671abcbb6f36eb8e3e364529e9389c Signed-off-by: Huayang Duan <huayang.duan(a)mediatek.com> --- M src/mainboard/google/kukui/mainboard.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/39097/1 diff --git a/src/mainboard/google/kukui/mainboard.c b/src/mainboard/google/kukui/mainboard.c index 844496d..da39c1c 100644 --- a/src/mainboard/google/kukui/mainboard.c +++ b/src/mainboard/google/kukui/mainboard.c @@ -184,8 +184,19 @@ .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, }; + /* use .polarity to save dram type value */ + static struct bl_aux_param_gpio param_dram_type = { + .h = { .type = BL_AUX_PARAM_MTK_DRAM_TYPE }, +#if CONFIG(MT8183_DRAM_EMCP) + .gpio = { .polarity = DRAMC_CONFIG_EMCP }, +#else + .gpio = { .polarity = 0 }, +#endif + }; + param_reset.gpio.index = GPIO_RESET.id; register_bl31_aux_param(&param_reset.h); + register_bl31_aux_param(&param_dram_type.h); } static void mainboard_init(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/39097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20afc00c4c671abcbb6f36eb8e3e364529e9389c Gerrit-Change-Number: 39097 Gerrit-PatchSet: 1 Gerrit-Owner: huayang duan <huayangduan(a)gmail.com> Gerrit-Reviewer: Duan huayang <huayang.duan(a)mediatek.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake:add support to read spd data from SMBUS
by Paul Menzel (Code Review) 16 Mar '20

16 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39401 ) Change subject: soc/intel/tigerlake:add support to read spd data from SMBUS ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/39401/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39401/1//COMMIT_MSG@6 PS1, Line 6: : soc/intel/tigerlake:add Please add one space after the colon. -- To view, visit https://review.coreboot.org/c/coreboot/+/39401 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94f8707c731c8afa1106e387a246c000bd53a654 Gerrit-Change-Number: 39401 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 16 Mar 2020 07:58:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: memory config for JSLRVP
by Paul Menzel (Code Review) 16 Mar '20

16 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39195 ) Change subject: mb/intel/jasperlake_rvp: memory config for JSLRVP ...................................................................... Patch Set 3: (4 comments) https://review.coreboot.org/c/coreboot/+/39195/3//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39195/3//COMMIT_MSG@7 PS3, Line 7: mb/intel/jasperlake_rvp: memory config for JSLRVP Please make it a statement by adding a verb (in imperative mood). https://review.coreboot.org/c/coreboot/+/39195/3//COMMIT_MSG@8 PS3, Line 8: Please write a commit message. https://review.coreboot.org/c/coreboot/+/39195/3/src/mainboard/intel/jasper… File src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/39195/3/src/mainboard/intel/jasper… PS3, Line 30: {.spd_smbus_address[1] = 0xA0, : .spd_smbus_address[2] = 0xA2, : .spd_smbus_address[3] = 0xA4, : .spd_smbus_address[1] = 0xA6} Please add appropriate spaces. https://review.coreboot.org/c/coreboot/+/39195/3/src/mainboard/intel/jasper… File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory_ddr4.c: https://review.coreboot.org/c/coreboot/+/39195/3/src/mainboard/intel/jasper… PS3, Line 58: */ One line, and remove the dot/period at the end. -- To view, visit https://review.coreboot.org/c/coreboot/+/39195 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc92363a2148990df16c2068c7986013d015f604 Gerrit-Change-Number: 39195 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 16 Mar 2020 07:58:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: jasperlake_rvp: UART config for JSLRVP
by Paul Menzel (Code Review) 16 Mar '20

16 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39196 ) Change subject: jasperlake_rvp: UART config for JSLRVP ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/39196/5//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39196/5//COMMIT_MSG@7 PS5, Line 7: jasperlake_rvp: UART config for JSLRVP Please make it a statement by adding a verb (in imperative mood). -- To view, visit https://review.coreboot.org/c/coreboot/+/39196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic042cdc449b77c2d9bdd7a63777328e47f910654 Gerrit-Change-Number: 39196 Gerrit-PatchSet: 5 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 16 Mar 2020 07:55:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/i945: Program CxODT value for each channel
by Paul Menzel (Code Review) 16 Mar '20

16 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18548 ) Change subject: nb/intel/i945: Program CxODT value for each channel ...................................................................... Patch Set 35: (1 comment) https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… File src/northbridge/intel/i945/raminit.c: https://review.coreboot.org/c/coreboot/+/18548/34/src/northbridge/intel/i94… PS34, Line 2450: one > here we are not looking for *at least* but *only one* […] Looking at patch set 35, you agree with my statement? -- To view, visit https://review.coreboot.org/c/coreboot/+/18548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7aec35f45250da554ddc5a68f5add157c313399c Gerrit-Change-Number: 18548 Gerrit-PatchSet: 35 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 16 Mar 2020 07:48:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/Kconfig: Avoid specify dedicated chipset name
by Subrata Banik (Code Review) 16 Mar '20

16 Mar '20

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39530 ) Change subject: soc/intel/Kconfig: Avoid specify dedicated chipset name ...................................................................... soc/intel/Kconfig: Avoid specify dedicated chipset name This patch ensures all IA chipsets and common Kconfig files are getting included without specifying dedicated chipset names. TEST=Able to compile CML and TGL RVP. Change-Id: Ic2d8a8ac1c4acfabd4ded1bfd4ff359e820e174b Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/Kconfig 1 file changed, 2 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/39530/1 diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig index 47efc4d..0f8f0af 100644 --- a/src/soc/intel/Kconfig +++ b/src/soc/intel/Kconfig @@ -1,18 +1,5 @@ -# Load all chipsets -source "src/soc/intel/apollolake/Kconfig" -source "src/soc/intel/baytrail/Kconfig" -source "src/soc/intel/braswell/Kconfig" -source "src/soc/intel/broadwell/Kconfig" -source "src/soc/intel/cannonlake/Kconfig" -source "src/soc/intel/denverton_ns/Kconfig" -source "src/soc/intel/quark/Kconfig" -source "src/soc/intel/skylake/Kconfig" -source "src/soc/intel/icelake/Kconfig" -source "src/soc/intel/tigerlake/Kconfig" -source "src/soc/intel/xeon_sp/Kconfig" - -# Load common config -source "src/soc/intel/common/Kconfig" +# Load all chipsets and common config +source "src/soc/intel/*/Kconfig" config INTEL_HAS_TOP_SWAP bool -- To view, visit https://review.coreboot.org/c/coreboot/+/39530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d8a8ac1c4acfabd4ded1bfd4ff359e820e174b Gerrit-Change-Number: 39530 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Revert "crossgcc: Upgrade GDB to version 8.3.1"
by Patrick Rudolph (Code Review) 15 Mar '20

15 Mar '20

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39572 ) Change subject: Revert "crossgcc: Upgrade GDB to version 8.3.1" ...................................................................... Revert "crossgcc: Upgrade GDB to version 8.3.1" This reverts commit 2368681c83e1c0de4df07c5ea9d881e5b284406d. Change-Id: I462263262910bb727ea569412950dfa63d901d80 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M util/crossgcc/buildgcc R util/crossgcc/patches/gdb-8.3_amd64.patch R util/crossgcc/patches/gdb-8.3_no-doc.patch R util/crossgcc/patches/gdb-8.3_pythonhome.patch D util/crossgcc/sum/gdb-8.3.1.tar.xz.cksum A util/crossgcc/sum/gdb-8.3.tar.xz.cksum 6 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/39572/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 9920799..65746d9 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -53,10 +53,10 @@ GCC_VERSION=9.2.0 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.33.1 -GDB_VERSION=8.3.1 IASL_VERSION=20200110 PYTHON_VERSION=3.8.1 EXPAT_VERSION=2.2.9 +GDB_VERSION=8.3 # CLANG version number CLANG_VERSION=9.0.0 MAKE_VERSION=4.2.1 diff --git a/util/crossgcc/patches/gdb-8.3.1_amd64.patch b/util/crossgcc/patches/gdb-8.3_amd64.patch similarity index 100% rename from util/crossgcc/patches/gdb-8.3.1_amd64.patch rename to util/crossgcc/patches/gdb-8.3_amd64.patch diff --git a/util/crossgcc/patches/gdb-8.3.1_no-doc.patch b/util/crossgcc/patches/gdb-8.3_no-doc.patch similarity index 100% rename from util/crossgcc/patches/gdb-8.3.1_no-doc.patch rename to util/crossgcc/patches/gdb-8.3_no-doc.patch diff --git a/util/crossgcc/patches/gdb-8.3.1_pythonhome.patch b/util/crossgcc/patches/gdb-8.3_pythonhome.patch similarity index 100% rename from util/crossgcc/patches/gdb-8.3.1_pythonhome.patch rename to util/crossgcc/patches/gdb-8.3_pythonhome.patch diff --git a/util/crossgcc/sum/gdb-8.3.1.tar.xz.cksum b/util/crossgcc/sum/gdb-8.3.1.tar.xz.cksum deleted file mode 100644 index c362858..0000000 --- a/util/crossgcc/sum/gdb-8.3.1.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -d403ba208945bbf04f8130ea4853730cdf0c8fc7 tarballs/gdb-8.3.1.tar.xz diff --git a/util/crossgcc/sum/gdb-8.3.tar.xz.cksum b/util/crossgcc/sum/gdb-8.3.tar.xz.cksum new file mode 100644 index 0000000..bc82f51 --- /dev/null +++ b/util/crossgcc/sum/gdb-8.3.tar.xz.cksum @@ -0,0 +1 @@ +f45de6af561f0fa0241f0d5085198556fcfd1e5e tarballs/gdb-8.3.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/39572 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I462263262910bb727ea569412950dfa63d901d80 Gerrit-Change-Number: 39572 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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coreboot-gerrit March 2020