coreboot-gerrit February 2020

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Change in coreboot[master]: sc7180: Add UART support
by mturney mturney (Code Review) 28 Feb '20

28 Feb '20

Hello Julius Werner, Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35500 to look at the new patch set (#40). Change subject: sc7180: Add UART support ...................................................................... sc7180: Add UART support This implements the UART driver in SoC Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25373/78 Change-Id: I6494daa108197c030577ac86dab71f9ca6c21bdb Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Kconfig M src/soc/qualcomm/sc7180/Makefile.inc A src/soc/qualcomm/sc7180/qupv3_uart.c 3 files changed, 179 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/35500/40 -- To view, visit https://review.coreboot.org/c/coreboot/+/35500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6494daa108197c030577ac86dab71f9ca6c21bdb Gerrit-Change-Number: 35500 Gerrit-PatchSet: 40 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7180: Add QUPv3 FW load & config
by mturney mturney (Code Review) 28 Feb '20

28 Feb '20

Hello Doug Anderson, Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35499 to look at the new patch set (#40). Change subject: sc7180: Add QUPv3 FW load & config ...................................................................... sc7180: Add QUPv3 FW load & config UART driver requires firmware loading Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25372/78 https://review.coreboot.org/c/coreboot/+/27483/58 Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Signed-off-by: Roja Rani Yarubandi <rojay(a)codeaurora.org> --- M src/soc/qualcomm/sc7180/Makefile.inc M src/soc/qualcomm/sc7180/bootblock.c M src/soc/qualcomm/sc7180/include/soc/addressmap.h A src/soc/qualcomm/sc7180/include/soc/qcom_qup_se.h A src/soc/qualcomm/sc7180/include/soc/qupv3_config.h A src/soc/qualcomm/sc7180/qcom_qup_se.c A src/soc/qualcomm/sc7180/qupv3_config.c 7 files changed, 1,036 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/35499/40 -- To view, visit https://review.coreboot.org/c/coreboot/+/35499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Gerrit-Change-Number: 35499 Gerrit-PatchSet: 40 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-CC: Stephen Boyd <swboyd(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/apl: disable NPK device in devicetree.cb
by Aaron Durbin (Code Review) 28 Feb '20

28 Feb '20

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38814 ) Change subject: soc/intel/apl: disable NPK device in devicetree.cb ...................................................................... Patch Set 13: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/38814/13/src/soc/intel/apollolake/… File src/soc/intel/apollolake/romstage.c: https://review.coreboot.org/c/coreboot/+/38814/13/src/soc/intel/apollolake/… PS13, Line 295: #if CONFIG(SOC_INTEL_GLK) > Can C if statement be used? Presumably not since field names are different between the 2 headers. -- To view, visit https://review.coreboot.org/c/coreboot/+/38814 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I910245d4ff35a6a0a9059fb6911d4426cdb999b6 Gerrit-Change-Number: 38814 Gerrit-PatchSet: 13 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 28 Feb 2020 16:44:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: superio/common: Validate devicetree
by Patrick Rudolph (Code Review) 28 Feb '20

28 Feb '20

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38863 ) Change subject: superio/common: Validate devicetree ...................................................................... superio/common: Validate devicetree As the SSDT generator for LDNs expects a "parent" PNP device for proper ACPI code generation, validate that it is present. Make sure the devicetree looks as expected and print a BUG message if that's not the case. Tested on HP Z220: No BUG message was printed. Change-Id: I6cbcba8ac86a2a837e23055fdd7e529f9b3277a2 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/superio/common/ssdt.c 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/38863/1 diff --git a/src/superio/common/ssdt.c b/src/superio/common/ssdt.c index 7aa24ea..945d0a6 100644 --- a/src/superio/common/ssdt.c +++ b/src/superio/common/ssdt.c @@ -168,6 +168,21 @@ const u8 vldn = (dev->path.pnp.device >> 8) & 0x7; const char *hid; + /* Validate devicetree settings */ + if (dev && dev->bus && dev->bus->dev) { + bool bug = false; + if (dev->bus->dev->path.type != DEVICE_PATH_PNP) { + bug = true; + printk(BIOS_CRIT, "BUG: Parent of device %s is not a PNP device\n", + dev_path(dev)); + } else if (dev->bus->dev->path.pnp.port != dev->path.pnp.port) { + bug = true; + printk(BIOS_CRIT, "BUG: Parent of device %s has wrong I/O port\n", + dev_path(dev)); + } + if (bug) + printk(BIOS_CRIT, "BUG: Check your devicetree!\n"); + } if (!scope || !name) { printk(BIOS_ERR, "%s: Missing ACPI path/scope\n", dev_path(dev)); return; -- To view, visit https://review.coreboot.org/c/coreboot/+/38863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cbcba8ac86a2a837e23055fdd7e529f9b3277a2 Gerrit-Change-Number: 38863 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: payloads/tianocore: Enable PS2 keyboard module
by Angel Pons (Code Review) 28 Feb '20

28 Feb '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38960 ) Change subject: payloads/tianocore: Enable PS2 keyboard module ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/38960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6d468809142a0049ce1648217d62b070229ad6b Gerrit-Change-Number: 38960 Gerrit-PatchSet: 4 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 28 Feb 2020 16:12:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/google/volteer: Migrate onto SKU ID helpers
by Edward O'Callaghan (Code Review) 28 Feb '20

28 Feb '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39037 ) Change subject: mainboard/google/volteer: Migrate onto SKU ID helpers ...................................................................... mainboard/google/volteer: Migrate onto SKU ID helpers Leverage the common sku id space helper encoders. volteer uses the non-legacy SKU ID space. BUG=b:149348474 BRANCH=none TEST=tested on hatch Change-Id: Ic66908afb7abb34527b4177cfd07f03ad718317c Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/mainboard.c 2 files changed, 2 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/39037/1 diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 572a100..2c77b0e 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -14,6 +14,7 @@ select MAINBOARD_HAS_SPI_TPM_CR50 select MAINBOARD_HAS_TPM2 select SOC_INTEL_TIGERLAKE + select EC_GOOGLE_CHROMEEC_SKU_ID_MAX if BOARD_GOOGLE_BASEBOARD_VOLTEER diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index 51cbc40..dcefb5d 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -17,36 +17,9 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <variant/gpio.h> -#define SKU_UNKNOWN 0xFFFFFFFF -#define SKU_MAX 0x7FFFFFFF - -static uint32_t get_board_sku(void) -{ - static uint32_t sku_id = SKU_UNKNOWN; - - if (sku_id != SKU_UNKNOWN) - return sku_id; - - if (google_chromeec_cbi_get_sku_id(&sku_id)) - sku_id = SKU_UNKNOWN; - - return sku_id; -} - const char *smbios_system_sku(void) { - static char sku_str[14]; /* sku{0..2147483647} */ - uint32_t sku_id = get_board_sku(); - - if ((sku_id == SKU_UNKNOWN) || (sku_id > SKU_MAX)) { - printk(BIOS_ERR, "%s: Unexpected SKU ID %u\n", - __func__, sku_id); - return ""; - } - - snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); - - return sku_str; + return google_chromeec_smbios_system_sku(); } static void mainboard_init(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/39037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic66908afb7abb34527b4177cfd07f03ad718317c Gerrit-Change-Number: 39037 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: payloads/ext/tianocore/Makefile: Enable quiet mode
by Angel Pons (Code Review) 28 Feb '20

28 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39123 ) Change subject: payloads/ext/tianocore/Makefile: Enable quiet mode ...................................................................... payloads/ext/tianocore/Makefile: Enable quiet mode The build process of this payload is unnecessarily prolix. Therefore, make use of the `-u` flag to abridge the output. Tested by building for X64, UEFIPAYLOAD.fd does not differ. Change-Id: I6eba069ff5be2813d180dae40ab10155f0542f33 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M payloads/external/tianocore/Makefile 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/39123/1 diff --git a/payloads/external/tianocore/Makefile b/payloads/external/tianocore/Makefile index 7adb700..3fc9ce5 100644 --- a/payloads/external/tianocore/Makefile +++ b/payloads/external/tianocore/Makefile @@ -49,9 +49,9 @@ endif ifeq ($(CONFIG_TIANOCORE_TARGET_IA32), y) - BUILD_STR=-a IA32 -t COREBOOT -p $(bootloader)/$(bootloader)Ia32.dsc -b $(BUILD_TYPE) $(TIMER) $(build_flavor) + BUILD_STR=-a IA32 -q -t COREBOOT -p $(bootloader)/$(bootloader)Ia32.dsc -b $(BUILD_TYPE) $(TIMER) $(build_flavor) else - BUILD_STR=-a IA32 -a X64 -t COREBOOT -p $(bootloader)/$(bootloader)Ia32X64.dsc -b $(BUILD_TYPE) $(TIMER) $(build_flavor) + BUILD_STR=-a IA32 -q -a X64 -t COREBOOT -p $(bootloader)/$(bootloader)Ia32X64.dsc -b $(BUILD_TYPE) $(TIMER) $(build_flavor) endif all: clean build -- To view, visit https://review.coreboot.org/c/coreboot/+/39123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6eba069ff5be2813d180dae40ab10155f0542f33 Gerrit-Change-Number: 39123 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP]Docs/project_ideas.md: Add a memtest libpayload based payload
by Arthur Heymans (Code Review) 28 Feb '20

28 Feb '20

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36747 ) Change subject: [WIP]Docs/project_ideas.md: Add a memtest libpayload based payload ...................................................................... [WIP]Docs/project_ideas.md: Add a memtest libpayload based payload Change-Id: Iebdb75b99e18fe92aa4c801769532781edf44d9a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Documentation/contributing/project_ideas.md 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/36747/1 diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md index 21a756d..d2134ce 100644 --- a/Documentation/contributing/project_ideas.md +++ b/Documentation/contributing/project_ideas.md @@ -201,3 +201,21 @@ ### Mentors * Ron Minnich <rminnich(a)google.com> + +## Libpayload based memtest payload +[Memtest86+](https://www.memtest.org/) has some limitations: first and +foremost it only works on x86, while it can print to serial console the +GUI only works in legacy VGA mode. + +This project would involve porting the memtest suite to libpayload and +build a payload around it. + +### Requirements +* coreboot knowledge: Should know how to build coreboot images and + include payloads. +* other knowledge: Knowledge on how dram works is a plus. +* hardware requirements: Initial work can happen on qemu targets, + being able to test on coreboot supported hardware is a plus. + +### Mentors +* TODO -- To view, visit https://review.coreboot.org/c/coreboot/+/36747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebdb75b99e18fe92aa4c801769532781edf44d9a Gerrit-Change-Number: 36747 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/asrock/h110m: add libgfxinit support
by Angel Pons (Code Review) 28 Feb '20

28 Feb '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39104 ) Change subject: mb/asrock/h110m: add libgfxinit support ...................................................................... Patch Set 10: Code-Review+2 (1 comment) https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39104/10//COMMIT_MSG@7 PS10, Line 7: mb/asrock/h110m: add libgfxinit support You should remove the "Analog" port in gma-mainboard.ads, as it does not exist. -- To view, visit https://review.coreboot.org/c/coreboot/+/39104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d87413f87d00986111ecb7b046423ff5eac1bf1 Gerrit-Change-Number: 39104 Gerrit-PatchSet: 10 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 28 Feb 2020 09:50:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/asrock/h110m: remove the wrong comment about SATA
by Angel Pons (Code Review) 28 Feb '20

28 Feb '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39119 ) Change subject: mb/asrock/h110m: remove the wrong comment about SATA ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/c/coreboot/+/39119/9//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39119/9//COMMIT_MSG@7 PS9, Line 7: mb/asrock/h110m: remove the wrong comment about SATA With the suggested comment change, this could be: mb/asrock/h110m: Explain why some SATA ports are empty -- To view, visit https://review.coreboot.org/c/coreboot/+/39119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0a24fab22ee082367b82b3e8ee7383f1f02a4ad Gerrit-Change-Number: 39119 Gerrit-PatchSet: 9 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 28 Feb 2020 09:48:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2020