coreboot-gerrit February 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)
by Vijay P Hiremath (Code Review) 07 Feb '20

07 Feb '20

Vijay P Hiremath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37867 ) Change subject: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) ...................................................................... Patch Set 15: (1 comment) https://review.coreboot.org/c/coreboot/+/37867/15/src/ec/google/chromeec/ec… File src/ec/google/chromeec/ec.c: https://review.coreboot.org/c/coreboot/+/37867/15/src/ec/google/chromeec/ec… PS15, Line 1549: int uint8_t -- To view, visit https://review.coreboot.org/c/coreboot/+/37867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96bfb6036f4340ba42a078cfd7ecaae777a3ed00 Gerrit-Change-Number: 37867 Gerrit-PatchSet: 15 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Divya S Sasidharan <divya.s.sasidharan(a)intel.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Comment-Date: Fri, 07 Feb 2020 19:44:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 ) Change subject: soc/intel/tigerlake: Add code for early tcss ...................................................................... Patch Set 23: (14 comments) https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/K… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/K… PS17, Line 220: > nit: Extra blank line not required. Done https://review.coreboot.org/c/coreboot/+/37870/9/src/soc/intel/tigerlake/ea… File src/soc/intel/tigerlake/early_tcss.c: https://review.coreboot.org/c/coreboot/+/37870/9/src/soc/intel/tigerlake/ea… PS9, Line 29: * Flags representing mux state */ > if there is a similar file, move these to that file […] Done https://review.coreboot.org/c/coreboot/+/37870/9/src/soc/intel/tigerlake/ea… PS9, Line 73: "Port %d tcss_res=0x%x" > please terminate with newline Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… File src/soc/intel/tigerlake/early_tcss.c: https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 18: #include <console/post_codes.h> > This was being used in an earlier iteration will remove Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 27: > use tab Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 29: /* Flags representing mux state */ : #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ : #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ : #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ : #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ : #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ : > will address this today... […] Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 81: google_chromeec_usb_get_pd_ports > Humm.. I understand that this is something which is very Chrome OS/Chrome EC specific. […] Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 81: num_ports = google_chromeec_usb_get_pd_ports(); > Maybe the signature should be changed. Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 93: port_map = google_chromeec_pd_get_port_info(i); > i mean need to return error in CL:37867 so that this code can use it Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 115: BS_OS_RESUME > My understanding is that coreboot needed to reconnect the devices on resume. […] Done https://review.coreboot.org/c/coreboot/+/37870/10/src/soc/intel/tigerlake/e… PS10, Line 116: BS_PAYLOAD_LOAD > I will take that into account when adding in the early display code. […] Done https://review.coreboot.org/c/coreboot/+/37870/16/src/soc/intel/tigerlake/e… File src/soc/intel/tigerlake/early_tcss.c: https://review.coreboot.org/c/coreboot/+/37870/16/src/soc/intel/tigerlake/e… PS16, Line 155: mux_flags & USB_PD_MUX_USB_ENABLED > please change all the below items to bool […] I assume all the flags only so usb, dp, cable, polarity, hpd_irq, and hpd_lvl? and it should be mux_data.usb = !!(mux_flags & USB_PD_MUX_USB_ENABLED) correct? https://review.coreboot.org/c/coreboot/+/37870/16/src/soc/intel/tigerlake/e… PS16, Line 158: mux_data.polarity = mux_flags & USB_PD_MUX_POLARITY_INVERTED; > This is applicable to Virtual muxes only (SOC has the mux). […] Ack https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/e… File src/soc/intel/tigerlake/early_tcss.c: https://review.coreboot.org/c/coreboot/+/37870/17/src/soc/intel/tigerlake/e… PS17, Line 174: BS_DEV_ENABLE > I think this is still too late. FSP-S gets called as part of chip init. […] ok I'll have to change this up a bit then and add an early_tcss.h file. will update in the next push -- To view, visit https://review.coreboot.org/c/coreboot/+/37870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c3fe9d4a2ec2f2f51b78cca2bd7e623540c00e Gerrit-Change-Number: 37870 Gerrit-PatchSet: 23 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Comment-Date: Fri, 07 Feb 2020 19:36:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Comment-In-Reply-To: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Comment-In-Reply-To: caveh jalali <caveh(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Vijay P Hiremath (Code Review) 07 Feb '20

07 Feb '20

Vijay P Hiremath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 ) Change subject: soc/intel/tigerlake: Add code for early tcss ...................................................................... Patch Set 23: (2 comments) https://review.coreboot.org/c/coreboot/+/37870/23/src/soc/intel/tigerlake/e… File src/soc/intel/tigerlake/early_tcss.c: https://review.coreboot.org/c/coreboot/+/37870/23/src/soc/intel/tigerlake/e… PS23, Line 123: tcss_req[0] = PMC_IPC_TCSS_CONN_REQ_RES | /* Usage */ : mux_data.usb3_port << 4; : tcss_req[1] = mux_data.usb2_port | : mux_data.ufp << 4 | /* 1=UFP/0=DFP */ : mux_data.polarity << 5 | /* ORI-HSL */ : mux_data.polarity << 6 | /* ORI-SBU */ : mux_data.acc << 7; : req_size = PMC_IPC_CONN_REQ_SIZE; : printk(BIOS_DEBUG, "tcss_req[0]-> 0x%x\n" : "tcss_req[1]-> 0x%x\n\t", tcss_req[0], tcss_req[1]); : : /* Copy the request into the buffer */ : memcpy(wbuf, tcss_req, req_size); : : cmd.ipc_cmd.len = req_size; : pls add a function, tcss_mux_connect() https://review.coreboot.org/c/coreboot/+/37870/23/src/soc/intel/tigerlake/e… PS23, Line 145: ret = send_dp_required_ipc_commands(mux_data); for docks both usb=1 & dp=1 hence, if (!mux_data.usb) only then send another connect request -- To view, visit https://review.coreboot.org/c/coreboot/+/37870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c3fe9d4a2ec2f2f51b78cca2bd7e623540c00e Gerrit-Change-Number: 37870 Gerrit-PatchSet: 23 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Comment-Date: Fri, 07 Feb 2020 19:35:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

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Change in coreboot[master]: mb/dell: Add Dell Optiplex 790
by Mimoja (Code Review) 07 Feb '20

07 Feb '20

Mimoja has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21774 ) Change subject: mb/dell: Add Dell Optiplex 790 ...................................................................... Patch Set 63: Code-Review+1 Looks good to me, please fix all comments :) -- To view, visit https://review.coreboot.org/c/coreboot/+/21774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3d3a13163d5da1368259a7498019d42fb3ed57f Gerrit-Change-Number: 21774 Gerrit-PatchSet: 63 Gerrit-Owner: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christoph Pomaska <github(a)slrie.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Fri, 07 Feb 2020 19:25:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

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Change in coreboot[master]: soc/intel/common/block: Enable PMC IPC driver
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

Brandon Breitenstein has uploaded a new patch set (#17) to the change originally created by Shaunak Saha. ( https://review.coreboot.org/c/coreboot/+/37871 ) Change subject: soc/intel/common/block: Enable PMC IPC driver ...................................................................... soc/intel/common/block: Enable PMC IPC driver In order for USB Type-C devices to be detected prior to loading Kernel PMC IPC driver API is needed to send IPC commands to the PMC to update connection/disconnection states. BUG=b:141608957 BRANCH=none TEST: built coreboot image and booted to Chrome OS Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com> Change-Id: Ibd3ed262fc700ccc891ec68997a108f5bfbaf9ed Signed-off-by: Brandon Breitenstein <brandon.breitenstein(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/pmclib.h M src/soc/intel/common/block/pmc/pmclib.c 2 files changed, 100 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/37871/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/37871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd3ed262fc700ccc891ec68997a108f5bfbaf9ed Gerrit-Change-Number: 37871 Gerrit-PatchSet: 17 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

Brandon Breitenstein has uploaded a new patch set (#15) to the change originally created by Shaunak Saha. ( https://review.coreboot.org/c/coreboot/+/37867 ) Change subject: src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) ...................................................................... src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM) EC being the TCPM decides the mux configuration after negotiating with the port partner on the Type-C port. The APIS added here will give the current essential mux state information for a given port. BUG=None BRANCH=None TEST= Tested boots from USB Type-C flash drive and Type-C to Type-A dongle on Volteer Change-Id: I96bfb6036f4340ba42a078cfd7ecaae777a3ed00 Signed-off-by: Divya Sasidharan <divya.s.sasidharan(a)intel.com> --- M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec.h M src/ec/google/chromeec/ec_commands.h 3 files changed, 120 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/37867/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/37867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96bfb6036f4340ba42a078cfd7ecaae777a3ed00 Gerrit-Change-Number: 37867 Gerrit-PatchSet: 15 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Divya S Sasidharan <divya.s.sasidharan(a)intel.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

Brandon Breitenstein has uploaded a new patch set (#23) to the change originally created by Shaunak Saha. ( https://review.coreboot.org/c/coreboot/+/37870 ) Change subject: soc/intel/tigerlake: Add code for early tcss ...................................................................... soc/intel/tigerlake: Add code for early tcss In order for USB Type-C to be detected prior to loading Kernel PMC IPC driver is needed to communicate with PMC in order to correctly set the USB Mux settings. This patch is adding in support for early detection of both USB and Display Port. BUG=b:141608957 BRANCH=NONE TEST: built and booted TGL U RVP Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com> Change-Id: I45c3fe9d4a2ec2f2f51b78cca2bd7e623540c00e Signed-off-by: Brandon Breitenstein <brandon.breitenstein(a)intel.com> --- M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc A src/soc/intel/tigerlake/early_tcss.c 3 files changed, 233 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/37870/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/37870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c3fe9d4a2ec2f2f51b78cca2bd7e623540c00e Gerrit-Change-Number: 37870 Gerrit-PatchSet: 23 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-CC: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block: Enable PMC IPC driver
by Brandon Breitenstein (Code Review) 07 Feb '20

07 Feb '20

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37871 ) Change subject: soc/intel/common/block: Enable PMC IPC driver ...................................................................... Patch Set 16: (2 comments) https://review.coreboot.org/c/coreboot/+/37871/16/src/soc/intel/common/bloc… File src/soc/intel/common/block/pmc/pmclib.c: https://review.coreboot.org/c/coreboot/+/37871/16/src/soc/intel/common/bloc… PS16, Line 46: #define PMC_IPC_USBC_CMD_ID 0xA7 > unused? Used in early TCSS https://review.coreboot.org/c/coreboot/+/37871/16/src/soc/intel/common/bloc… PS16, Line 610: check_ips_sts > nit. Typo? check_ipc_sts. Also should it be pmc_check_ipc_sts for consistency. this is what it was on the internal patch so I kept it...but it should be ipc you are right I'll update -- To view, visit https://review.coreboot.org/c/coreboot/+/37871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd3ed262fc700ccc891ec68997a108f5bfbaf9ed Gerrit-Change-Number: 37871 Gerrit-PatchSet: 16 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Keith Short <keithshort(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Fri, 07 Feb 2020 19:24:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Divya Sasidharan <divya.s.sasidharan(a)intel.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit February 2020