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Change in coreboot[master]: soc/intel/apollolake: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46235 ) Change subject: soc/intel/apollolake: Convert to ASL 2.0 syntax ...................................................................... soc/intel/apollolake: Convert to ASL 2.0 syntax Change-Id: Ifc400433323630393566899dbeb5b0fac1a4bd00 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/apollolake/acpi/gpio.asl M src/soc/intel/apollolake/acpi/gpiolib.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/apollolake/acpi/pch_hda.asl M src/soc/intel/apollolake/acpi/pcie_port.asl M src/soc/intel/apollolake/acpi/pmc_ipc.asl M src/soc/intel/apollolake/acpi/scs.asl 7 files changed, 87 insertions(+), 92 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/46235/1 diff --git a/src/soc/intel/apollolake/acpi/gpio.asl b/src/soc/intel/apollolake/acpi/gpio.asl index 1fe58e1..f5795ef 100644 --- a/src/soc/intel/apollolake/acpi/gpio.asl +++ b/src/soc/intel/apollolake/acpi/gpio.asl @@ -25,8 +25,8 @@ Method (_CRS, 0x0, NotSerialized) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - ShiftLeft (GPIO_COMM0_PID, PCR_PORTID_SHIFT, Local0) - Or (CONFIG_PCR_BASE_ADDRESS, Local0, RBAS) + Local0 = GPIO_COMM0_PID << PCR_PORTID_SHIFT + RBAS = CONFIG_PCR_BASE_ADDRESS | Local0 Return (^RBUF) } @@ -55,8 +55,8 @@ Method (_CRS, 0x0, NotSerialized) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - ShiftLeft (GPIO_COMM1_PID, PCR_PORTID_SHIFT, Local0) - Or (CONFIG_PCR_BASE_ADDRESS, Local0, RBAS) + Local0 = GPIO_COMM1_PID << PCR_PORTID_SHIFT + RBAS = CONFIG_PCR_BASE_ADDRESS | Local0 Return (^RBUF) } @@ -85,8 +85,8 @@ Method (_CRS, 0x0, NotSerialized) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - ShiftLeft (GPIO_COMM2_PID, PCR_PORTID_SHIFT, Local0) - Or (CONFIG_PCR_BASE_ADDRESS, Local0, RBAS) + Local0 = GPIO_COMM2_PID << PCR_PORTID_SHIFT + RBAS = CONFIG_PCR_BASE_ADDRESS | Local0 Return (^RBUF) } @@ -115,8 +115,8 @@ Method (_CRS, 0x0, NotSerialized) { CreateDwordField (^RBUF, ^RMEM._BAS, RBAS) - ShiftLeft (GPIO_COMM3_PID, PCR_PORTID_SHIFT, Local0) - Or (CONFIG_PCR_BASE_ADDRESS, Local0, RBAS) + Local0 = GPIO_COMM3_PID << PCR_PORTID_SHIFT + RBAS = CONFIG_PCR_BASE_ADDRESS | Local0 Return (^RBUF) } @@ -137,9 +137,9 @@ * local1 - to toggle Tx pin of Dw0 * local2 - Address of PERST */ - Store (Arg0, Local2) - Store (\_SB.GPC0 (Local2), Local1) - Or (Local1, PAD_CFG0_TX_STATE, Local1) + Local2 = Arg0 + Local1 = \_SB.GPC0 (Local2) + Local1 |= PAD_CFG0_TX_STATE \_SB.SPC0 (Local2, Local1) } @@ -151,9 +151,9 @@ * local1 - to toggle Tx pin of Dw0 * local2 - Address of PERST */ - Store (Arg0, Local2) - Store (\_SB.GPC0 (Local2), Local1) - And (Local1, Not (PAD_CFG0_TX_STATE), Local1) + Local2 = Arg0 + Local1 = \_SB.GPC0 (Local2) + Local1 &= ~PAD_CFG0_TX_STATE \_SB.SPC0 (Local2, Local1) } } diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl index 0ec9140..b7d14cc 100644 --- a/src/soc/intel/apollolake/acpi/gpiolib.asl +++ b/src/soc/intel/apollolake/acpi/gpiolib.asl @@ -6,7 +6,7 @@ Method (GPC0, 0x1, Serialized) { /* Arg0 - GPIO DW0 address */ - Store (Arg0, Local0) + Local0 = Arg0 OperationRegion (PDW0, SystemMemory, Local0, 4) Field (PDW0, AnyAcc, NoLock, Preserve) { TEMP, 32 @@ -19,19 +19,19 @@ { /* Arg0 - GPIO DW0 address */ /* Arg1 - Value for DW0 register */ - Store (Arg0, Local0) + Local0 = Arg0 OperationRegion (PDW0, SystemMemory, Local0, 4) Field (PDW0, AnyAcc, NoLock, Preserve) { TEMP,32 } - Store (Arg1, TEMP) + TEMP = Arg1 } /* Get Pad Configuration DW1 register value */ Method (GPC1, 0x1, Serialized) { /* Arg0 - GPIO DW0 address */ - Store (Add (Arg0, 0x4), Local0) + Local0 = Arg0 + 4 OperationRegion (PDW1, SystemMemory, Local0, 4) Field (PDW1, AnyAcc, NoLock, Preserve) { TEMP, 32 @@ -44,12 +44,12 @@ { /* Arg0 - GPIO DW0 address */ /* Arg1 - Value for DW1 register */ - Store (Add (Arg0, 0x4), Local0) + Local0 = Arg0 + 4 OperationRegion (PDW1, SystemMemory, Local0, 4) Field(PDW1, AnyAcc, NoLock, Preserve) { TEMP,32 } - Store (Arg1, TEMP) + TEMP = Arg1 } /* Get DW0 address of a given pad */ @@ -57,11 +57,9 @@ { /* Arg0 - GPIO portid */ /* Arg1 - GPIO pad offset relative to the community */ - Store (0, Local1) - Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS), - Local1, Local1) - Or( Add (PAD_CFG_BASE, Multiply (Arg1, Multiply ( - GPIO_NUM_PAD_CFG_REGS, 4))), Local1, Local1) + Local1 = 0 + Local1 |= ((Arg0 << 16) | CONFIG_PCR_BASE_ADDRESS) + Local1 |= (PAD_CFG_BASE + (Arg1 * GPIO_NUM_PAD_CFG_REGS * 4)) Return (Local1) } @@ -69,7 +67,7 @@ Method (CHSA, 0x1, Serialized) { /* Arg0 - GPIO pad offset relative to the community */ - Add (HOSTSW_OWN_REG_0, Multiply (Divide (Arg0, 32), 4), Local1) + Local1 = HOSTSW_OWN_REG_0 + ((Arg0 / 32) * 4) Return (Local1) } @@ -78,10 +76,10 @@ { /* Arg0 - GPIO portid */ /* Arg1 - GPIO pad offset relative to the community */ - Store (CHSA (Arg1), Local1) + Local1 = CHSA (Arg1) OperationRegion (SHO0, SystemMemory, Or ( Or - (CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) + (CONFIG_PCR_BASE_ADDRESS, (Arg0 << 16)), Local1), 4) Field (SHO0, AnyAcc, NoLock, Preserve) { TEMP, 32 } @@ -94,13 +92,13 @@ /* Arg0 - GPIO portid */ /* Arg1 - GPIO pad offset relative to the community */ /* Arg2 - Value for Host own register */ - Store (CHSA (Arg1), Local1) + Local1 = CHSA (Arg1) OperationRegion (SHO0, SystemMemory, Or ( Or - (CONFIG_PCR_BASE_ADDRESS, ShiftLeft (Arg0, 16)), Local1), 4) + (CONFIG_PCR_BASE_ADDRESS, (Arg0 << 16)), Local1), 4) Field (SHO0, AnyAcc, NoLock, Preserve) { TEMP, 32 } - Store (Arg2, TEMP) + TEMP = Arg2 } } diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 1450983..df99154 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -78,12 +78,12 @@ CreateDwordField (MCRS, PM01._LEN, PLEN) /* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */ - And(\_SB.PCI0.MCHC.TLUD, 0xFFF00000, PMIN) + PMIN = \_SB.PCI0.MCHC.TLUD & 0xFFF00000 /* Read MMCONF base */ - And(\_SB.PCI0.MCHC.MCNF, 0xF0000000, PMAX) + PMAX = \_SB.PCI0.MCHC.MCNF & 0xF0000000 /* Calculate PCI MMIO Length */ - Add(Subtract(PMAX, PMIN), 1, PLEN) + PLEN = (PMAX - PMIN) + 1 /* Find GFX resource area in GCRS */ CreateDwordField(MCRS, STOM._MIN, GMIN) @@ -91,25 +91,25 @@ CreateDwordField(MCRS, STOM._LEN, GLEN) /* Read BGSM */ - And(\_SB.PCI0.MCHC.BGSM, 0xFFF00000, GMIN) + GMIN = \_SB.PCI0.MCHC.BGSM & 0xFFF00000 /* Read TOLUD */ - And(\_SB.PCI0.MCHC.TLUD, 0xFFF00000, GMAX) - Decrement(GMAX) - Add(Subtract(GMAX, GMIN), 1, GLEN) + GMAX = \_SB.PCI0.MCHC.TLUD & 0xFFF00000 + GMAX-- + GLEN = (GMAX - GMIN) + 1 /* Patch PM02 range based on Memory Size */ - If (LEqual (A4GS, 0)) { + If (A4GS == 0) { CreateQwordField (MCRS, PM02._LEN, MSEN) - Store (0, MSEN) + MSEN = 0 } Else { CreateQwordField (MCRS, PM02._MIN, MMIN) CreateQwordField (MCRS, PM02._MAX, MMAX) CreateQwordField (MCRS, PM02._LEN, MLEN) /* Set 64bit MMIO resource base and length */ - Store (A4GS, MLEN) - Store (A4GB, MMIN) - Subtract (Add (MMIN, MLEN), 1, MMAX) + MLEN = A4GS + MMIN = A4GB + MMAX = (MMIN - MLEN) +1 } Return (MCRS) diff --git a/src/soc/intel/apollolake/acpi/pch_hda.asl b/src/soc/intel/apollolake/acpi/pch_hda.asl index c3f862e..b23c541 100644 --- a/src/soc/intel/apollolake/acpi/pch_hda.asl +++ b/src/soc/intel/apollolake/acpi/pch_hda.asl @@ -29,19 +29,17 @@ * Arg2 - Function Index */ Method (_DSM, 4) { - If (LEqual (Arg0, ^UUID)) { + If (Arg0 == ^UUID) { /* * Function 0: Function Support Query * Returns a bitmask of functions supported. */ - If (LEqual (Arg2, Zero)) { + If (Arg2 == 0) { /* * NHLT Query only supported for revision 1 and * if NHLT address and length are set in NVS. */ - If (LAnd (LEqual (Arg1, One), - LAnd (LNotEqual (NHLA, Zero), - LNotEqual (NHLL, Zero)))) { + If ((Arg1 == 1) && (NHLA != 0) && (NHLL != 0)) { Return (Buffer (One) { 0x03 }) } Else { @@ -56,13 +54,13 @@ * * Returns a pointer to NHLT table in memory. */ - If (LEqual (Arg2, One)) { + If (Arg2 == 1) { CreateQWordField (NBUF, ^NHLT._MIN, NBAS) CreateQWordField (NBUF, ^NHLT._MAX, NMAS) CreateQWordField (NBUF, ^NHLT._LEN, NLEN) - Store (NHLA, NBAS) - Store (NHLA, NMAS) - Store (NHLL, NLEN) + NBAS = NHLA + NMAS = NHLA + NLEN = NHLL Return (NBUF) } } diff --git a/src/soc/intel/apollolake/acpi/pcie_port.asl b/src/soc/intel/apollolake/acpi/pcie_port.asl index f0f49f3..daa77e2 100644 --- a/src/soc/intel/apollolake/acpi/pcie_port.asl +++ b/src/soc/intel/apollolake/acpi/pcie_port.asl @@ -39,8 +39,8 @@ /* Define the PowerResource for PCIe slot */ Method (_STA, 0, Serialized) { - Store (PDS, PDST) - If (LEqual (PDS, 1)) { + PDST = PDS + If (PDS == 1) { Return (0xf) } Else { Return (0) @@ -49,7 +49,7 @@ Method (_ON, 0, Serialized) { - If (LAnd (LEqual (PDST, 1), LNotEqual (\PRT0, 0))) { + If ((PDST == 1) && (\PRT0 != 0)) { /* Enter this condition if device * is connected */ @@ -57,25 +57,25 @@ /* De-assert PERST */ \_SB.PCI0.PRDA (\PRT0) - Store (0, BDQA) /* Set BLKDQDA to 0 */ - Store (0, BPLL) /* Set BLKPLLEN to 0 */ + BDQA = 0 /* Set BLKDQDA to 0 */ + BPLL = 0 /* Set BLKPLLEN to 0 */ /* Set L23_Rdy to Detect Transition * (L23R2DT) */ - Store (1, L23R) + L23R = 1 Sleep (16) - Store (0, Local0) + Local0 = 0 /* Delay for transition Detect * and link to train */ While (L23R) { - If (Lgreater (Local0, 4)) { + If (Local0 > 4) { Break } Sleep (16) - Increment (Local0) + Local0++ } } /* End PDS condition check */ } @@ -83,22 +83,22 @@ Method (_OFF, 0, Serialized) { /* Set L23_Rdy Entry Request (L23ER) */ - If (LAnd (LEqual (PDST, 1), LNotEqual (\PRT0, 0))) { + If ((PDST == 1) && (\PRT0 != 0)) { /* enter this condition if device * is connected */ - Store (1, L23E) + L23E = 1 Sleep (16) - Store (0, Local0) + Local0 = 0 While (L23E) { - If (Lgreater (Local0, 4)) { + If (Local0 > 4) { Break } Sleep (16) - Increment (Local0) + Local0++ } - Store (1, BDQA) /* Set BLKDQDA to 1 */ - Store (1, BPLL) /* Set BLKPLLEN to 1 */ + BDQA = 1 /* Set BLKDQDA to 1 */ + BPLL = 1 /* Set BLKPLLEN to 1 */ /* Assert PERST */ \_SB.PCI0.PRAS (\PRT0) diff --git a/src/soc/intel/apollolake/acpi/pmc_ipc.asl b/src/soc/intel/apollolake/acpi/pmc_ipc.asl index 7611a2d..7b0e497 100644 --- a/src/soc/intel/apollolake/acpi/pmc_ipc.asl +++ b/src/soc/intel/apollolake/acpi/pmc_ipc.asl @@ -30,15 +30,15 @@ Method (_CRS, 0x0, NotSerialized) { CreateDwordField (^RBUF, ^IBAR._BAS, IBAS) - Store (PMC_BAR0, IBAS) + IBAS = PMC_BAR0 CreateDwordField (^RBUF, ^MDAT._BAS, MDBA) - Store (MCH_BASE_ADDRESS + MAILBOX_DATA, MDBA) + MDBA = MCH_BASE_ADDRESS + MAILBOX_DATA CreateDwordField (^RBUF, ^MINF._BAS, MIBA) - Store (MCH_BASE_ADDRESS + MAILBOX_INTF, MIBA) + MIBA = MCH_BASE_ADDRESS + MAILBOX_INTF CreateDwordField (^RBUF, ^SBAR._BAS, SBAS) - Store (SRAM_BASE_0, SBAS) + SBAS = SRAM_BASE_0 Return (^RBUF) } diff --git a/src/soc/intel/apollolake/acpi/scs.asl b/src/soc/intel/apollolake/acpi/scs.asl index 1ee70ad..f7de2dc 100644 --- a/src/soc/intel/apollolake/acpi/scs.asl +++ b/src/soc/intel/apollolake/acpi/scs.asl @@ -4,8 +4,7 @@ /* 0xD6- is the port address */ /* 0x600- is the dynamic clock gating control register offset (GENR) */ OperationRegion (SBMM, SystemMemory, - Or ( Or (CONFIG_PCR_BASE_ADDRESS, - ShiftLeft(0xD6, PCR_PORTID_SHIFT)), 0x0600), 0x18) + (CONFIG_PCR_BASE_ADDRESS | (0xD6 << PCR_PORTID_SHIFT) | 0x0600), 0x18) Field (SBMM, DWordAcc, NoLock, Preserve) { GENR, 32, @@ -23,10 +22,10 @@ */ Method (SCPG, 2, Serialized) { - if (LEqual(Arg0, 0x1)) { - Or (^GENR, Arg1, ^GENR) - } ElseIf (LEqual(Arg0, 0x0)){ - And (^GENR, Arg1, ^GENR) + if (Arg0 == 0x1) { + ^GENR |= Arg1 + } ElseIf (Arg0 == 0x0){ + ^GENR &= Arg1 } } @@ -44,13 +43,13 @@ */ Method (_DSM, 4) { - If (LEqual (Arg0, ^UUID)) { + If (Arg0 == ^UUID) { /* * Function 9: Device Readiness Durations * Returns a package of five integers covering * various device related delays in PCIe Base Spec. */ - If (LEqual (Arg2, 9)) { + If ((Arg2 == 9) { /* * Function 9 support for revision 3. * ECN link for function definitions @@ -58,7 +57,7 @@ * specification_documents/ * ECN_fw_latency_optimization_final.pdf] */ - If (LEqual (Arg1, 3)) { + If (Arg1 == 3) { /* * Integer 0: FW reset time. * Integer 1: FW data link up time. @@ -118,14 +117,14 @@ Method (_INI, 0) { /* Check SDCard CD port is valid */ - If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) + If ((\SCDP != 0) && (\SCDO != 0)) { /* Store DW0 address of SD_CD */ - Store (GDW0 (\SCDP, \SCDO), SCD0) + SCD0 = GDW0 (\SCDP, \SCDO) /* Get the current SD_CD ownership */ - Store (\_SB.GHO (\SCDP, \SCDO), Local0) + Local0 = \_SB.GHO (\SCDP, \SCDO) /* Set host ownership as GPIO in HOSTSW_OWN reg */ - Or (Local0, ShiftLeft (1, Mod (\SCDO, 32)), Local0) + Local0 |= 1 << (\SCDO % 32) \_SB.SHO (\SCDP, \SCDO, Local0) } } @@ -133,20 +132,20 @@ Method (_PS0, 0, NotSerialized) { /* Check SDCard CD port is valid */ - If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) + If ((\SCDP != 0) && (\SCDO != 0)) { /* Store DW0 into local0 to get rxstate of GPIO */ - Store (\_SB.GPC0 (SCD0), Local0) + Local0 = \_SB.GPC0 (SCD0) /* Extract rxstate [bit 1] of sdcard card detect pin */ - And (Local0, PAD_CFG0_RX_STATE, Local0) + Local0 &= PAD_CFG0_RX_STATE /* If the sdcard is present, rxstate is low. * If sdcard is not present, rxstate is High. * Write the inverted value of rxstate to GRR3. */ - If (LEqual (Local0, 0)) { - Store (1, ^^GRR3) + If (Local0 == 0) { + ^^GRR3 = 1 } Else { - Store (0, ^^GRR3) + ^^GRR3 = 0 } Sleep (2) } @@ -155,7 +154,7 @@ Method (_PS3, 0, NotSerialized) { /* Clear GRR3 to Power Gate SD Controller */ - Store (0, ^^GRR3) + ^^GRR3 = 0 } Device (CARD) -- To view, visit https://review.coreboot.org/c/coreboot/+/46235 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc400433323630393566899dbeb5b0fac1a4bd00 Gerrit-Change-Number: 46235 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 2

Change in coreboot[master]: ec/google/chromeec: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46097 ) Change subject: ec/google/chromeec: Convert to ASL 2.0 syntax ...................................................................... ec/google/chromeec: Convert to ASL 2.0 syntax Change-Id: Ia35c8e0dac7a36deea62b2ffdc3ebc86d3aafa50 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/google/chromeec/acpi/battery.asl M src/ec/google/chromeec/acpi/ec.asl M src/ec/google/chromeec/acpi/keyboard_backlight.asl M src/ec/google/chromeec/acpi/tbmc.asl 4 files changed, 115 insertions(+), 116 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/46097/1 diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl index d9304c1..9e5356f 100644 --- a/src/ec/google/chromeec/acpi/battery.asl +++ b/src/ec/google/chromeec/acpi/battery.asl @@ -11,25 +11,25 @@ Method (BTSW, 1) { #ifdef EC_ENABLE_SECOND_BATTERY_DEVICE - If (LEqual (BTIX, Arg0)) { + If (BTIX == Arg0) { Return (Zero) } - If (LGreaterEqual (Arg0, BTCN)) { + If (Arg0 >= BTCN) { Return (One) } - Store (Arg0, \_SB.PCI0.LPCB.EC0.BTID) - Store (5, Local0) // Timeout 5 msec - While (LNotEqual (BTIX, Arg0)) + \_SB.PCI0.LPCB.EC0.BTID = Arg0 + Local0 = 5 // Timeout 5 msec + While (BTIX != Arg0) { Sleep (1) - Decrement (Local0) - If (LEqual (Local0, Zero)) + Local0-- + If (Local0 == 0) { Return (One) } } #else - If (LNotEqual (0, Arg0)) { + If (Arg0 != 0) { Return (One) } #endif @@ -44,10 +44,10 @@ Return (Zero) } - If (And(Not(BTSW (Arg0)), BTEX)) { - Store (0x1F, Local0) + If (!BTSW (Arg0) & BTEX) { + Local0 = 0x1F } Else { - Store (0x0F, Local0) + Local0 = 0x0F } Release (^BATM) @@ -68,27 +68,27 @@ Return (Arg1) } // Last Full Charge Capacity - Store (BTDF, Index (Arg1, 2)) + Arg1 [2] = BTDF // Design Voltage - Store (BTDV, Index (Arg1, 4)) + Arg1 [4] = BTDV // Design Capacity - Store (BTDA, Local0) - Store (Local0, Index (Arg1, 1)) + Local0 = BTDA + Arg1 [1] = Local0 // Design Capacity of Warning - Divide (Multiply (Local0, DWRN), 100, , Local2) - Store (Local2, Index (Arg1, 5)) + Local2 = (Local0 * DWRN) / 100 + Arg1 [5] = Local2 // Design Capacity of Low - Divide (Multiply (Local0, DLOW), 100, , Local2) - Store (Local2, Index (Arg1, 6)) + Local2 = (Local0 * DLOW) / 100 + Arg1 [6] = Local2 // Get battery info from mainboard - Store (ToString(Concatenate(BMOD, 0x00)), Index (Arg1, 9)) - Store (ToString(Concatenate(BSER, 0x00)), Index (Arg1, 10)) - Store (ToString(Concatenate(BMFG, 0x00)), Index (Arg1, 12)) + Arg1 [9] = ToString (Concatenate (BMOD, 0x00)) + Arg1 [10] = ToString (Concatenate (BSER, 0x00)) + Arg1 [12] = ToString (Concatenate (BMFG, 0x00)) Release (^BATM) Return (Arg1) @@ -108,30 +108,30 @@ Return (Arg1) } // Last Full Charge Capacity - Store (BTDF, Index (Arg1, 3)) + Arg1 [3] = BTDF // Design Voltage - Store (BTDV, Index (Arg1, 5)) + Arg1 [5] = BTDV // Design Capacity - Store (BTDA, Local0) - Store (Local0, Index (Arg1, 2)) + Local0 = BTDA + Arg1 [2] = Local0 // Design Capacity of Warning - Divide (Multiply (Local0, DWRN), 100, , Local2) - Store (Local2, Index (Arg1, 6)) + Local2 = (Local0 * DWRN) / 100 + Arg1 [6] = Local2 // Design Capacity of Low - Divide (Multiply (Local0, DLOW), 100, , Local2) - Store (Local2, Index (Arg1, 7)) + Local2 = (Local0 * DLOW) / 100 + Arg1 [7] = Local2 // Cycle Count - Store (BTCC, Index (Arg1, 8)) + Arg1 [8] = BTCC // Get battery info from mainboard - Store (ToString(Concatenate(BMOD, 0x00)), Index (Arg1, 16)) - Store (ToString(Concatenate(BSER, 0x00)), Index (Arg1, 17)) - Store (ToString(Concatenate(BMFG, 0x00)), Index (Arg1, 19)) + Arg1 [16] = ToString (Concatenate (BMOD, 0x00)) + Arg1 [17] = ToString (Concatenate (BSER, 0x00)) + Arg1 [19] = ToString (Concatenate (BMFG, 0x00)) Release (^BATM) Return (Arg1) @@ -159,30 +159,30 @@ // bit 1 = charging // bit 2 = critical level // - Store (Zero, Local1) + Local1 = 0 // Check if AC is present If (ACEX) { If (BFCG) { - Store (0x02, Local1) + Local1 = 0x02 } ElseIf (BFDC) { - Store (0x01, Local1) + Local1 = 0x01 } } Else { // Always discharging when on battery power - Store (0x01, Local1) + Local1 = 0x01 } // Check for critical battery level If (BFCR) { - Or (Local1, 0x04, Local1) + Local1 |= Local1 } - Store (Local1, Index (Arg1, 0)) + Arg1 [0] = Local1 // Notify if battery state has changed since last time - If (LNotEqual (Local1, DeRefOf (Arg2))) { - Store (Local1, Arg2) - If (LEqual(Arg0, 0)) { + If (Local1 != DeRefOf (Arg2)) { + Arg2 = Local1 + If (Arg0 == 0) { Notify (BAT0, 0x80) } #ifdef EC_ENABLE_SECOND_BATTERY_DEVICE @@ -195,33 +195,32 @@ // // 1: BATTERY PRESENT RATE // - Store (BTPR, Index (Arg1, 1)) + Arg1 [1] = BTPR // // 2: BATTERY REMAINING CAPACITY // - Store (BTRA, Local1) - If (LAnd (Arg3, LAnd (ACEX, LNot (LAnd (BFDC, BFCG))))) { + Local1 = BTRA + If (Arg3 && ACEX && !(BFDC && BFCG)) { // On AC power and battery is neither charging // nor discharging. Linux expects a full battery // to report same capacity as last full charge. // https://bugzilla.kernel.org/show_bug.cgi?id=12632 - Store (BTDF, Local2) + Local2 = BTDF // See if within ~6% of full - ShiftRight (Local2, 4, Local3) - If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), - LLess (Local1, Add (Local2, Local3)))) + Local3 = Local2 >> 4 + If (Local1 > (Local2 - Local3) && Local1 < (Local2 + Local3)) { - Store (Local2, Local1) + Local1 = Local2 } } - Store (Local1, Index (Arg1, 2)) + Arg1 [2] = Local1 // // 3: BATTERY PRESENT VOLTAGE // - Store (BTVO, Index (Arg1, 3)) + Arg1 [3] = BTVO Release (^BATM) Return (Arg1) @@ -286,13 +285,13 @@ // Method to enable full battery workaround Method (BFWE) { - Store (One, BFWK) + BFWK = 1 } // Method to disable full battery workaround Method (BFWD) { - Store (Zero, BFWK) + BFWK = 0 } Method (_STA, 0, Serialized) @@ -376,13 +375,13 @@ // Method to enable full battery workaround Method (BFWE) { - Store (One, BFWK) + BFWK = 1 } // Method to disable full battery workaround Method (BFWD) { - Store (Zero, BFWK) + BFWK = 0 } Method (_STA, 0, Serialized) diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index d12274f..be9c213 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -149,7 +149,7 @@ Method (_REG, 2, NotSerialized) { // Initialize AC power state - Store (ACEX, \PWRS) + \PWRS = ACEX /* * Inform platform code about the current AC power state. * This allows the platform to take any action based on the initialized state. @@ -158,7 +158,7 @@ \PNOT () // Initialize LID switch state - Store (LIDS, \LIDS) + \LIDS = LIDS #ifdef EC_ENABLE_AMD_DPTC_SUPPORT /* @@ -175,33 +175,33 @@ /* Read requested temperature and check against EC error values */ Method (TSRD, 1, Serialized) { - Store (\_SB.PCI0.LPCB.EC0.TINS (Arg0), Local0) + Local0 = \_SB.PCI0.LPCB.EC0.TINS (Arg0) /* Check for sensor not calibrated */ - If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNCA)) { + If (Local0 == \_SB.PCI0.LPCB.EC0.TNCA) { Return (Zero) } /* Check for sensor not present */ - If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNPR)) { + If (Local0 == \_SB.PCI0.LPCB.EC0.TNPR) { Return (Zero) } /* Check for sensor not powered */ - If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TNOP)) { + If (Local0 == \_SB.PCI0.LPCB.EC0.TNOP) { Return (Zero) } /* Check for sensor bad reading */ - If (LEqual (Local0, \_SB.PCI0.LPCB.EC0.TBAD)) { + If (Local0 == \_SB.PCI0.LPCB.EC0.TBAD) { Return (Zero) } /* Adjust by offset to get Kelvin */ - Add (\_SB.PCI0.LPCB.EC0.TOFS, Local0, Local0) + Local0 += \_SB.PCI0.LPCB.EC0.TOFS /* Convert to 1/10 Kelvin */ - Multiply (Local0, 10, Local0) + Local0 *= 10 Return (Local0) } @@ -209,8 +209,8 @@ // Lid Closed Event Method (_Q01, 0, NotSerialized) { - Store ("EC: LID CLOSE", Debug) - Store (LIDS, \LIDS) + Debug = "EC: LID CLOSE" + \LIDS = LIDS #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) #endif @@ -219,8 +219,8 @@ // Lid Open Event Method (_Q02, 0, NotSerialized) { - Store ("EC: LID OPEN", Debug) - Store (LIDS, \LIDS) + Debug = "EC: LID OPEN" + \LIDS = LIDS Notify (CREC, 0x2) #ifdef EC_ENABLE_LID_SWITCH Notify (LID0, 0x80) @@ -230,14 +230,14 @@ // Power Button Method (_Q03, 0, NotSerialized) { - Store ("EC: POWER BUTTON", Debug) + Debug = "EC: POWER BUTTON" } // AC Connected Method (_Q04, 0, NotSerialized) { - Store ("EC: AC CONNECTED", Debug) - Store (ACEX, \PWRS) + Debug = "EC: AC CONNECTED" + \PWRS = ACEX Notify (AC, 0x80) #ifdef DPTF_ENABLE_CHARGER If (CondRefOf (\_SB.DPTF.TCHG)) { @@ -250,8 +250,8 @@ // AC Disconnected Method (_Q05, 0, NotSerialized) { - Store ("EC: AC DISCONNECTED", Debug) - Store (ACEX, \PWRS) + Debug = "EC: AC DISCONNECTED" + \PWRS = ACEX Notify (AC, 0x80) #ifdef DPTF_ENABLE_CHARGER If (CondRefOf (\_SB.DPTF.TCHG)) { @@ -264,21 +264,21 @@ // Battery Low Event Method (_Q06, 0, NotSerialized) { - Store ("EC: BATTERY LOW", Debug) + Debug = "EC: BATTERY LOW" Notify (BAT0, 0x80) } // Battery Critical Event Method (_Q07, 0, NotSerialized) { - Store ("EC: BATTERY CRITICAL", Debug) + Debug = "EC: BATTERY CRITICAL" Notify (BAT0, 0x80) } // Battery Info Event Method (_Q08, 0, NotSerialized) { - Store ("EC: BATTERY INFO", Debug) + Debug = "EC: BATTERY INFO" Notify (BAT0, 0x81) #ifdef EC_ENABLE_SECOND_BATTERY_DEVICE If (CondRefOf (BAT1)) { @@ -290,41 +290,41 @@ // Thermal Overload Event Method (_Q0A, 0, NotSerialized) { - Store ("EC: THERMAL OVERLOAD", Debug) + Debug = "EC: THERMAL OVERLOAD" Notify (\_TZ, 0x80) } // Thermal Event Method (_Q0B, 0, NotSerialized) { - Store ("EC: THERMAL", Debug) + Debug = "EC: THERMAL" Notify (\_TZ, 0x80) } // USB Charger Method (_Q0C, 0, NotSerialized) { - Store ("EC: USB CHARGER", Debug) + Debug = "EC: USB CHARGER" } // Key Pressed Method (_Q0D, 0, NotSerialized) { - Store ("EC: KEY PRESSED", Debug) + Debug = "EC: KEY PRESSED" Notify (CREC, 0x2) } // Thermal Shutdown Imminent Method (_Q10, 0, NotSerialized) { - Store ("EC: THERMAL SHUTDOWN", Debug) + Debug = "EC: THERMAL SHUTDOWN" Notify (\_TZ, 0x80) } // Battery Shutdown Imminent Method (_Q11, 0, NotSerialized) { - Store ("EC: BATTERY SHUTDOWN", Debug) + Debug = "EC: BATTERY SHUTDOWN" Notify (BAT0, 0x80) } @@ -332,7 +332,7 @@ Method (_Q12, 0, NotSerialized) { #ifdef EC_ENABLE_THROTTLING_HANDLER - Store ("EC: THROTTLE START", Debug) + Debug = "EC: THROTTLE START" \_TZ.THRT (1) #endif } @@ -341,7 +341,7 @@ Method (_Q13, 0, NotSerialized) { #ifdef EC_ENABLE_THROTTLING_HANDLER - Store ("EC: THROTTLE STOP", Debug) + Debug = "EC: THROTTLE STOP" \_TZ.THRT (0) #endif } @@ -350,7 +350,7 @@ // PD event Method (_Q16, 0, NotSerialized) { - Store ("EC: GOT PD EVENT", Debug) + Debug = "EC: GOT PD EVENT" Notify (\_SB.PCI0.LPCB.EC0.CREC.ECPD, 0x80) } #endif @@ -358,7 +358,7 @@ // Battery Status Method (_Q17, 0, NotSerialized) { - Store ("EC: BATTERY STATUS", Debug) + Debug = "EC: BATTERY STATUS" Notify (BAT0, 0x80) #ifdef EC_ENABLE_SECOND_BATTERY_DEVICE If (CondRefOf (BAT1)) { @@ -370,7 +370,7 @@ // MKBP interrupt. Method (_Q1B, 0, NotSerialized) { - Store ("EC: MKBP", Debug) + Debug = "EC: MKBP" Notify (CREC, 0x80) } @@ -378,7 +378,7 @@ // USB MUX Interrupt Method (_Q1C, 0, NotSerialized) { - Store ("EC: USB MUX", Debug) + Debug = "EC: USB MUX" Notify (\_SB.PCI0.LPCB.EC0.CREC.ECPD, 0x80) } #endif @@ -386,7 +386,7 @@ // TABLET mode switch Event Method (_Q1D, 0, NotSerialized) { - Store ("EC: TABLET mode switch Event", Debug) + Debug = "EC: TABLET mode switch Event" Notify (CREC, 0x2) #ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES \_SB.DPTF.TPET() @@ -420,16 +420,16 @@ } /* Set sensor ID */ - Store (ToInteger (Arg0), ^PATI) + ^PATI = ToInteger (Arg0) /* Temperature is passed in 1/10 Kelvin */ - Divide (ToInteger (Arg1), 10, , Local1) + Local1 = ToInteger (Arg1) / 10 /* Adjust by EC temperature offset */ - Subtract (Local1, ^TOFS, ^PATT) + ^PATT = Local1 - ^TOFS /* Set commit value with SELECT=0 and ENABLE=1 */ - Store (0x02, ^PATC) + ^PATC = 0x02 Release (^PATM) Return (1) @@ -447,16 +447,16 @@ } /* Set sensor ID */ - Store (ToInteger (Arg0), ^PATI) + ^PATI = ToInteger (Arg0) /* Temperature is passed in 1/10 Kelvin */ - Divide (ToInteger (Arg1), 10, , Local1) + Local1 = ToInteger (Arg1) / 10 /* Adjust by EC temperature offset */ - Subtract (Local1, ^TOFS, ^PATT) + ^PATT = Local1 - ^TOFS /* Set commit value with SELECT=1 and ENABLE=1 */ - Store (0x03, ^PATC) + ^PATC = 0x03 Release (^PATM) Return (1) @@ -471,14 +471,14 @@ Return (0) } - Store (ToInteger (Arg0), ^PATI) - Store (0x00, ^PATT) + ^PATI = ToInteger (Arg0) + ^PATT = 0x00 /* Disable PAT0 */ - Store (0x00, ^PATC) + ^PATC = 0x00 /* Disable PAT1 */ - Store (0x01, ^PATC) + ^PATC = 0x01 Release (^PATM) Return (1) @@ -489,9 +489,9 @@ */ Method (_Q09, 0, NotSerialized) { - If (LNot(Acquire (^PATM, 1000))) { + If (!Acquire (^PATM, 1000)) { /* Read sensor ID for event */ - Store (^PATI, Local0) + Local0 = ^PATI /* When sensor ID returns 0xFF then no more events */ While (LNotEqual (Local0, EC_TEMP_SENSOR_NOT_PRESENT)) @@ -501,7 +501,7 @@ #endif /* Keep reaading sensor ID for event */ - Store (^PATI, Local0) + Local0 = ^PATI } Release (^PATM) @@ -514,7 +514,7 @@ */ Method (CHGS, 1, Serialized) { - Store (ToInteger (Arg0), ^CHGL) + ^CHGL = ToInteger (Arg0) } /* @@ -522,7 +522,7 @@ */ Method (CHGD, 0, Serialized) { - Store (0xFF, ^CHGL) + ^CHGL = 0xFF } /* Read current Tablet mode */ @@ -539,10 +539,10 @@ * DDPN = 0 is reserved for backwards compatibility. * If DDPN == 0 use TBMD to load appropriate DPTF table. */ - If (LEqual (^DDPN, 0)) { + If (^DDPN == 0) { Return (^TBMD) } Else { - Subtract (^DDPN, 1, Local0) + Local0 = ^DDPN - 1 Return (Local0) } } @@ -554,7 +554,7 @@ */ Method (UPPS, 1, Serialized) { - Or (USPP, ShiftLeft (1, Arg0), USPP) + USPP |= 1 << Arg0 } /* @@ -563,7 +563,7 @@ */ Method (UPPC, 1, Serialized) { - And (USPP, Not (ShiftLeft (1, Arg0)), USPP) + USPP &= ~(1 << Arg0) } #endif diff --git a/src/ec/google/chromeec/acpi/keyboard_backlight.asl b/src/ec/google/chromeec/acpi/keyboard_backlight.asl index 2d4a0c5..87be075 100644 --- a/src/ec/google/chromeec/acpi/keyboard_backlight.asl +++ b/src/ec/google/chromeec/acpi/keyboard_backlight.asl @@ -23,11 +23,11 @@ /* If query is unsupported, but this code is compiled * in, assume the backlight exists physically. */ - If (LEqual (1, \_SB.PCI0.LPCB.EC0.DFUD)) { + If (\_SB.PCI0.LPCB.EC0.DFUD == 1) { Return (0xf) } /* If EC reports that backlight exists, trust it */ - If (LEqual (1, \_SB.PCI0.LPCB.EC0.KBLE)) { + If (\_SB.PCI0.LPCB.EC0.KBLE == 1) { Return (0xf) } /* Otherwise: no device -> disable */ @@ -43,7 +43,7 @@ /* Write new backlight value */ Method (KBCM, 1, NotSerialized) { - Store (Arg0, \_SB.PCI0.LPCB.EC0.KBLV) + \_SB.PCI0.LPCB.EC0.KBLV = Arg0 } } } diff --git a/src/ec/google/chromeec/acpi/tbmc.asl b/src/ec/google/chromeec/acpi/tbmc.asl index 7be50d7..1661296 100644 --- a/src/ec/google/chromeec/acpi/tbmc.asl +++ b/src/ec/google/chromeec/acpi/tbmc.asl @@ -7,7 +7,7 @@ Name (_DDN, "Tablet Motion Control") Method (TBMC) { - If (LEqual (^^RCTM, One)) { + If (^^RCTM == 1) { Return (0x1) } Else { Return (0x0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia35c8e0dac7a36deea62b2ffdc3ebc86d3aafa50 Gerrit-Change-Number: 46097 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 1

Change in coreboot[master]: hp/kbc1126: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46099 ) Change subject: hp/kbc1126: Convert to ASL 2.0 syntax ...................................................................... hp/kbc1126: Convert to ASL 2.0 syntax Change-Id: Ibee483bb3802f7fc1db86492e5838cc2ada6b472 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/hp/kbc1126/acpi/ac.asl M src/ec/hp/kbc1126/acpi/battery.asl M src/ec/hp/kbc1126/acpi/ec.asl M src/ec/hp/kbc1126/acpi/lid.asl 4 files changed, 46 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/46099/1 diff --git a/src/ec/hp/kbc1126/acpi/ac.asl b/src/ec/hp/kbc1126/acpi/ac.asl index f9d346b..606bdb0 100644 --- a/src/ec/hp/kbc1126/acpi/ac.asl +++ b/src/ec/hp/kbc1126/acpi/ac.asl @@ -13,7 +13,7 @@ Method (UPAD, 0, Serialized) { Acquire (BTMX, 0xFFFF) - If ((GACP & 0x01)) + If (GACP & 0x01) { GACP &= 0x06 Release (BTMX) @@ -65,7 +65,7 @@ Method (_Q06, 0, NotSerialized) { - Store ("EC: AC STATUS", Debug) + Debug = "EC: AC STATUS" PWUP (0x05, (0x02 | 0x01)) If (BTDR (0x02)) { diff --git a/src/ec/hp/kbc1126/acpi/battery.asl b/src/ec/hp/kbc1126/acpi/battery.asl index 6669726..824da9c 100644 --- a/src/ec/hp/kbc1126/acpi/battery.asl +++ b/src/ec/hp/kbc1126/acpi/battery.asl @@ -42,9 +42,11 @@ Method (ITLB, 0, NotSerialized) { - Divide ((NLB1 + 0x09), 0x0A, Local0, Local1) - Divide ((0x96 + 0x09), 0x0A, Local0, Local2) - Local0 = Local0 + Local0 = (NLB1 + 0x09) % 10 + Local1 = (NLB1 + 0x09) / 10 + Local0 = (0x96 + 0x09) % 10 /* FIXME: meaning ?? */ + Local2 = (0x96 + 0x09) / 10 + Local0 = Local0 /* FIXME : Local0 = Local ?? */ LB1 = Local1 LB2 = Local2 } @@ -53,16 +55,16 @@ { Local0 = 0x00 Acquire (BTMX, 0xFFFF) - Local1 = (Arg0 | GACP) + Local1 = Arg0 | GACP GACP = (Local1 & 0x07) - If ((GACP & 0x02)) + If (GACP & 0x02) { NGBF |= Arg1 } - If ((GACP & 0x04)) + If (GACP & 0x04) { - If ((NGBT != 0xFF)) + If (NGBT != 0xFF) { Local0 = 0x01 } @@ -77,7 +79,7 @@ Method (GBAP, 0, Serialized) { Acquire (BTMX, 0xFFFF) - If ((GACP & 0x02)) + If (GACP & 0x02) { GACP &= 0x05 Release (BTMX) @@ -94,11 +96,11 @@ Method (BTDR, 1, Serialized) { - If ((Arg0 == 0x01)) + If (Arg0 == 0x01) { NNBO = 0x01 } - ElseIf ((Arg0 == 0x00)) + ElseIf (Arg0 == 0x00) { NNBO = 0x00 } @@ -229,8 +231,9 @@ While (Local1) { Local1-- - Divide (Local0, 10, Local2, Local0) - Add (Local2, 48, Index (NUMB, Local1)) + Local2 = Local0 % 10 + Local0 /= 10 + NUMB [Local1] = Local2 + 48 } ToString (NUMB, Arg1, Local3) Return (Local3) @@ -258,9 +261,9 @@ Method (BTIG, 1, Serialized) /* in vendor DSDT is EC0.BTIF */ { - Local7 = (0x01 << Arg0) + Local7 = 0x01 << Arg0 BTDR (0x01) - If ((BSTA (Local7) == 0x0F)) + If (BSTA (Local7) == 0x0F) { Return (0xFF) } @@ -268,7 +271,7 @@ Acquire (BTMX, 0xFFFF) Local0 = NGBF Release (BTMX) - If (((Local0 & Local7) == 0x00)) + If ((Local0 & Local7) == 0x00) { Return (0x00) } @@ -304,7 +307,7 @@ Method (BTIF, 1, Serialized) /* in vendor DSDT is SB.BTIF */ { Local0 = BTIG (Arg0) - If ((Local0 == 0xFF)) + If (Local0 == 0xFF) { Return (Package (0x0D) { @@ -343,9 +346,9 @@ Method (BTST, 2, Serialized) { - Local7 = (0x01 << Arg0) + Local7 = 0x01 << Arg0 BTDR (0x01) - If ((BSTA (Local7) == 0x0F)) + If (BSTA (Local7) == 0x0F) { NBST [Arg0] = Package (0x04) { @@ -365,7 +368,7 @@ Local0 = NGBT /* \_SB_.PCI0.LPCB.EC0_.NGBT */ Release (BTMX) - If (((Local0 & Local7) == 0x00)) + If ((Local0 & Local7) == 0x00) { Return (0x00) } @@ -378,7 +381,7 @@ DerefOf (NBST [Arg0]) [0x03] = BPV Release (ECMX) - If ((GACS () == 0x01)) + If (GACS () == 0x01) { Local0 &= ~0x01 } @@ -387,7 +390,7 @@ Local0 &= ~0x02 } - If ((Local0 & 0x01)) + If (Local0 & 0x01) { Acquire (BTMX, 0xFFFF) NDCB = Local7 @@ -395,14 +398,14 @@ } DerefOf (NBST [Arg0]) [0x00] = Local0 - If ((Local0 & 0x01)) + If (Local0 & 0x01) { - If (((Local3 < 0x0190) || (Local3 > 0x1964))) + If ((Local3 < 0x0190) || (Local3 > 0x1964)) { Local5 = DerefOf (DerefOf (NBST [Arg0]) [0x01]) - If (((Local5 < 0x0190) || (Local5 > 0x1964))) + If ((Local5 < 0x0190) || (Local5 > 0x1964)) { - Local3 = (0x1AF4 / 0x02) + Local3 = 0x1AF4 / 0x02 } Else { @@ -410,7 +413,7 @@ } } } - ElseIf (((Local0 & 0x02) == 0x00)) + ElseIf ((Local0 & 0x02) == 0x00) { Local3 = 0x00 } @@ -424,12 +427,12 @@ Method (SBTN, 2, Serialized) { - If ((Arg0 & 0x01)) + If (Arg0 & 0x01) { Notify (BAT0, Arg1) } - If ((Arg0 & 0x02)) + If (Arg0 & 0x02) { Notify (BAT1, Arg1) } @@ -437,7 +440,7 @@ Method (_Q03, 0, NotSerialized) { - Store ("EC: _Q03", Debug) + Debug = "EC: _Q03" Acquire (BTMX, 0xFFFF) Local0 = NDCB Release (BTMX) @@ -447,10 +450,10 @@ Method (_Q08, 0, NotSerialized) { - Store ("EC: PRIMARY BATTERY ATTACHED/DETACHED", Debug) + Debug = "EC: PRIMARY BATTERY ATTACHED/DETACHED" PWUP (0x06, 0x01) Local0 = GBAP () - If ((Local0 != 0x02)) + If (Local0 != 0x02) { PWUP (0x04, 0x02) If (BTDR (0x02)) @@ -467,7 +470,7 @@ Method (_Q09, 0, NotSerialized) { - Store ("EC: PRIMARY BATTERY STATUS", Debug) + Debug = "EC: PRIMARY BATTERY STATUS" PWUP (0x04, 0x01) If (BTDR (0x02)) { @@ -477,10 +480,10 @@ Method (_Q18, 0, NotSerialized) { - Store("EC: SECONDARY BATTERY ATTACHED/DETACHED", Debug) + Debug = "EC: SECONDARY BATTERY ATTACHED/DETACHED" PWUP (0x06, 0x02) Local0 = GBAP () - If ((Local0 != 0x01)) + If (Local0 != 0x01) { PWUP (0x04, 0x01) If (BTDR (0x02)) @@ -497,7 +500,7 @@ Method (_Q19, 0, NotSerialized) { - Store ("EC: SECONDARY BATTERY STATUS", Debug) + Debug = "EC: SECONDARY BATTERY STATUS" PWUP (0x04, 0x02) If (BTDR (0x02)) { diff --git a/src/ec/hp/kbc1126/acpi/ec.asl b/src/ec/hp/kbc1126/acpi/ec.asl index e5752a8..98c3cc6 100644 --- a/src/ec/hp/kbc1126/acpi/ec.asl +++ b/src/ec/hp/kbc1126/acpi/ec.asl @@ -202,27 +202,27 @@ Method (_Q04, 0, NotSerialized) { - Store ("EC: _Q04", Debug) + Debug = "EC: _Q04" PNOT() } Method (_Q05, 0, NotSerialized) { - Store ("EC: _Q05", Debug) + Debug = "EC: _Q05" } Method (_Q0B, 0, NotSerialized) { - Store ("EC: _Q0B", Debug) + Debug = "EC: _Q0B" } Method (_Q0C, 0, NotSerialized) { - Store ("EC: _Q0C", Debug) + Debug = "EC: _Q0C" } Method (_Q0D, 0, NotSerialized) { - Store ("EC: _Q0D", Debug) + Debug = "EC: _Q0D" } } diff --git a/src/ec/hp/kbc1126/acpi/lid.asl b/src/ec/hp/kbc1126/acpi/lid.asl index 2494168..05c016e 100644 --- a/src/ec/hp/kbc1126/acpi/lid.asl +++ b/src/ec/hp/kbc1126/acpi/lid.asl @@ -12,6 +12,6 @@ Method (_Q0A, 0, NotSerialized) { - Store ("EC: LID STATUS", Debug) + Debug = "EC: LID STATUS" Notify (LID, 0x80) } -- To view, visit https://review.coreboot.org/c/coreboot/+/46099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibee483bb3802f7fc1db86492e5838cc2ada6b472 Gerrit-Change-Number: 46099 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: ec/quanta/it8518: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46104 ) Change subject: ec/quanta/it8518: Convert to ASL 2.0 syntax ...................................................................... ec/quanta/it8518: Convert to ASL 2.0 syntax Change-Id: I990e9bf3bb8663b245c98d1a3b24eb4afba0433f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/quanta/it8518/acpi/ac.asl M src/ec/quanta/it8518/acpi/battery.asl M src/ec/quanta/it8518/acpi/ec.asl 3 files changed, 71 insertions(+), 72 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/46104/1 diff --git a/src/ec/quanta/it8518/acpi/ac.asl b/src/ec/quanta/it8518/acpi/ac.asl index 4da27e0..f88baef 100644 --- a/src/ec/quanta/it8518/acpi/ac.asl +++ b/src/ec/quanta/it8518/acpi/ac.asl @@ -9,7 +9,7 @@ Method (_PSR) { - Store(ACPW, Local0) + Local0 = ACPW Return(Local0) } diff --git a/src/ec/quanta/it8518/acpi/battery.asl b/src/ec/quanta/it8518/acpi/battery.asl index 79a1da3..838f943 100644 --- a/src/ec/quanta/it8518/acpi/battery.asl +++ b/src/ec/quanta/it8518/acpi/battery.asl @@ -49,26 +49,26 @@ // Method to enable full battery workaround Method (BFWE) { - Store (One, BFWK) + BFWK = 1 } // Method to disable full battery workaround Method (BFWD) { - Store (Zero, BFWK) + BFWK = 0 } // Method to wait for EC to be ready after changing the Battery Info ID // Selector Method (WAEC) { - Store (20, Local0) // Timeout 100 msec - While (LEqual (HSID, Zero)) + Local0 = 20 // Timeout 100 msec + While (HSID == 0) { // EC Is not ready Sleep (5) - Decrement (Local0) - If (LEqual (Local0, Zero)) + Local0-- + If (Local0 == 0) { Break } @@ -78,7 +78,7 @@ // Battery Slot Status Method (_STA, 0, Serialized) { - Store (MBTS, BXST) + BXST = MBTS If (BXST) { // Battery is present @@ -97,7 +97,7 @@ // // Information ID 1 - // - Store (One, HIID) + HIID = 1 WAEC () // @@ -105,13 +105,13 @@ // SMART battery : 1 - 10mWh : 0 - mAh // ACPI spec : 0 - mWh : 1 - mAh // - Store(SBCM, Local7) - XOr (Local7, One, Index (PBIF, 0)) + Local7 = SBCM + PBIF [0] = Local7 ^ 1 // // Information ID 0 - // - Store (Zero, HIID) + HIID = 0 WAEC () // @@ -119,17 +119,17 @@ // If (Local7) { - Multiply (SBFC, 10, Index (PBIF, 2)) + PBIF [2] = SBFC * 10 } Else { - Store (SBFC, Index (PBIF, 2)) + PBIF [2] = SBFC } // // Information ID 2 - // - Store (2, HIID) + HIID = 2 WAEC () // @@ -137,63 +137,63 @@ // If (Local7) { - Multiply (SBDC, 10, Local0) + Local0 = SBDC * 10 } Else { - Store (SBDC, Local0) + Local0 = SBDC } - Store (Local0, Index(PBIF, One)) + PBIF [1] = Local0 // // Design capacity of High (5%) // Design capacity of Low (1%) // - Divide (Local0, 20, , Index (PBIF, 5)) - Divide (Local0, 100, , Index (PBIF, 6)) + PBIF [5] = Local0 / 20 + PBIF [6] = Local0 / 100 // // Design voltage // - Store (SBDV, Index (PBIF, 4)) + PBIF [4] = SBDV // // Serial Number // - Store (ToHexString (SBSN), Index (PBIF, 10)) + PBIF [10] = ToHexString (SBSN) // // Information ID 4 - // - Store (4, HIID) + HIID = 4 WAEC () // // Battery Type - Device Chemistry // - Store (ToString (Concatenate(SBCH, 0x00)), Index (PBIF, 11)) + PBIF [11] = ToString (Concatenate(SBCH, 0x00)) // // Information ID 5 - // - Store (5, HIID) + HIID = 5 WAEC () // // OEM Information - Manufacturer Name // - Store (ToString (Concatenate(SBMN, 0x00)), Index (PBIF, 12)) + PBIF [12] = ToString (Concatenate(SBMN, 0x00)) // // Information ID 6 - // - Store (6, HIID) + HIID = 6 WAEC () // // Model Number - Device Name // - Store (ToString (Concatenate(SBDN, 0x00)), Index (PBIF, 9)) + PBIF [9] = ToString (Concatenate(SBDN, 0x00)) Return (PBIF) } @@ -216,80 +216,80 @@ // // Get battery state from EC - If (And (HB0S, 0x20)) + If (HB0S & 0x20) { - Store (2, Local0) + Local0 = 2 } Else { - if (And (HB0S, 0x40)) + if (HB0S & 0x40) { - Store (One, Local0) + Local0 = 1 } Else { - Store (Zero, Local0) + Local0 = 0 } } // Set critical flag if battery is empty - If (LEqual (And (HB0S, 0x0F), 0)) + If ((HB0S & 0x0F) == 0) { - Or (Local0, 4, Local0) + Local0 |= 4 } - Store (Zero, Local1) + Local1 = 0 // Check if AC is present If (ACPW) { // Set only charging/discharging bits - And (Local0, 0x03, Local1) + Local1 = Local0 & 0x03 } Else { // Always discharging when on battery power - Store (One, Local1) + Local1 = 1 } // Flag if the battery level is critical - And (Local0, 0x04, Local4) - Or (Local1, Local4, Local1) - Store (Local1, Index (PBST, 0)) + Local4 = Local0 & 0x04 + Local1 |= Local4 + PBST [0] = Local1 // // 1: BATTERY PRESENT RATE/CURRENT // - Store (ECAC, Local1) - If (LGreaterEqual (Local1, 0x8000)) + Local1 = ECAC + If (Local1 >= 0x8000) { - If (And (Local0, 1)) + If (Local0 & 1) { - Subtract (0x10000, Local1, Local1) + Local1 = 0x10000 - Local1 } Else { // Error - Store (Zero, Local1) + Local1 = 0 } } Else { - If (LNot (AND (Local0, 2))) + If (!(Local0 & 2)) { // Battery is not charging - Store (Zero, Local1) + Local1 = 0 } } - XOr (DerefOf (Index (PBIF, Zero)), One, Local6) + Local6 = DerefOf (PBIF [0]) ^ 1 If (Local6) { - Multiply (ECVO, Local1, Local1) - Divide (Local1, 1000, , Local1) + Local1 *= ECVO + Local1 /= 1000 } - Store (Local1, Index (PBST, One)) + PBST [1] = Local1 // // 2: BATTERY REMAINING CAPACITY @@ -299,36 +299,35 @@ // ACPI spec : 0 - mWh : 1 - mAh If (Local6) { - Multiply (ECRC, 10, Local1) + Local1 = ECRC * 10 } Else { - Store (ECRC, Local1) + Local1 = ECRC } - If (LAnd (BFWK, LAnd (ACPW, LNot (Local0)))) + If (BFWK && ACPW && !Local0) { // On AC power and battery is neither charging // nor discharging. Linux expects a full battery // to report same capacity as last full charge. // https://bugzilla.kernel.org/show_bug.cgi?id=12632 // TODO: Is SBRS the "battery gas gauge"? - Store (SBRS, Local2) + Local2 = SBRS // See if within ~3% of full - ShiftRight (Local2, 5, Local3) - If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), - LLess (Local1, Add (Local2, Local3)))) + Local3 = Local2 >> 5 + If ((Local1 > (Local2 - Local3)) && (Local1 < (Local2 + Local3))) { - Store (Local2, Local1) + Local1 = Local2 } } - Store (Local1, Index (PBST, 2)) + PBST [2] = Local1 // // 3: BATTERY PRESENT VOLTAGE // - Store (ECVO, Index (PBST, 3)) + PBST [3] = ECVO Return (PBST) } diff --git a/src/ec/quanta/it8518/acpi/ec.asl b/src/ec/quanta/it8518/acpi/ec.asl index a3598be..6b368c3 100644 --- a/src/ec/quanta/it8518/acpi/ec.asl +++ b/src/ec/quanta/it8518/acpi/ec.asl @@ -544,19 +544,19 @@ Method (_REG, 2, NotSerialized) { // Initialize AC power state - Store (ACPW, \PWRS) + \PWRS = ACPW // Initialize LID switch state - Store (NOT(HPLD), \LIDS) + \LIDS = ~HPLD // Enable OS control of fan speed - // TODO Store (One, FCOS) + // TODO FCOS = 1 // Force a read of CPU temperature // TODO Which temperature corresponds to the CPU? - Store (TMP0, Local0) + Local0 = TMP0 /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } @@ -594,7 +594,7 @@ // AC Power Connected Method (_Q26, 0, NotSerialized) { - Store (One, \PWRS) + \PWRS = 1 Notify (AC, 0x80) Notify (BATX, 0x80) \PNOT () @@ -603,7 +603,7 @@ // AC Power Removed Method (_Q27, 0, NotSerialized) { - Store (Zero, \PWRS) + \PWRS = 0 Notify (AC, 0x80) \PNOT () } @@ -611,14 +611,14 @@ // LID Open Method (_Q2A) { - Store (One, \LIDS) + \LIDS = 1 Notify (\_SB.LID0, 0x80) } // LID Close (Suspend Trigger) Method (_Q2B) { - Store (Zero, \LIDS) + \LIDS = 0 Notify (\_SB.LID0, 0x80) } @@ -641,7 +641,7 @@ { IF (DCWL) //if Wlan exist { - //TODO Store (WLAT, LANE) + //TODO LANE = WLAT } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I990e9bf3bb8663b245c98d1a3b24eb4afba0433f Gerrit-Change-Number: 46104 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 1

Change in coreboot[master]: ec/roda/it8518: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46105 ) Change subject: ec/roda/it8518: Convert to ASL 2.0 syntax ...................................................................... ec/roda/it8518: Convert to ASL 2.0 syntax Change-Id: I4ecf7256c5bf8ff7160ad3d6f426c9f37babe69b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/roda/it8518/acpi/ac.asl M src/ec/roda/it8518/acpi/battery.asl M src/ec/roda/it8518/acpi/ec.asl M src/ec/roda/it8518/acpi/lid.asl 4 files changed, 70 insertions(+), 70 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/46105/1 diff --git a/src/ec/roda/it8518/acpi/ac.asl b/src/ec/roda/it8518/acpi/ac.asl index c46bf20..cb4af37 100644 --- a/src/ec/roda/it8518/acpi/ac.asl +++ b/src/ec/roda/it8518/acpi/ac.asl @@ -9,8 +9,8 @@ Method (_PSR, 0, NotSerialized) // _PSR: Power Source { - Store ("-----> AC: _PSR", Debug) - Store ("<----- AC: _PSR", Debug) + Debug = "-----> AC: _PSR" + Debug = "<----- AC: _PSR" Return (PWRS) } } diff --git a/src/ec/roda/it8518/acpi/battery.asl b/src/ec/roda/it8518/acpi/battery.asl index 04fe769..35123fd 100644 --- a/src/ec/roda/it8518/acpi/battery.asl +++ b/src/ec/roda/it8518/acpi/battery.asl @@ -42,68 +42,68 @@ // Battery Slot Status Method (_STA, 0, Serialized) { - Store ("-----> BAT0: _STA", Debug) + Debug = "-----> BAT0: _STA" - Store (0x0F, Local0) + Local0 = 0x0F - Store (ECPS, Local1) - And (Local1, 0x02, Local1) - If (LEqual (Local1, 0x02)) + Local1 = ECPS + Local1 &= 0x02 + If (Local1 == 0x02) { - Store (0x1F, Local0) + Local0 = 0x1F } - Store ("<----- BAT0: _STA", Debug) + Debug = "<----- BAT0: _STA" Return (Local0) } Method (_BIF, 0, Serialized) { - Store ("-----> BAT0: _BIF", Debug) + Debug = "-----> BAT0: _BIF" - Store (B0FC, Index (PBIF, 0x02)) - Store (Divide (Multiply (B0FC, 6), 100), Index (PBIF, 0x05)) - Store (Divide (Multiply (B0FC, 3), 100), Index (PBIF, 0x06)) + PBIF [2] = B0FC + PBIF [5] = (B0FC * 6) / 100 + PBIF [6] = (B0FC * 3) / 100 - Store ("<----- BAT0: _BIF", Debug) + Debug = "<----- BAT0: _BIF" Return (PBIF) } Method (_BST, 0, Serialized) { - Store ("-----> BAT0: _BST", Debug) + Debug = "-----> BAT0: _BST" - Store (B0ST, Local0) - And (Local0, 0x40, Local0) - If (LEqual (Local0, 0x40)) + Local0 = B0ST + Local0 &= 0x40 + If (Local0 == 0x40) { - If (LEqual (PWRS, 1)) + If (PWRS == 1) { - Store (0x00, Index (PBST, 0x00)) + PBST [0] = 0x00 } Else { - Store (0x01, Index (PBST, 0x00)) + PBST [0] = 0x01 } } Else { - Store (0x02, Index (PBST, 0x00)) + PBST [0] = 0x02 } - Store (B0AC, Local1) - If (LGreaterEqual (Local1, 0x8000)) + Local1 = B0AC + If (Local1 >= 0x8000) { - Subtract (0x00010000, Local1, Local1) + Local1 = 0x00010000 - Local1 } - Store (Local1, Index (PBST, 0x01)) - Store (B0RC, Index (PBST, 0x02)) - Store (B0VT, Index (PBST, 0x03)) + PBST [1] = Local1 + PBST [2] = B0RC + PBST [3] = B0VT - Store ("<----- BAT0: _BST", Debug) + Debug = "<----- BAT0: _BST" Return (PBST) } diff --git a/src/ec/roda/it8518/acpi/ec.asl b/src/ec/roda/it8518/acpi/ec.asl index d500084..df6dc2d 100644 --- a/src/ec/roda/it8518/acpi/ec.asl +++ b/src/ec/roda/it8518/acpi/ec.asl @@ -52,42 +52,42 @@ Method (_REG, 2, NotSerialized) { - Store ("-----> EC: _REG", Debug) + Debug = "-----> EC: _REG" - Store (0x01, ECOS) + ECOS = 0x01 - Store ("<----- EC: _REG", Debug) + Debug = "<----- EC: _REG" } Method (_Q29, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q29", Debug) + Debug = "-----> EC: _Q29" - Store (1, PWRS) + PWRS = 1 Notify (AC, 0x80) Notify (AC, 0x00) Notify (BAT0, 0x00) Notify (BAT0, 0x80) - Store ("<----- EC: _Q29", Debug) + Debug = "<----- EC: _Q29" } Method (_Q31, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q31", Debug) + Debug = "-----> EC: _Q31" - Store (0, PWRS) + PWRS = 0 Notify (AC, 0x80) Notify (AC, 0x00) Notify (BAT0, 0x00) Notify (BAT0, 0x80) - Store ("<----- EC: _Q31", Debug) + Debug = "<----- EC: _Q31" } Method (_Q32, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q32", Debug) + Debug = "-----> EC: _Q32" Sleep (2500) Notify (BAT0, 0x00) @@ -95,12 +95,12 @@ Notify (BAT0, 0x81) Notify (BAT0, 0x82) - Store ("<----- EC: _Q32", Debug) + Debug = "<----- EC: _Q32" } Method (_Q33, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q33", Debug) + Debug = "-----> EC: _Q33" Sleep (2500) Notify (BAT0, 0x00) @@ -108,87 +108,87 @@ Notify (BAT0, 0x81) Notify (BAT0, 0x82) - Store ("<---- EC: _Q33", Debug) + Debug "<---- EC: _Q33" } Method (_Q36, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q36", Debug) + Debug = "-----> EC: _Q36" Notify (BAT0, 0x80) - Store ("<----- EC: _Q36", Debug) + Debug = "<----- EC: _Q36" } Method (_Q37, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q37", Debug) + Debug = "-----> EC: _Q37" Notify (BAT0, 0x80) - Store ("<----- EC: _Q37", Debug) + Debug = "<----- EC: _Q37" } Method (_Q43, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q43", Debug) + Debug = "-----> EC: _Q43" - Store (BRIG, Local0) - Increment (Local0) - If (LGreater (Local0, 0xAA)) { - Store (0xAA, Local0) + Local0 = BRIG + Local0++ + If (Local0 > 0xAA) { + Local0 = 0xAA } - Store (Local0, BRIG) + BRIG = Local0 \_SB.PCI0.GFX0.INCB () - Store ("<---- EC: _Q43", Debug) + Debug = "<---- EC: _Q43" } Method (_Q44, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q44", Debug) + Debug = "-----> EC: _Q44" - Store (BRIG, Local0) - Decrement (Local0) - If (LLess (Local0, 0xA0)) + Local0 = BRIG + Local0-- + If (Local0 < 0xA0) { - Store (0xA0, Local0) + Local0 = 0xA0 } - Store (Local0, BRIG) + BRIG = Local0 \_SB.PCI0.GFX0.DECB () - Store ("<---- EC: _Q44", Debug) + Debug = "<---- EC: _Q44" } Method (_Q45, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q45", Debug) + Debug = "-----> EC: _Q45" - Store (0, LIDS) + LIDS = 0 Notify (LID, 0x80) - Store ("<----- EC: _Q45", Debug) + Debug = "<----- EC: _Q45" } Method (_Q46, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q46", Debug) + Debug = "-----> EC: _Q46" - Store (1, LIDS) + LIDS = 1 Notify (LID, 0x80) - Store ("<----- EC: _Q46", Debug) + Debug = "<----- EC: _Q46" } Method (_Q70, 0, NotSerialized) // _Qxx: EC Query { - Store ("-----> EC: _Q70", Debug) + Debug = "-----> EC: _Q70" Notify (ALSD, 0x80) - Store ("<----- EC: _Q70", Debug) + Debug = "<----- EC: _Q70" } #include "battery.asl" diff --git a/src/ec/roda/it8518/acpi/lid.asl b/src/ec/roda/it8518/acpi/lid.asl index c30bb4d..b680178 100644 --- a/src/ec/roda/it8518/acpi/lid.asl +++ b/src/ec/roda/it8518/acpi/lid.asl @@ -7,8 +7,8 @@ Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID Method (_LID, 0, NotSerialized) // _LID: Lid Status { - Store ("-----> LID0: _LID", Debug) - Store ("<----- LID0: _LID", Debug) + Debug = "-----> LID0: _LID" + Debug = "<----- LID0: _LID" Return (LIDS) } } -- To view, visit https://review.coreboot.org/c/coreboot/+/46105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4ecf7256c5bf8ff7160ad3d6f426c9f37babe69b Gerrit-Change-Number: 46105 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: ec/smsc/mec1308: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46106 ) Change subject: ec/smsc/mec1308: Convert to ASL 2.0 syntax ...................................................................... ec/smsc/mec1308: Convert to ASL 2.0 syntax Change-Id: Ia976d2512df1b9d940c6dc17d74fd46191aaa4aa Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/smsc/mec1308/acpi/battery.asl M src/ec/smsc/mec1308/acpi/ec.asl 2 files changed, 74 insertions(+), 77 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46106/1 diff --git a/src/ec/smsc/mec1308/acpi/battery.asl b/src/ec/smsc/mec1308/acpi/battery.asl index fad69b8..e83ed7d 100644 --- a/src/ec/smsc/mec1308/acpi/battery.asl +++ b/src/ec/smsc/mec1308/acpi/battery.asl @@ -47,24 +47,24 @@ // Method to enable full battery workaround Method (BFWE) { - Store (One, BFWK) + BFWK = 1 } // Method to disable full battery workaround Method (BFWD) { - Store (Zero, BFWK) + BFWK = 0 } // Swap bytes in a word Method (SWAB, 1, NotSerialized) { - ShiftRight (Arg0, 8, Local0) - ShiftLeft (Arg0, 8, Local1) - And (Local1, 0xFF00, Local1) - Or (Local0, Local1, Local0) - If (LEqual (Local0, 0xFFFF)) { - Store (0xFFFFFFFF, Local0) + Local0 = Arg0 >> 8 + Local1 = Arg0 << 8 + Local1 &= 0xFF00 + Local0 |= Local1 + If (Local0 == 0xFFFF) { + Local0 = 0xFFFFFFFF } Return (Local0) } @@ -81,15 +81,15 @@ Method (_BIF, 0, Serialized) { // Update fields from EC - Store (SWAB (BTDA), Index (PBIF, 1)) - Store (SWAB (BTDF), Index (PBIF, 2)) - Store (SWAB (BTDV), Index (PBIF, 4)) - Store (SWAB (BTDL), Index (PBIF, 6)) + PBIF [1] = SWAB (BTDA) + PBIF [2] = SWAB (BTDF) + PBIF [4] = SWAB (BTDV) + PBIF [6] = SWAB (BTDL) // Get battery info from mainboard - Store (\BATM, Index (PBIF, 9)) - Store (\BATS, Index (PBIF, 10)) - Store (\BATV, Index (PBIF, 12)) + PBIF [9] = \BATM + PBIF [10] = \BATS + PBIF [12] = \BATV Return (PBIF) } @@ -105,26 +105,26 @@ // // Get battery state from EC - Store (BTST, Local0) - Store (Zero, Local1) + Local0 = BTST + Local1 = 0 // Check if AC is present If (ACEX) { // Set only charging/discharging bits - And (Local0, 0x03, Local1) + Local1 = Local0 & 0x03 } Else { // Always discharging when on battery power - Store (0x01, Local1) + Local1 = 0x01 } // Flag if the battery level is critical - And (Local0, 0x04, Local4) - Or (Local1, Local4, Local1) - Store (Local1, Index (PBST, 0)) + Local4 = Local0 & 0x04 + Local1 |= Local4 + PBST [0] = Local1 // Notify if battery state has changed since last time - If (LNotEqual (Local1, BSTP)) { - Store (Local1, BSTP) + If (Local1 != BSTP) { + BSTP = Local1 Notify (BAT0, 0x80) } @@ -132,45 +132,42 @@ // 1: BATTERY PRESENT RATE // - Store (SWAB (BTPR), Local1) - If (LAnd (LNotEqual (Local1, 0xFFFFFFFF), - LGreaterEqual (Local1, 0x8000))) { - Xor (Local1, 0xFFFF, Local1) - Increment (Local1) + Local1 = SWAB (BTPR) + If ((Local1 != 0xFFFFFFFF) && (Local1 >= 0x8000)) { + Local1 ^= 0xFFFF + Local1++ } - Store (Local1, Index (PBST, 1)) + PBST [1] = Local1 // // 2: BATTERY REMAINING CAPACITY // - Store (SWAB (BTRA), Local1) - If (LAnd (LNotEqual (Local1, 0xFFFFFFFF), - LGreaterEqual (Local1, 0x8000))) { - Xor (Local1, 0xFFFF, Local1) - Increment (Local1) + Local1 = SWAB (BTRA) + If ((Local1 != 0xFFFFFFFF) && (Local1 >= 0x8000)) { + Local1 ^= 0xFFFF + Local1++ } - If (LAnd (BFWK, LAnd (ACEX, LNot (Local0)))) { + If (BFWK && ACEX && !Local0) { // On AC power and battery is neither charging // nor discharging. Linux expects a full battery // to report same capacity as last full charge. // https://bugzilla.kernel.org/show_bug.cgi?id=12632 - Store (SWAB (BTDF), Local2) + Local2 = SWAB (BTDF) // See if within ~3% of full - ShiftRight (Local2, 5, Local3) - If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), - LLess (Local1, Add (Local2, Local3)))) + Local3 = Local2 >> 5 + If ((Local1 > (Local2 - Local3)) && (Local1 < (Local2 + Local3))) { - Store (Local2, Local1) + Local1 = Local2 } } - Store (Local1, Index (PBST, 2)) + PBST [2] = Local1) // // 3: BATTERY PRESENT VOLTAGE // - Store (SWAB (BTVO), Index (PBST, 3)) + PBST [3] = SWAB (BTVO) Return (PBST) } diff --git a/src/ec/smsc/mec1308/acpi/ec.asl b/src/ec/smsc/mec1308/acpi/ec.asl index c7b180d..6fd8165 100644 --- a/src/ec/smsc/mec1308/acpi/ec.asl +++ b/src/ec/smsc/mec1308/acpi/ec.asl @@ -58,24 +58,24 @@ Method (_REG, 2, NotSerialized) { // Initialize AC power state - Store (ACEX, \PWRS) + \PWRS = ACEX // Initialize LID switch state - Store (LIDS, \LIDS) + \LIDS = LIDS // Enable OS control of fan speed - Store (One, FCOS) + FCOS = 1 // Force a read of CPU temperature - Store (CPUT, Local0) + Local0 = CPUT /* So that we don't get a warning that Local0 is unused. */ - Increment (Local0) + Local0++ } PowerResource (FNP0, 0, 0) { Method (_STA) { - If (LLessEqual (\FLVL, 0)) { + If (\FLVL <= 0) { Return (One) } Else { Return (Zero) @@ -83,15 +83,15 @@ } Method (_ON) { If (FCOS) { - Store (One, FSL0) - Store (0, \FLVL) + FSL0 = 1 + \FLVL = 0 Notify (\_TZ.THRM, 0x81) } } Method (_OFF) { If (FCOS) { - Store (Zero, FSL0) - Store (1, \FLVL) + FSL0 = 0 + \FLVL = 1 Notify (\_TZ.THRM, 0x81) } } @@ -100,7 +100,7 @@ PowerResource (FNP1, 0, 0) { Method (_STA) { - If (LLessEqual (\FLVL, 1)) { + If (\FLVL <= 1) { Return (One) } Else { Return (Zero) @@ -108,15 +108,15 @@ } Method (_ON) { If (FCOS) { - Store (One, FSL1) - Store (1, \FLVL) + FSL1 = 1 + \FLVL = 1 Notify (\_TZ.THRM, 0x81) } } Method (_OFF) { If (FCOS) { - Store (Zero, FSL1) - Store (2, \FLVL) + FSL1 = 0 + \FLVL = 2 Notify (\_TZ.THRM, 0x81) } } @@ -125,7 +125,7 @@ PowerResource (FNP2, 0, 0) { Method (_STA) { - If (LLessEqual (\FLVL, 2)) { + If (\FLVL <= 2) { Return (One) } Else { Return (Zero) @@ -133,15 +133,15 @@ } Method (_ON) { If (FCOS) { - Store (One, FSL2) - Store (2, \FLVL) + FSL2 = 1 + \FLVL = 2 Notify (\_TZ.THRM, 0x81) } } Method (_OFF) { If (FCOS) { - Store (Zero, FSL2) - Store (3, \FLVL) + FSL2 = 0 + \FLVL = 3 Notify (\_TZ.THRM, 0x81) } } @@ -150,7 +150,7 @@ PowerResource (FNP3, 0, 0) { Method (_STA) { - If (LLessEqual (\FLVL, 3)) { + If (\FLVL <= 3) { Return (One) } Else { Return (Zero) @@ -158,15 +158,15 @@ } Method (_ON) { If (FCOS) { - Store (One, FSL3) - Store (3, \FLVL) + FSL3 = 1 + \FLVL = 3 Notify (\_TZ.THRM, 0x81) } } Method (_OFF) { If (FCOS) { - Store (Zero, FSL3) - Store (4, \FLVL) + FSL3 = 0 + \FLVL = 4 Notify (\_TZ.THRM, 0x81) } } @@ -175,7 +175,7 @@ PowerResource (FNP4, 0, 0) { Method (_STA) { - If (LLessEqual (\FLVL, 4)) { + If (\FLVL <= 4) { Return (One) } Else { Return (Zero) @@ -183,15 +183,15 @@ } Method (_ON) { If (FCOS) { - Store (One, FSL4) - Store (4, \FLVL) + FSL4 = 1 + \FLVL = 4 Notify (\_TZ.THRM, 0x81) } } Method (_OFF) { If (FCOS) { - Store (Zero, FSL4) - Store (5, \FLVL) + FSL4 = 0 + \FLVL = 5 Notify (\_TZ.THRM, 0x81) } } @@ -235,7 +235,7 @@ // AC Power Connected Method (_Q51, 0, NotSerialized) { - Store (One, \PWRS) + \PWRS = 1 Notify (AC, 0x80) \PNOT () } @@ -243,7 +243,7 @@ // AC Power Removed Method (_Q52, 0, NotSerialized) { - Store (Zero, \PWRS) + \PWRS = 0 Notify (AC, 0x80) \PNOT () } @@ -271,14 +271,14 @@ // Lid Switch Event Method (_Q5E, 0, NotSerialized) { - Store (LIDS, \LIDS) + \LIDS = LIDS Notify (\_SB.LID0, 0x80) } // Lid Switch Event Method (_Q5F, 0, NotSerialized) { - Store (LIDS, \LIDS) + \LIDS = LIDS Notify (\_SB.LID0, 0x80) } -- To view, visit https://review.coreboot.org/c/coreboot/+/46106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia976d2512df1b9d940c6dc17d74fd46191aaa4aa Gerrit-Change-Number: 46106 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: sb/amd/cimx/sb800/acpi: Convert 'pcie.asl' to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 27 Jan '21

27 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45874 ) Change subject: sb/amd/cimx/sb800/acpi: Convert 'pcie.asl' to ASL 2.0 syntax ...................................................................... sb/amd/cimx/sb800/acpi: Convert 'pcie.asl' to ASL 2.0 syntax Change-Id: Ic817c261a3be8d5ee333982873996aa35778a192 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/amd/cimx/sb800/acpi/pcie.asl 1 file changed, 72 insertions(+), 72 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/45874/1 diff --git a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl index a2d7f12..9f6a934 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl @@ -138,18 +138,18 @@ { \_SB.CIRQ() } - Store(Arg0, PMOD) + PMOD = Arg0 } Method(CIRQ, 0x00, NotSerialized){ - Store(0, PIRA) - Store(0, PIRB) - Store(0, PIRC) - Store(0, PIRD) - Store(0, PIRE) - Store(0, PIRF) - Store(0, PIRG) - Store(0, PIRH) + PIRA = 0 + PIRB = 0 + PIRC = 0 + PIRD = 0 + PIRE = 0 + PIRF = 0 + PIRG = 0 + PIRH = 0 } Name(IRQB, ResourceTemplate(){ @@ -170,27 +170,27 @@ Method(_STA, 0) { if (PIRA) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTA._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKA\\_DIS\n") */ - Store(0, PIRA) + PIRA = 0 } /* End Method(_SB.INTA._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKA\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTA._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKA\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRA, IRQN) - Return(IRQB) + IRQN = 1 << PIRA + Return (IRQB) } /* Method(_SB.INTA._CRS) */ Method(_SRS, 1) { @@ -200,9 +200,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRA) + PIRA = Local0 } /* End Method(_SB.INTA._SRS) */ } /* End Device(INTA) */ @@ -212,27 +212,27 @@ Method(_STA, 0) { if (PIRB) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTB._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKB\\_DIS\n") */ - Store(0, PIRB) + PIRB = 0 } /* End Method(_SB.INTB._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKB\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTB._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKB\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRB, IRQN) - Return(IRQB) + IRQN = 1 << PIRB + Return (IRQB) } /* Method(_SB.INTB._CRS) */ Method(_SRS, 1) { @@ -242,9 +242,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRB) + PIRB = Local0 } /* End Method(_SB.INTB._SRS) */ } /* End Device(INTB) */ @@ -254,15 +254,15 @@ Method(_STA, 0) { if (PIRC) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTC._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKC\\_DIS\n") */ - Store(0, PIRC) + PIRC = 0 } /* End Method(_SB.INTC._DIS) */ Method(_PRS ,0) { @@ -273,8 +273,8 @@ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKC\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRC, IRQN) - Return(IRQB) + IRQN = 1 << PIRC + Return (IRQB) } /* Method(_SB.INTC._CRS) */ Method(_SRS, 1) { @@ -284,9 +284,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRC) + PIRC = Local0 } /* End Method(_SB.INTC._SRS) */ } /* End Device(INTC) */ @@ -296,27 +296,27 @@ Method(_STA, 0) { if (PIRD) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTD._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKD\\_DIS\n") */ - Store(0, PIRD) + PIRD = 0 } /* End Method(_SB.INTD._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKD\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTD._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKD\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRD, IRQN) - Return(IRQB) + IRQN = 1 << PIRD + Return (IRQB) } /* Method(_SB.INTD._CRS) */ Method(_SRS, 1) { @@ -326,9 +326,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRD) + PIRD = Local0 } /* End Method(_SB.INTD._SRS) */ } /* End Device(INTD) */ @@ -338,27 +338,27 @@ Method(_STA, 0) { if (PIRE) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTE._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKE\\_DIS\n") */ - Store(0, PIRE) + PIRE = 0 } /* End Method(_SB.INTE._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKE\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTE._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKE\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRE, IRQN) - Return(IRQB) + IRQN = 1 << PIRE + Return (IRQB) } /* Method(_SB.INTE._CRS) */ Method(_SRS, 1) { @@ -368,9 +368,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRE) + PIRE Local0 } /* End Method(_SB.INTE._SRS) */ } /* End Device(INTE) */ @@ -380,27 +380,27 @@ Method(_STA, 0) { if (PIRF) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTF._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKF\\_DIS\n") */ - Store(0, PIRF) + PIRF = 0 } /* End Method(_SB.INTF._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKF\\_PRS\n") */ - Return(PITF) + Return (PITF) } /* Method(_SB.INTF._PRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKF\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRF, IRQN) - Return(IRQB) + IRQN = 1 << PIRF + Return (IRQB) } /* Method(_SB.INTF._CRS) */ Method(_SRS, 1) { @@ -410,9 +410,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRF) + PIRF = Local0 } /* End Method(_SB.INTF._SRS) */ } /* End Device(INTF) */ @@ -422,27 +422,27 @@ Method(_STA, 0) { if (PIRG) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTG._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKG\\_DIS\n") */ - Store(0, PIRG) + PIRG = 0 } /* End Method(_SB.INTG._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKG\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTG._CRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKG\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRG, IRQN) - Return(IRQB) + IRQN = 1 << PIRG + Return (IRQB) } /* Method(_SB.INTG._CRS) */ Method(_SRS, 1) { @@ -452,9 +452,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRG) + PIRG = Local0 } /* End Method(_SB.INTG._SRS) */ } /* End Device(INTG) */ @@ -464,27 +464,27 @@ Method(_STA, 0) { if (PIRH) { - Return(0x0B) /* sata is invisible */ + Return (0x0B) /* sata is invisible */ } else { - Return(0x09) /* sata is disabled */ + Return (0x09) /* sata is disabled */ } } /* End Method(_SB.INTH._STA) */ Method(_DIS ,0) { /* DBGO("\\_SB\\LNKH\\_DIS\n") */ - Store(0, PIRH) + PIRH = 0 } /* End Method(_SB.INTH._DIS) */ Method(_PRS ,0) { /* DBGO("\\_SB\\LNKH\\_PRS\n") */ - Return(IRQP) + Return (IRQP) } /* Method(_SB.INTH._CRS) */ Method(_CRS ,0) { /* DBGO("\\_SB\\LNKH\\_CRS\n") */ CreateWordField(IRQB, 0x1, IRQN) - ShiftLeft(1, PIRH, IRQN) - Return(IRQB) + IRQN = 1 << PIRH + Return (IRQB) } /* Method(_SB.INTH._CRS) */ Method(_SRS, 1) { @@ -494,9 +494,9 @@ /* Use lowest available IRQ */ FindSetRightBit(IRQM, Local0) if (Local0) { - Decrement(Local0) + Local0-- } - Store(Local0, PIRH) + PIRH = Local0 } /* End Method(_SB.INTH._SRS) */ } /* End Device(INTH) */ -- To view, visit https://review.coreboot.org/c/coreboot/+/45874 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic817c261a3be8d5ee333982873996aa35778a192 Gerrit-Change-Number: 45874 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/strago: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46185 ) Change subject: mb/intel/strago: Convert to ASL 2.0 syntax ...................................................................... mb/intel/strago: Convert to ASL 2.0 syntax Change-Id: I633104d93e9647d3eed90a762b0587692b3eccc8 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/intel/strago/acpi/mainboard.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/46185/1 diff --git a/src/mainboard/intel/strago/acpi/mainboard.asl b/src/mainboard/intel/strago/acpi/mainboard.asl index 0a7fb5c..dcfb040 100644 --- a/src/mainboard/intel/strago/acpi/mainboard.asl +++ b/src/mainboard/intel/strago/acpi/mainboard.asl @@ -41,7 +41,7 @@ Method (_STA) { - If (LEqual (\S1EN, 1)) { + If (\S1EN == 1) { Return (0xF) } Else { Return (0x0) @@ -80,7 +80,7 @@ Method (_STA) { - If (LEqual (\S1EN, 1)) { + If (\S1EN == 1) { Return (0xF) } Else { Return (0x0) @@ -155,7 +155,7 @@ Method (_STA) { - If (LEqual (\S6EN, 1)) { + If (\S6EN == 1) { Return (0xF) } Else { Return (0x0) -- To view, visit https://review.coreboot.org/c/coreboot/+/46185 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I633104d93e9647d3eed90a762b0587692b3eccc8 Gerrit-Change-Number: 46185 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/kontron/ktqm77: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46188 ) Change subject: mb/kontron/ktqm77: Convert to ASL 2.0 syntax ...................................................................... mb/kontron/ktqm77: Convert to ASL 2.0 syntax Change-Id: I7ba4625075fd3c27092d854903baf140521c8f7b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/kontron/ktqm77/acpi/platform.asl M src/mainboard/kontron/ktqm77/acpi/thermal.asl 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/46188/1 diff --git a/src/mainboard/kontron/ktqm77/acpi/platform.asl b/src/mainboard/kontron/ktqm77/acpi/platform.asl index cc45619..a0e255c 100644 --- a/src/mainboard/kontron/ktqm77/acpi/platform.asl +++ b/src/mainboard/kontron/ktqm77/acpi/platform.asl @@ -7,7 +7,7 @@ Method(_PTS,1) { /* Let suspend LED flash slowly in S3 and S4 */ - If (LOr (LEqual (Arg0, 3), LEqual (Arg0, 4))) + If ((Arg0 == 3) || (Arg0 == 4)) { \_SB.PCI0.LPCB.SIO0.SUSL (0x06) } diff --git a/src/mainboard/kontron/ktqm77/acpi/thermal.asl b/src/mainboard/kontron/ktqm77/acpi/thermal.asl index 2400493..3465b75 100644 --- a/src/mainboard/kontron/ktqm77/acpi/thermal.asl +++ b/src/mainboard/kontron/ktqm77/acpi/thermal.asl @@ -21,10 +21,10 @@ // Convert from Degrees C to 1/10 Kelvin for ACPI Method (CTOK, 1) { // 10th of Degrees C - Multiply (Arg0, 10, Local0) + Local0 = Arg0 * 10 // Convert to Kelvin - Add (Local0, 2732, Local0) + Local0 += 2732 Return (Local0) } -- To view, visit https://review.coreboot.org/c/coreboot/+/46188 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ba4625075fd3c27092d854903baf140521c8f7b Gerrit-Change-Number: 46188 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/asus/a88xm-e: Convert to ASL 2.0 syntax
by HAOUAS Elyes (Code Review) 26 Jan '21

26 Jan '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46156 ) Change subject: mb/asus/a88xm-e: Convert to ASL 2.0 syntax ...................................................................... mb/asus/a88xm-e: Convert to ASL 2.0 syntax Change-Id: I8887b869e9ed809f7861b810c2fb994fa2ee062e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/a88xm-e/acpi/sleep.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/46156/1 diff --git a/src/mainboard/asus/a88xm-e/acpi/sleep.asl b/src/mainboard/asus/a88xm-e/acpi/sleep.asl index 8777337..46f37f3 100644 --- a/src/mainboard/asus/a88xm-e/acpi/sleep.asl +++ b/src/mainboard/asus/a88xm-e/acpi/sleep.asl @@ -22,10 +22,10 @@ Method(\_PTS, 1) { /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 - Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(\_PTS) */ /* -- To view, visit https://review.coreboot.org/c/coreboot/+/46156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8887b869e9ed809f7861b810c2fb994fa2ee062e Gerrit-Change-Number: 46156 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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