coreboot-gerrit June 2018

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Change in coreboot[master]: amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs.
by Daniel Kurtz (Code Review) 07 Jun '18

07 Jun '18

Daniel Kurtz has uploaded this change for review. ( https://review.coreboot.org/26930 Change subject: amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs. ...................................................................... amd/stoneyridge: Set SCI_MAP for SCI enabled GPIOs. By default we use a 1:1 mapping between GEVENT bits and the corresponding SCI_MAP entry. However, we still must program the SCI_MAP entries with the GEVENT number. Signed-off-by: Daniel Kurtz <djkurtz(a)chromium.org> BUG=b:109759838 TEST=(1) powerd_dbus_suspend (2) move finger on touchpad for ~1 second => system resumes from S3 Change-Id: Ie7be45264f9bfec56efc47a03071fdb924d16b6a --- M src/soc/amd/stoneyridge/gpio.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/26930/1 diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index 1b7f055..b09e79d 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -235,6 +235,7 @@ gpio_ptr = (uint32_t *)gpio_get_address(gpio); if (control_flags & GPIO_SPECIAL_FLAG) { + uint8_t *sci_map; gevent_num = get_gpio_gevent(gpio); if (gevent_num < 0) { printk(BIOS_WARNING, "Warning: GPIO pin %d has" @@ -267,6 +268,10 @@ edge_level |= bit_edge << gevent_num; direction |= bit_level << gevent_num; mask |= (1 << gevent_num); + sci_map = (uint8_t*)(uintptr_t)(APU_SMI_BASE + + SMI_SCI_MAP(gevent_num)); + + write8(sci_map, gevent_num); break; default: printk(BIOS_WARNING, "Error, flags 0x%08x\n", -- To view, visit https://review.coreboot.org/26930 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie7be45264f9bfec56efc47a03071fdb924d16b6a Gerrit-Change-Number: 26930 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)chromium.org>

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Change in coreboot[master]: soc/intel/{glk, apl} and mainboards: Configure LPC_CLKRUN# pin as GPIO...
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23742 ) Change subject: soc/intel/{glk,apl} and mainboards: Configure LPC_CLKRUN# pin as GPIO for S0ix ...................................................................... Patch Set 12: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74504/ : SUCCESS -- To view, visit https://review.coreboot.org/23742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie0c1013fee638a3b7a91469736efc0c25a1597fa Gerrit-Change-Number: 23742 Gerrit-PatchSet: 12 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 21:42:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: src/soc/intel/denverton_ns/Kconfig
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26928 ) Change subject: src/soc/intel/denverton_ns/Kconfig ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74503/ : SUCCESS -- To view, visit https://review.coreboot.org/26928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5 Gerrit-Change-Number: 26928 Gerrit-PatchSet: 3 Gerrit-Owner: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 20:57:12 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/soc/intel/denverton_ns/Kconfig
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26928 ) Change subject: src/soc/intel/denverton_ns/Kconfig ...................................................................... Patch Set 2: Build Failed https://qa.coreboot.org/job/coreboot-gerrit/74502/ : ABORTED -- To view, visit https://review.coreboot.org/26928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5 Gerrit-Change-Number: 26928 Gerrit-PatchSet: 2 Gerrit-Owner: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 20:52:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/intel/dg43gt/acpi_tables.c: Remove unneeded includes
by Elyes HAOUAS (Code Review) 07 Jun '18

07 Jun '18

Elyes HAOUAS has abandoned this change. ( https://review.coreboot.org/26907 ) Change subject: mb/intel/dg43gt/acpi_tables.c: Remove unneeded includes ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/26907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: If1f032d097224a1102ba29d8d45dce46aad3a91a Gerrit-Change-Number: 26907 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: Update src/soc/intel/denverton_ns/Kconfig
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26928 ) Change subject: Update src/soc/intel/denverton_ns/Kconfig ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/74501/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/28625/ : SUCCESS -- To view, visit https://review.coreboot.org/26928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5 Gerrit-Change-Number: 26928 Gerrit-PatchSet: 1 Gerrit-Owner: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 20:46:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Update src/soc/intel/denverton_ns/Kconfig
by Vanessa Eusebio (Code Review) 07 Jun '18

07 Jun '18

Vanessa Eusebio has uploaded this change for review. ( https://review.coreboot.org/26928 Change subject: Update src/soc/intel/denverton_ns/Kconfig ...................................................................... Update src/soc/intel/denverton_ns/Kconfig * Add CPU_INTEL_FIRMWARE_INTERFACE_TABLE Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5 --- M src/soc/intel/denverton_ns/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/26928/1 diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 6c366f1..9e9d813 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -55,6 +55,7 @@ select TSC_SYNC_MFENCE select UDELAY_TSC select UDK_2015_BINDING + select CPU_INTEL_FIRMWARE_INTERFACE_TABLE config FSP_T_ADDR hex "Intel FSP-T (temp ram init) binary location" -- To view, visit https://review.coreboot.org/26928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5 Gerrit-Change-Number: 26928 Gerrit-PatchSet: 1 Gerrit-Owner: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com>

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Change in coreboot[master]: mb/intel/dg43gt/acpi_tables.c: Remove unneeded includes
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26907 ) Change subject: mb/intel/dg43gt/acpi_tables.c: Remove unneeded includes ...................................................................... Patch Set 5: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/74498/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/28622/ : SUCCESS -- To view, visit https://review.coreboot.org/26907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If1f032d097224a1102ba29d8d45dce46aad3a91a Gerrit-Change-Number: 26907 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 20:35:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/intel/d945gclf/acpi_tables.c: Remove unneeded includes
by build bot (Jenkins) (Code Review) 07 Jun '18

07 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26906 ) Change subject: mb/intel/d945gclf/acpi_tables.c: Remove unneeded includes ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74499/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28623/ : SUCCESS -- To view, visit https://review.coreboot.org/26906 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie82e63011d7f698a288b38a36a82179351f9aa6c Gerrit-Change-Number: 26906 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 06 Jun 2018 20:35:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: kahlee: Make CPU1 handle all SMIs
by Raul Rangel (Code Review) 07 Jun '18

07 Jun '18

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/26927 Change subject: kahlee: Make CPU1 handle all SMIs ...................................................................... kahlee: Make CPU1 handle all SMIs If CPU0 handles the ELOG_GSMI_APM_CNT SMI after the SMI handler completes, the system will reboot. Forcing CPU1 to always handle the SMI fixes the issue. I have not been able to find an explanation for this. I realize this is a terrible and ugly hack but it makes it possible to shutdown consistently. BUG=b:80539294 TEST=built on grunt and tried `halt` a few times in a row. Change-Id: Ibb2784648a8e827887170f34a01dcd5f411522e2 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- M src/cpu/x86/smm/smm_module_handler.c 1 file changed, 20 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/26927/1 diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index c2001ec..46c4a7e 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -117,6 +117,13 @@ return base; } +static void pause(void) +{ + asm volatile ( + ".byte 0xf3, 0x90\n" /* PAUSE */ + ); +} + asmlinkage void smm_handler_start(void *arg) { const struct smm_module_params *p; @@ -139,14 +146,24 @@ return; } +#if defined(CONFIG_BOARD_GOOGLE_BASEBOARD_KAHLEE) + /* + * Force CPU 1 to handle all SMIs. We need to do this because if CPU0 + * handles an SMI for ELOG_GSMI_APM_CNT it will cause the system to + * reboot. + */ + while (cpu == 0 && smi_handler_status == SMI_UNLOCKED) { + // Wait for the other CPU to get the lock + pause(); + } +#endif + /* Are we ok to execute the handler? */ if (!smi_obtain_lock()) { /* For security reasons we don't release the other CPUs * until the CPU with the lock is actually done */ while (smi_handler_status == SMI_LOCKED) { - asm volatile ( - ".byte 0xf3, 0x90\n" /* PAUSE */ - ); + pause(); } return; } -- To view, visit https://review.coreboot.org/26927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ibb2784648a8e827887170f34a01dcd5f411522e2 Gerrit-Change-Number: 26927 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

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coreboot-gerrit June 2018