build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25709 )
Change subject: arch/x86: Print CPU Index and APIC ID in case of exception
......................................................................
Patch Set 4: Verified+1
Build Failed
https://qa.coreboot.org/job/coreboot-checkpatch/24819/ : SUCCESS
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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I2d3776c9259747197a5f2410032f9b03786407fb
Gerrit-Change-Number: 25709
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org>
Gerrit-Comment-Date: Tue, 24 Apr 2018 09:08:42 +0000
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Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/25806
Change subject: soc/intel/common/block: Create new folder for common i2c V2 code
......................................................................
soc/intel/common/block: Create new folder for common i2c V2 code
There is already I2C folder which is common IP and exists in common
folder. Intent of this patch is to create a new folder i2c_v2 and try to
move code which is still common across soc and still sit inside i2c.c
file inside specific soc folder.
Use "SOC_INTEL_COMMON_BLOCK_I2C_V2" this Kconfig to select common i2c
code instead of using soc dependent code.
This change will be used from cannonlake onwards and SOC will only have
one function which returns soc dependent i2c configuration.
Change-Id: Iaa1d8fc80b6fd06a88c76b040967e8694af256ea
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
---
A src/soc/intel/common/block/i2c_v2/Kconfig
A src/soc/intel/common/block/i2c_v2/Makefile.inc
A src/soc/intel/common/block/i2c_v2/i2c.c
3 files changed, 77 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/25806/1
diff --git a/src/soc/intel/common/block/i2c_v2/Kconfig b/src/soc/intel/common/block/i2c_v2/Kconfig
new file mode 100644
index 0000000..1260975
--- /dev/null
+++ b/src/soc/intel/common/block/i2c_v2/Kconfig
@@ -0,0 +1,7 @@
+config SOC_INTEL_COMMON_BLOCK_I2C_V2
+ bool
+ select SOC_INTEL_COMMON_BLOCK_I2C
+ help
+ Intel Processor Common I2C support.
+ V2 is applicable from cannonlake onwards. This field also requires SOC
+ to implement function which returns I2C config to common code.
diff --git a/src/soc/intel/common/block/i2c_v2/Makefile.inc b/src/soc/intel/common/block/i2c_v2/Makefile.inc
new file mode 100644
index 0000000..97a090b
--- /dev/null
+++ b/src/soc/intel/common/block/i2c_v2/Makefile.inc
@@ -0,0 +1,4 @@
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_V2)+= i2c.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_V2)+= i2c.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_V2)+= i2c.c
+verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_V2)+= i2c.c
diff --git a/src/soc/intel/common/block/i2c_v2/i2c.c b/src/soc/intel/common/block/i2c_v2/i2c.c
new file mode 100644
index 0000000..2cb457b
--- /dev/null
+++ b/src/soc/intel/common/block/i2c_v2/i2c.c
@@ -0,0 +1,66 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci_def.h>
+#include <drivers/i2c/designware/dw_i2c.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include "chip.h"
+
+uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)
+{
+ return EARLY_I2C_BASE(bus);
+}
+
+int dw_i2c_soc_devfn_to_bus(unsigned int devfn)
+{
+ switch (devfn) {
+ case PCH_DEVFN_I2C0:
+ return 0;
+ case PCH_DEVFN_I2C1:
+ return 1;
+ case PCH_DEVFN_I2C2:
+ return 2;
+ case PCH_DEVFN_I2C3:
+ return 3;
+ case PCH_DEVFN_I2C4:
+ return 4;
+ case PCH_DEVFN_I2C5:
+ return 5;
+ }
+ return -1;
+}
+
+int dw_i2c_soc_bus_to_devfn(unsigned int bus)
+{
+ switch (bus) {
+ case 0:
+ return PCH_DEVFN_I2C0;
+ case 1:
+ return PCH_DEVFN_I2C1;
+ case 2:
+ return PCH_DEVFN_I2C2;
+ case 3:
+ return PCH_DEVFN_I2C3;
+ case 4:
+ return PCH_DEVFN_I2C4;
+ case 5:
+ return PCH_DEVFN_I2C5;
+ }
+ return -1;
+}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iaa1d8fc80b6fd06a88c76b040967e8694af256ea
Gerrit-Change-Number: 25806
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>