coreboot-gerrit April 2018

coreboot-gerrit@coreboot.org

1 participants
2168 discussions

Change in coreboot[master]: mb/google/octopus: Create phaser variant
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25877 ) Change subject: mb/google/octopus: Create phaser variant ...................................................................... Patch Set 1: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/70817/ : SUCCESS -- To view, visit https://review.coreboot.org/25877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia03e8af91741f1f7aa3a42ac28688b8b6a708932 Gerrit-Change-Number: 25877 Gerrit-PatchSet: 1 Gerrit-Owner: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 19:12:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/google/octopus: Create phaser variant
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25877 ) Change subject: mb/google/octopus: Create phaser variant ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/25005/ : SUCCESS -- To view, visit https://review.coreboot.org/25877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia03e8af91741f1f7aa3a42ac28688b8b6a708932 Gerrit-Change-Number: 25877 Gerrit-PatchSet: 1 Gerrit-Owner: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 18:51:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mb/google/octopus: Create phaser variant
by Justin TerAvest (Code Review) 26 Apr '18

26 Apr '18

Justin TerAvest has uploaded this change for review. ( https://review.coreboot.org/25877 Change subject: mb/google/octopus: Create phaser variant ...................................................................... mb/google/octopus: Create phaser variant This creates a phaser variant for octopus. Nothing is set in the variant files here; everything is picked up from baseboard. BUG=b:78572180 TEST=None Change-Id: Ia03e8af91741f1f7aa3a42ac28688b8b6a708932 Signed-off-by: Justin TerAvest <teravest(a)chromium.org> --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/phaser/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/phaser/include/variant/ec.h A src/mainboard/google/octopus/variants/phaser/include/variant/gpio.h 5 files changed, 65 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/25877/1 diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 0ca047a..3254ec6 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -41,6 +41,7 @@ string default "yorp" if BOARD_GOOGLE_YORP default "bip" if BOARD_GOOGLE_BIP + default "phaser" if BOARD_GOOGLE_PHASER default "octopus" if BOARD_GOOGLE_OCTOPUS config DEVICETREE @@ -51,6 +52,7 @@ string default "Yorp" if BOARD_GOOGLE_YORP default "Bip" if BOARD_GOOGLE_BIP + default "Phaser" if BOARD_GOOGLE_PHASER default "Octopus" if BOARD_GOOGLE_OCTOPUS config MAINBOARD_FAMILY @@ -62,6 +64,7 @@ depends on CHROMEOS default "YORP TEST 7755" if BOARD_GOOGLE_YORP default "BIP TEST 5732" if BOARD_GOOGLE_BIP + default "PHASER TEST 7167" if BOARD_GOOGLE_PHASER default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS config HAS_TPM diff --git a/src/mainboard/google/octopus/Kconfig.name b/src/mainboard/google/octopus/Kconfig.name index f4bd02c..23f796e 100644 --- a/src/mainboard/google/octopus/Kconfig.name +++ b/src/mainboard/google/octopus/Kconfig.name @@ -10,3 +10,7 @@ bool "Bip" select BOARD_GOOGLE_BASEBOARD_OCTOPUS select BASEBOARD_OCTOPUS_LAPTOP +config BOARD_GOOGLE_PHASER + bool "Phaser" + select BOARD_GOOGLE_BASEBOARD_OCTOPUS + select BASEBOARD_OCTOPUS_LAPTOP diff --git a/src/mainboard/google/octopus/variants/phaser/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/phaser/include/variant/acpi/dptf.asl new file mode 100644 index 0000000..cc17d56 --- /dev/null +++ b/src/mainboard/google/octopus/variants/phaser/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/dptf.asl> diff --git a/src/mainboard/google/octopus/variants/phaser/include/variant/ec.h b/src/mainboard/google/octopus/variants/phaser/include/variant/ec.h new file mode 100644 index 0000000..16f931b --- /dev/null +++ b/src/mainboard/google/octopus/variants/phaser/include/variant/ec.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/octopus/variants/phaser/include/variant/gpio.h b/src/mainboard/google/octopus/variants/phaser/include/variant/gpio.h new file mode 100644 index 0000000..1fd1e11 --- /dev/null +++ b/src/mainboard/google/octopus/variants/phaser/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ -- To view, visit https://review.coreboot.org/25877 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia03e8af91741f1f7aa3a42ac28688b8b6a708932 Gerrit-Change-Number: 25877 Gerrit-PatchSet: 1 Gerrit-Owner: Justin TerAvest <teravest(a)chromium.org>

1 0

Change in coreboot[master]: mb/google/poppy, soraka, nautilus: Enable xDCI
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25849 ) Change subject: mb/google/poppy,soraka,nautilus: Enable xDCI ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/70814/ : SUCCESS -- To view, visit https://review.coreboot.org/25849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9b0f81bda889b822479ead4d1acc2b613151a304 Gerrit-Change-Number: 25849 Gerrit-PatchSet: 5 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 18:12:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: soc/intel/common/block/xdci: Use vboot_can_enable_udc in xdci_can_enable
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25848 ) Change subject: soc/intel/common/block/xdci: Use vboot_can_enable_udc in xdci_can_enable ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/70813/ : SUCCESS -- To view, visit https://review.coreboot.org/25848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia83b91ce17eec782faf5bb318ad8c00c09e2db05 Gerrit-Change-Number: 25848 Gerrit-PatchSet: 4 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 18:06:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25757 ) Change subject: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2 ...................................................................... Patch Set 7: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/70811/ : SUCCESS -- To view, visit https://review.coreboot.org/25757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc Gerrit-Change-Number: 25757 Gerrit-PatchSet: 7 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 17:45:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: southbridge/broadcom: Remove spaces before/after parenthesis
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25875 ) Change subject: southbridge/broadcom: Remove spaces before/after parenthesis ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/25001/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/70810/ : SUCCESS -- To view, visit https://review.coreboot.org/25875 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic43b5ddaa395658ab7c34cdd004516884a20b005 Gerrit-Change-Number: 25875 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 17:38:48 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25757 ) Change subject: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2 ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/25002/ : SUCCESS -- To view, visit https://review.coreboot.org/25757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc Gerrit-Change-Number: 25757 Gerrit-PatchSet: 7 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 17:38:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: southbridge/broadcom: Remove spaces before/after parenthesis
by Elyes HAOUAS (Code Review) 26 Apr '18

26 Apr '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/25875 Change subject: southbridge/broadcom: Remove spaces before/after parenthesis ...................................................................... southbridge/broadcom: Remove spaces before/after parenthesis Change-Id: Ic43b5ddaa395658ab7c34cdd004516884a20b005 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/broadcom/bcm5785/bcm5785.c M src/southbridge/broadcom/bcm5785/early_setup.c M src/southbridge/broadcom/bcm5785/sata.c M src/southbridge/broadcom/bcm5785/sb_pci_main.c M src/southbridge/broadcom/bcm5785/smbus.h 5 files changed, 14 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/25875/1 diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c index d9a1268..2ce00a7 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785.c @@ -29,14 +29,14 @@ /* See if we are on the behind the pcix bridge */ bus_dev = dev->bus->dev; if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && - (bus_dev->device == 0x0036 )) // device under PCI-X Bridge + (bus_dev->device == 0x0036)) // device under PCI-X Bridge { unsigned devfn; devfn = bus_dev->path.pci.devfn + (1 << 3); sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn); // index = ((dev->path.pci.devfn & ~7) >> 3) + 8; } else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && - (bus_dev->device == 0x0104)) // device under PCI Bridge( under PCI-X ) + (bus_dev->device == 0x0104)) // device under PCI Bridge(under PCI-X) { unsigned devfn; devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3); @@ -46,7 +46,7 @@ else { // same bus unsigned devfn; devfn = (dev->path.pci.devfn) & ~7; - if ( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) { + if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS) { if (dev->device == 0x0036) //PCI-X Bridge { devfn += (1<<3); } else if (dev->device == 0x0223) // USB diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c index 7235444..849f0a4 100644 --- a/src/southbridge/broadcom/bcm5785/early_setup.c +++ b/src/southbridge/broadcom/bcm5785/early_setup.c @@ -47,13 +47,13 @@ dword_old = pci_read_config32(dev, 0x4c); dword = dword_old | (1<<4); //enable Timer Func - if (dword != dword_old ) { + if (dword != dword_old) { pci_write_config32(dev, 0x4c, dword); } dword_old = pci_read_config32(dev, 0x6c); dword = dword_old | (1<<9); //unhide Timer Func in pci space - if (dword != dword_old ) { + if (dword != dword_old) { pci_write_config32(dev, 0x6c, dword); } @@ -149,7 +149,7 @@ // bit 1: enable upsteam messages // bit 0: enable shutdowm message to init generation dword = dword_old | (1<<5) | (1<<3) | (1<<2) | (1<<1) | (1<<0); // bit 1 and bit 4 must be set, otherwise interrupt msg will not be delivered to the processor - if (dword != dword_old ) { + if (dword != dword_old) { pci_write_config32(dev, 0x6c, dword); } } diff --git a/src/southbridge/broadcom/bcm5785/sata.c b/src/southbridge/broadcom/bcm5785/sata.c index 02331d9..57df3d2 100644 --- a/src/southbridge/broadcom/bcm5785/sata.c +++ b/src/southbridge/broadcom/bcm5785/sata.c @@ -42,13 +42,13 @@ write32(mmio_base + 0x10f0, 0x40000001); write32(mmio_base + 0x8c, 0x00ff2007); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x78592009); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x00082004); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x00002004); - mdelay( 10 ); + mdelay(10); //init PHY diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c index ab0cd05..c129434 100644 --- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c +++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c @@ -43,9 +43,9 @@ if (nmi_option) { byte &= ~(1 << 7); /* set NMI */ } else { - byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW + byte |= (1 << 7); // Can not mask NMI from PCI-E and NMI_NOW } - if ( byte != byte_old) { + if (byte != byte_old) { outb(byte, 0x70); } diff --git a/src/southbridge/broadcom/bcm5785/smbus.h b/src/southbridge/broadcom/bcm5785/smbus.h index 8ebe203..1c3c9d7 100644 --- a/src/southbridge/broadcom/bcm5785/smbus.h +++ b/src/southbridge/broadcom/bcm5785/smbus.h @@ -66,10 +66,10 @@ val = inb(smbus_io_base + SMBHSTSTAT); val &= 0x1f; // mask off reserved bits - if ( val & 0x1c) { + if (val & 0x1c) { return -5; // error } - if ( val == 0x02) { + if (val == 0x02) { outb(val, smbus_io_base + SMBHSTSTAT); // clear status return 0; // } -- To view, visit https://review.coreboot.org/25875 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic43b5ddaa395658ab7c34cdd004516884a20b005 Gerrit-Change-Number: 25875 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

1 0

Change in coreboot[master]: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2
by build bot (Jenkins) (Code Review) 26 Apr '18

26 Apr '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25757 ) Change subject: vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2 ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/70807/ : SUCCESS -- To view, visit https://review.coreboot.org/25757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc Gerrit-Change-Number: 25757 Gerrit-PatchSet: 6 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Thu, 26 Apr 2018 17:12:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2018