Martin Roth has uploaded this change for review. ( https://review.coreboot.org/25636
Change subject: src/mainboard/kahlee: Turn on keyboard backlight on grunt
......................................................................
src/mainboard/kahlee: Turn on keyboard backlight on grunt
Turn on keyboard backlight in romstage to indicate that the system is
booting.
BUG=b:77921345
TEST=Boot grunt, keyboard backlight comes on.
Change-Id: Ib215b19ebdee2f8c4f431af775905eca42436d1c
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
---
M src/mainboard/google/kahlee/romstage.c
M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/kahlee/variants/grunt/Makefile.inc
A src/mainboard/google/kahlee/variants/grunt/romstage.c
4 files changed, 40 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/25636/1
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c
index 8f234a3..206d53c 100644
--- a/src/mainboard/google/kahlee/romstage.c
+++ b/src/mainboard/google/kahlee/romstage.c
@@ -15,8 +15,19 @@
#include <amdblocks/dimm_spd.h>
#include <baseboard/variants.h>
+#include <soc/romstage.h>
int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len)
{
return variant_mainboard_read_spd(spdAddress, buf, len);
}
+
+void __attribute__((weak)) variant_romstage_entry(int s3_resume)
+{
+ /* By default, don't do anything */
+}
+
+void mainboard_romstage_entry (int s3_resume)
+{
+ variant_romstage_entry(s3_resume);
+}
diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
index e5a348a..bc35ff5 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h
@@ -31,5 +31,6 @@
int variant_get_ehci_oc_map(uint16_t *usb_oc_map);
const struct soc_amd_stoneyridge_gpio *variant_early_gpio_table(size_t *size);
const struct soc_amd_stoneyridge_gpio *variant_gpio_table(size_t *size);
+void variant_romstage_entry(int s3_resume);
#endif /* __BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/kahlee/variants/grunt/Makefile.inc b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc
index 7a4b994..3ef10b3 100644
--- a/src/mainboard/google/kahlee/variants/grunt/Makefile.inc
+++ b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc
@@ -15,4 +15,6 @@
subdirs-y += spd
+romstage-y += romstage.c
+
ramstage-y += mainboard.c
diff --git a/src/mainboard/google/kahlee/variants/grunt/romstage.c b/src/mainboard/google/kahlee/variants/grunt/romstage.c
new file mode 100644
index 0000000..3688d74
--- /dev/null
+++ b/src/mainboard/google/kahlee/variants/grunt/romstage.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Google, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/variants.h>
+#include <ec/google/chromeec/ec.h>
+
+void variant_romstage_entry(int s3_resume)
+{
+ uint32_t sku = google_chromeec_get_sku_id();
+
+ /* Based on SKU, turn on keyboard backlight to show system is booting */
+ if ((sku <= 6) && (!s3_resume))
+ google_chromeec_kbbacklight(75);
+}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib215b19ebdee2f8c4f431af775905eca42436d1c
Gerrit-Change-Number: 25636
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth(a)google.com>
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/25635
Change subject: soc/amd/stoneyridge: add a romstage hook for mainboards
......................................................................
soc/amd/stoneyridge: add a romstage hook for mainboards
There wasn't previously a way for Stoney platforms to run mainboard
specific code in romstage. This adds an early call for configuration
and passes along whether the system is currently resuming from S3.
BUG=b:77921345
TEST=Build, verify that weak function implementation gets called.
Change-Id: Id94855e1084814ec37956e603cd093d70f01a559
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
---
A src/soc/amd/stoneyridge/include/soc/romstage.h
M src/soc/amd/stoneyridge/romstage.c
2 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/25635/1
diff --git a/src/soc/amd/stoneyridge/include/soc/romstage.h b/src/soc/amd/stoneyridge/include/soc/romstage.h
new file mode 100644
index 0000000..af30fd9
--- /dev/null
+++ b/src/soc/amd/stoneyridge/include/soc/romstage.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Google, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __STONEYRIDGE_ROMSTAGE_H__
+#define __STONEYRIDGE_ROMSTAGE_H__
+
+void mainboard_romstage_entry(int s3_resume);
+
+#endif /* __STONEYRIDGE_ROMSTAGE_H__ */
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index cb24756..6c9726a 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -30,9 +30,15 @@
#include <amdblocks/agesawrapper.h>
#include <amdblocks/agesawrapper_call.h>
#include <soc/northbridge.h>
+#include <soc/romstage.h>
#include <soc/southbridge.h>
#include <amdblocks/psp.h>
+void __attribute__((weak)) mainboard_romstage_entry(int s3_resume)
+{
+ /* By default, don't do anything */
+}
+
asmlinkage void car_stage_entry(void)
{
struct postcar_frame pcf;
@@ -53,6 +59,8 @@
console_init();
+ mainboard_romstage_entry(s3_resume);
+
if (!s3_resume) {
post_code(0x40);
do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost");
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id94855e1084814ec37956e603cd093d70f01a559
Gerrit-Change-Number: 25635
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth(a)google.com>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25634
to look at the new patch set (#5).
Change subject: soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs
......................................................................
soc/intel/common: Implement EFI_MP_SERVICES_PPI structure APIs
This patch ensures to implement all required APIs for EFI_MP_SERVICES_PPI
as per EDK2 UefiPkg Open source specification
More details here:
https://github.com/tianocore/edk2/blob/master/MdePkg/Include/Ppi/MpServices…
Supported SOC will call fill mp_services structure so that FSP can install
the required PPI based on coreboot published structure.
BRANCH=none
BUG=b:74436746
TEST=Able to publish MP service PPI in coreboot.
Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/common/block/cpu/Kconfig
M src/soc/intel/common/block/cpu/Makefile.inc
A src/soc/intel/common/block/cpu/mp_service_ppi.c
A src/soc/intel/common/block/include/intelblocks/mp_service_ppi.h
4 files changed, 764 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/25634/5
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ie844e3f15f759ea09a8f3fd24825ee740151c956
Gerrit-Change-Number: 25634
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>