coreboot-gerrit February 2018

coreboot-gerrit@coreboot.org

1 participants
1573 discussions

Change in coreboot[master]: soc/intel/common/block/pcr: Add function for executing PCH SBI message
by build bot (Jenkins) (Code Review) 22 Feb '18

22 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23809 ) Change subject: soc/intel/common/block/pcr: Add function for executing PCH SBI message ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67787/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22286/ : SUCCESS -- To view, visit https://review.coreboot.org/23809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4e49311564e20cedbfabaaceaf5f72c480e5ea26 Gerrit-Change-Number: 23809 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kin Wai Ng <kin.wai.ng(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Teo Boon Tiong <boon.tiong.teo(a)intel.com> Gerrit-Reviewer: Tung Lun Loo <tung.lun.loo(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Thu, 22 Feb 2018 04:27:14 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: soc/intel/cannonlake: Add emmc/sdc port id
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23789 ) Change subject: soc/intel/cannonlake: Add emmc/sdc port id ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67784/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22283/ : SUCCESS -- To view, visit https://review.coreboot.org/23789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I901e90c47b08bb013fcfee5def610e320a7ac19a Gerrit-Change-Number: 23789 Gerrit-PatchSet: 3 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Feb 2018 02:54:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: soc/intel/cannonlake: Add emmc/sdc port id
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23789 ) Change subject: soc/intel/cannonlake: Add emmc/sdc port id ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67778/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22277/ : SUCCESS -- To view, visit https://review.coreboot.org/23789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I901e90c47b08bb013fcfee5def610e320a7ac19a Gerrit-Change-Number: 23789 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Feb 2018 00:20:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/google/octopus: Add LPDDR4 memory init
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23832 ) Change subject: mb/google/octopus: Add LPDDR4 memory init ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67782/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22281/ : SUCCESS -- To view, visit https://review.coreboot.org/23832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ieffcfa2f9d075eb0be13562f1a0c7ee503b005d9 Gerrit-Change-Number: 23832 Gerrit-PatchSet: 4 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Feb 2018 00:16:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mainboard/google/zoombini/variants/meowth: enable 4 cores
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23839 ) Change subject: mainboard/google/zoombini/variants/meowth: enable 4 cores ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67780/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22279/ : SUCCESS -- To view, visit https://review.coreboot.org/23839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia233e41acd19b317f82433a5d41d84ea934a66c4 Gerrit-Change-Number: 23839 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Feb 2018 00:08:08 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/google/octopus: Add LPDDR4 memory init
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23832 ) Change subject: mb/google/octopus: Add LPDDR4 memory init ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67771/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22270/ : SUCCESS -- To view, visit https://review.coreboot.org/23832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ieffcfa2f9d075eb0be13562f1a0c7ee503b005d9 Gerrit-Change-Number: 23832 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Feb 2018 23:13:15 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mainboard/google/kahlee: Add tis_plat_irq_status
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23626 ) Change subject: mainboard/google/kahlee: Add tis_plat_irq_status ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67773/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22272/ : SUCCESS -- To view, visit https://review.coreboot.org/23626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5786d334b6c1cc70f4c7107c75b07a7e27ac4428 Gerrit-Change-Number: 23626 Gerrit-PatchSet: 7 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Chris Ching (using chromium account) <chingcodes+old(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Feb 2018 23:02:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Add functions for GPIO interrupts
by build bot (Jenkins) (Code Review) 21 Feb '18

21 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23624 ) Change subject: soc/amd/stoneyridge: Add functions for GPIO interrupts ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67772/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/22271/ : SUCCESS -- To view, visit https://review.coreboot.org/23624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1addd3abcb6a57d916b1c93480bacb0450abddf2 Gerrit-Change-Number: 23624 Gerrit-PatchSet: 7 Gerrit-Owner: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Chris Ching (using chromium account) <chingcodes+old(a)google.com> Gerrit-Reviewer: Chris Ching <chingcodes(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 21 Feb 2018 23:02:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mb/google/octopus: Add LPDDR4 memory init
by Ravishankar Sarawadi (Code Review) 21 Feb '18

21 Feb '18

Hello Srinidhi N Kaushik, Hannah Williams, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/23832 to look at the new patch set (#3). Change subject: mb/google/octopus: Add LPDDR4 memory init ...................................................................... mb/google/octopus: Add LPDDR4 memory init Add LPDDR4 initialization support. BUG=b:73136980 BRANCH=None TEST=Build coreboot for Octopus board. Change-Id: Ieffcfa2f9d075eb0be13562f1a0c7ee503b005d9 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/mainboard/google/octopus/romstage.c M src/mainboard/google/octopus/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/octopus/variants/baseboard/memory.c 3 files changed, 73 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/23832/3 -- To view, visit https://review.coreboot.org/23832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ieffcfa2f9d075eb0be13562f1a0c7ee503b005d9 Gerrit-Change-Number: 23832 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>

1 0

Change in coreboot[master]: Revert "UPSTREAM: soc/intel/cannonlake: Add support for C state and P...
by Nick Vaccaro (Code Review) 21 Feb '18

21 Feb '18

Nick Vaccaro has abandoned this change. ( https://review.coreboot.org/23838 ) Change subject: Revert "UPSTREAM: soc/intel/cannonlake: Add support for C state and P state" ...................................................................... Abandoned Not going to use c state disabling approach -- To view, visit https://review.coreboot.org/23838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Icde3a177020aab303a61b40d138ea03f204895b4 Gerrit-Change-Number: 23838 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2018