Change in coreboot[master]: src: Remove unneeded include <arch/io.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29307
to look at the new patch set (#3).
Change subject: src: Remove unneeded include <arch/io.h>
......................................................................
src: Remove unneeded include <arch/io.h>
Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/arm/armv7/mmu.c
M src/arch/x86/cpu.c
M src/console/die.c
M src/cpu/amd/family_10h-family_15h/ram_calc.c
M src/cpu/amd/geode_lx/cpubug.c
M src/cpu/amd/smm/smm_init.c
M src/cpu/intel/haswell/romstage.c
M src/cpu/x86/lapic/apic_timer.c
M src/device/device.c
M src/device/oprom/realmode/x86_interrupts.c
M src/device/pci_device.c
M src/device/pci_early.c
M src/drivers/elog/gsmi.c
M src/drivers/emulation/qemu/cirrus.c
M src/drivers/i2c/at24rf08c/at24rf08c.c
M src/drivers/i2c/at24rf08c/lenovo_serials.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
M src/drivers/intel/gma/intel_ddi.c
M src/drivers/intel/gma/vbt.c
M src/drivers/maxim/max77686/max77686.c
M src/drivers/ricoh/rce822/rce822.c
M src/drivers/sil/3114/sil_sata.c
M src/drivers/uart/oxpcie_early.c
M src/drivers/xgi/common/xgi_coreboot.c
M src/drivers/xgi/common/xgi_coreboot.h
M src/drivers/xgi/z9s/z9s.c
M src/ec/google/chromeec/crosec_proto.c
M src/ec/google/chromeec/ec.c
M src/ec/google/chromeec/ec_i2c.c
M src/ec/lenovo/h8/h8.c
M src/include/device/azalia_device.h
M src/include/device/device.h
M src/include/device/pci_ehci.h
M src/include/reg_script.h
M src/lib/edid.c
M src/mainboard/advansus/a785e-i/mainboard.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bettong/mptable.c
M src/mainboard/amd/bimini_fam10/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mptable.c
M src/mainboard/amd/gardenia/mptable.c
M src/mainboard/amd/lamar/mainboard.c
M src/mainboard/amd/lamar/mptable.c
M src/mainboard/amd/mahogany_fam10/mainboard.c
M src/mainboard/amd/mahogany_fam10/mptable.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/olivehillplus/mainboard.c
M src/mainboard/amd/parmer/romstage.c
M src/mainboard/amd/persimmon/mptable.c
M src/mainboard/amd/tilapia_fam10/mainboard.c
M src/mainboard/amd/tilapia_fam10/mptable.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/amd/torpedo/acpi_tables.c
M src/mainboard/aopen/dxplplusu/romstage.c
M src/mainboard/apple/macbook21/smihandler.c
M src/mainboard/apple/macbookair4_2/early_southbridge.c
M src/mainboard/asus/am1i-a/mptable.c
M src/mainboard/asus/kcma-d8/bootblock.c
M src/mainboard/asus/kcma-d8/mptable.c
M src/mainboard/asus/kfsn4-dre/acpi_tables.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/bootblock.c
M src/mainboard/asus/kgpe-d16/mptable.c
M src/mainboard/asus/m4a78-em/mainboard.c
M src/mainboard/asus/m4a78-em/mptable.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/mainboard.c
M src/mainboard/asus/m4a785-m/mptable.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/mainboard.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/asus/maximus_iv_gene-z/romstage.c
M src/mainboard/asus/p5qc/romstage.c
M src/mainboard/asus/p8h61-m_lx/romstage.c
M src/mainboard/avalue/eax-785e/mainboard.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/bap/ode_e20XX/mptable.c
M src/mainboard/bap/ode_e21XX/mainboard.c
M src/mainboard/biostar/am1ml/mptable.c
M src/mainboard/elmex/pcm205400/mptable.c
M src/mainboard/emulation/qemu-i440fx/mainboard.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-power8/uart.c
M src/mainboard/emulation/qemu-q35/bootblock.c
M src/mainboard/emulation/qemu-q35/mainboard.c
M src/mainboard/emulation/qemu-q35/romstage.c
M src/mainboard/emulation/qemu-riscv/uart.c
M src/mainboard/emulation/spike-riscv/uart.c
M src/mainboard/getac/p470/mainboard.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
M src/mainboard/gigabyte/ma785gm/mainboard.c
M src/mainboard/gigabyte/ma785gm/mptable.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/mainboard.c
M src/mainboard/gigabyte/ma785gmt/mptable.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/mainboard.c
M src/mainboard/gigabyte/ma78gm/mptable.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/gizmosphere/gizmo2/mptable.c
M src/mainboard/google/auron/variant.h
M src/mainboard/google/beltino/chromeos.c
M src/mainboard/google/beltino/smihandler.c
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/butterfly/mainboard_smi.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/eve/smihandler.c
M src/mainboard/google/foster/mainboard.c
M src/mainboard/google/foster/reset.c
M src/mainboard/google/glados/smihandler.c
M src/mainboard/google/gru/sdram_configs.c
M src/mainboard/google/jecht/chromeos.c
M src/mainboard/google/jecht/smihandler.c
M src/mainboard/google/kahlee/mptable.c
M src/mainboard/google/link/mainboard_smi.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/oak/bootblock.c
M src/mainboard/google/oak/mainboard.c
M src/mainboard/google/octopus/ec.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/parrot/ec.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/parrot/smihandler.c
M src/mainboard/google/rambi/mainboard.c
M src/mainboard/google/smaug/reset.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/stout/ec.c
M src/mainboard/google/stout/mainboard.c
M src/mainboard/google/stout/mainboard_smi.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/google/urara/mainboard.c
M src/mainboard/google/veyron/sdram_configs.c
M src/mainboard/google/veyron_mickey/sdram_configs.c
M src/mainboard/google/veyron_rialto/sdram_configs.c
M src/mainboard/hp/2570p/romstage.c
M src/mainboard/hp/2760p/romstage.c
M src/mainboard/hp/8460p/romstage.c
M src/mainboard/hp/8470p/romstage.c
M src/mainboard/hp/8770w/romstage.c
M src/mainboard/hp/compaq_8200_elite_sff/romstage.c
M src/mainboard/hp/folio_9470m/romstage.c
M src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
M src/mainboard/hp/revolve_810_g1/romstage.c
M src/mainboard/iei/kino-780am2-fam10/mainboard.c
M src/mainboard/iei/kino-780am2-fam10/mptable.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/mainboard.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/camelbackmountain_fsp/mainboard.c
M src/mainboard/intel/cannonlake_rvp/smihandler.c
M src/mainboard/intel/d945gclf/romstage.c
M src/mainboard/intel/dg43gt/romstage.c
M src/mainboard/intel/emeraldlake2/mainboard.c
M src/mainboard/intel/galileo/gpio.c
M src/mainboard/intel/galileo/reg_access.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/kblrvp/smihandler.c
M src/mainboard/intel/kunimitsu/smihandler.c
M src/mainboard/intel/stargo2/mainboard_smi.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/intel/wtm2/chromeos.c
M src/mainboard/jetway/nf81-t56n-lf/mptable.c
M src/mainboard/jetway/pa78vm5/mainboard.c
M src/mainboard/jetway/pa78vm5/mptable.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/kontron/ktqm77/mainboard.c
M src/mainboard/lenovo/l520/romstage.c
M src/mainboard/lenovo/s230u/mainboard.c
M src/mainboard/lenovo/s230u/romstage.c
M src/mainboard/lenovo/s230u/smihandler.c
M src/mainboard/lenovo/t400/acpi_tables.c
M src/mainboard/lenovo/t420/romstage.c
M src/mainboard/lenovo/t420s/romstage.c
M src/mainboard/lenovo/t430/romstage.c
M src/mainboard/lenovo/t430s/romstage.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t530/romstage.c
M src/mainboard/lenovo/x131e/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x200/acpi_tables.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/irq_tables.c
M src/mainboard/pcengines/apu1/mptable.c
M src/mainboard/roda/rk9/acpi_tables.c
M src/mainboard/roda/rk9/smihandler.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/mainboard/samsung/lumpy/smihandler.c
M src/mainboard/samsung/stumpy/chromeos.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/samsung/stumpy/smihandler.c
M src/mainboard/sapphire/pureplatinumh61/romstage.c
M src/mainboard/siemens/mc_tcu3/mainboard.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/sifive/hifive-unleashed/mainboard.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/mainboard.c
M src/mainboard/supermicro/h8scm_fam10/mptable.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/agesa/family12/northbridge.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/amdfam10/amdfam10.h
M src/northbridge/amd/amdfam10/amdfam10_util.c
M src/northbridge/amd/amdfam10/early_ht.c
M src/northbridge/amd/amdfam10/ht_config.c
M src/northbridge/amd/amdfam10/northbridge.c
M src/northbridge/amd/amdfam10/pci.h
M src/northbridge/amd/amdfam10/raminit_amdmct.c
M src/northbridge/amd/amdk8/reset_test.c
M src/northbridge/amd/lx/grphinit.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/amd/pi/ramtop.c
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/fsp_rangeley/acpi.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_rangeley/port_access.c
M src/northbridge/intel/fsp_rangeley/raminit.c
M src/northbridge/intel/fsp_sandybridge/bootblock.c
M src/northbridge/intel/fsp_sandybridge/finalize.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/fsp_sandybridge/ram_calc.c
M src/northbridge/intel/fsp_sandybridge/raminit.c
M src/northbridge/intel/fsp_sandybridge/report_platform.c
M src/northbridge/intel/gm45/bootblock.c
M src/northbridge/intel/gm45/early_init.c
M src/northbridge/intel/gm45/igd.c
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/gm45/pcie.c
M src/northbridge/intel/gm45/pm.c
M src/northbridge/intel/gm45/ram_calc.c
M src/northbridge/intel/gm45/thermal.c
M src/northbridge/intel/haswell/bootblock.c
M src/northbridge/intel/haswell/finalize.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/haswell/ram_calc.c
M src/northbridge/intel/haswell/report_platform.c
M src/northbridge/intel/i440bx/debug.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i440bx/ram_calc.c
M src/northbridge/intel/i945/bootblock.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/i945/ram_calc.c
M src/northbridge/intel/nehalem/bootblock.c
M src/northbridge/intel/nehalem/finalize.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/nehalem/ram_calc.c
M src/northbridge/intel/pineview/bootblock.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/pineview/ram_calc.c
M src/northbridge/intel/sandybridge/bootblock.c
M src/northbridge/intel/sandybridge/finalize.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/sandybridge/ram_calc.c
M src/northbridge/intel/sandybridge/raminit_ivy.c
M src/northbridge/intel/x4x/bootblock.c
M src/northbridge/intel/x4x/gma.c
M src/northbridge/intel/x4x/northbridge.c
M src/northbridge/intel/x4x/ram_calc.c
M src/northbridge/intel/x4x/raminit_tables.c
M src/northbridge/via/vx900/bootblock.c
M src/northbridge/via/vx900/chrome9hd.c
M src/northbridge/via/vx900/early_vx900.c
M src/northbridge/via/vx900/lpc.c
M src/northbridge/via/vx900/pcie.c
M src/northbridge/via/vx900/vx900.h
M src/soc/amd/common/block/acpi/halt.c
M src/soc/amd/stoneyridge/hda.c
M src/soc/amd/stoneyridge/include/soc/northbridge.h
M src/soc/amd/stoneyridge/include/soc/pci_devs.h
M src/soc/amd/stoneyridge/include/soc/smi.h
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/amd/stoneyridge/sata.c
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/tsc_freq.c
M src/soc/cavium/cn81xx/bootblock.c
M src/soc/cavium/common/bdk-coreboot.c
M src/soc/imgtec/pistachio/include/soc/spi.h
M src/soc/intel/apollolake/include/soc/pci_devs.h
M src/soc/intel/apollolake/memmap.c
M src/soc/intel/apollolake/romstage.c
M src/soc/intel/apollolake/smihandler.c
M src/soc/intel/baytrail/bootblock/bootblock.c
M src/soc/intel/baytrail/dptf.c
M src/soc/intel/baytrail/elog.c
M src/soc/intel/baytrail/emmc.c
M src/soc/intel/baytrail/hda.c
M src/soc/intel/baytrail/lpss.c
M src/soc/intel/baytrail/memmap.c
M src/soc/intel/baytrail/perf_power.c
M src/soc/intel/baytrail/romstage/early_spi.c
M src/soc/intel/baytrail/romstage/gfx.c
M src/soc/intel/baytrail/romstage/uart.c
M src/soc/intel/baytrail/sd.c
M src/soc/intel/braswell/bootblock/bootblock.c
M src/soc/intel/braswell/elog.c
M src/soc/intel/braswell/emmc.c
M src/soc/intel/braswell/gfx.c
M src/soc/intel/braswell/hda.c
M src/soc/intel/braswell/include/soc/gpio.h
M src/soc/intel/braswell/lpss.c
M src/soc/intel/braswell/memmap.c
M src/soc/intel/braswell/romstage/early_spi.c
M src/soc/intel/braswell/sata.c
M src/soc/intel/braswell/sd.c
M src/soc/intel/broadwell/acpi.c
M src/soc/intel/broadwell/bootblock/pch.c
M src/soc/intel/broadwell/bootblock/systemagent.c
M src/soc/intel/broadwell/ehci.c
M src/soc/intel/broadwell/include/soc/pci_devs.h
M src/soc/intel/broadwell/iobp.c
M src/soc/intel/broadwell/me_status.c
M src/soc/intel/broadwell/memmap.c
M src/soc/intel/broadwell/pch.c
M src/soc/intel/broadwell/romstage/pch.c
M src/soc/intel/broadwell/romstage/raminit.c
M src/soc/intel/broadwell/romstage/report_platform.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/romstage/smbus.c
M src/soc/intel/broadwell/romstage/spi.c
M src/soc/intel/broadwell/romstage/uart.c
M src/soc/intel/broadwell/systemagent.c
M src/soc/intel/broadwell/usb_debug.c
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/cannonlake/include/soc/pci_devs.h
M src/soc/intel/cannonlake/include/soc/pm.h
M src/soc/intel/cannonlake/memmap.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/include/intelblocks/smihandler.h
M src/soc/intel/common/block/include/intelblocks/uart.h
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/xdci/xdci.c
M src/soc/intel/common/block/xhci/xhci.c
M src/soc/intel/common/pch/lockdown/lockdown.c
M src/soc/intel/denverton_ns/include/soc/pci_devs.h
M src/soc/intel/denverton_ns/include/soc/pm.h
M src/soc/intel/denverton_ns/memmap.c
M src/soc/intel/denverton_ns/npk.c
M src/soc/intel/denverton_ns/xhci.c
M src/soc/intel/fsp_baytrail/gfx.c
M src/soc/intel/fsp_baytrail/include/soc/i2c.h
M src/soc/intel/fsp_baytrail/lpss.c
M src/soc/intel/fsp_baytrail/memmap.c
M src/soc/intel/fsp_baytrail/romstage/report_platform.c
M src/soc/intel/fsp_baytrail/romstage/uart.c
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/smihandler.c
M src/soc/intel/fsp_broadwell_de/smmrelocate.c
M src/soc/intel/icelake/bootblock/report_platform.c
M src/soc/intel/icelake/include/soc/pci_devs.h
M src/soc/intel/icelake/include/soc/pm.h
M src/soc/intel/icelake/memmap.c
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/quark/include/soc/reg_access.h
M src/soc/intel/quark/sd.c
M src/soc/intel/quark/spi_debug.c
M src/soc/intel/quark/storage_test.c
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/bootblock/report_platform.c
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/elog.c
M src/soc/intel/skylake/include/soc/pci_devs.h
M src/soc/intel/skylake/me.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
M src/soc/intel/skylake/systemagent.c
M src/soc/intel/skylake/vr_config.c
M src/soc/mediatek/mt8173/memory.c
M src/soc/mediatek/mt8173/mt6391.c
M src/soc/mediatek/mt8183/gpio.c
M src/soc/nvidia/tegra124/dp.c
M src/soc/nvidia/tegra124/include/soc/clock.h
M src/soc/nvidia/tegra124/soc.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/dp.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/mipi_dsi.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/qualcomm/ipq40xx/i2c.c
M src/soc/qualcomm/ipq806x/i2c.c
M src/soc/rockchip/common/include/soc/soc.h
M src/soc/rockchip/rk3288/bootblock.c
M src/soc/rockchip/rk3288/gpio.c
M src/soc/rockchip/rk3399/decompressor.c
M src/soc/rockchip/rk3399/gpio.c
M src/soc/samsung/exynos5250/include/soc/cpu.h
M src/soc/samsung/exynos5420/dp.c
M src/soc/samsung/exynos5420/include/soc/cpu.h
M src/southbridge/amd/agesa/hudson/bootblock.c
M src/southbridge/amd/agesa/hudson/hda.c
M src/southbridge/amd/agesa/hudson/lpc.c
M src/southbridge/amd/agesa/hudson/reset.c
M src/southbridge/amd/agesa/hudson/sata.c
M src/southbridge/amd/agesa/hudson/sd.c
M src/southbridge/amd/agesa/hudson/sm.c
M src/southbridge/amd/agesa/hudson/usb.c
M src/southbridge/amd/amd8111/bootblock.c
M src/southbridge/amd/amd8111/early_ctrl.c
M src/southbridge/amd/amd8111/reset.c
M src/southbridge/amd/amd8111/smbus.c
M src/southbridge/amd/amd8111/usb.c
M src/southbridge/amd/cimx/sb800/cfg.c
M src/southbridge/amd/cimx/sb800/early.c
M src/southbridge/amd/cimx/sb800/lpc.c
M src/southbridge/amd/cimx/sb800/reset.c
M src/southbridge/amd/cimx/sb900/bootblock.c
M src/southbridge/amd/cimx/sb900/reset.c
M src/southbridge/amd/pi/hudson/bootblock.c
M src/southbridge/amd/pi/hudson/hda.c
M src/southbridge/amd/pi/hudson/reset.c
M src/southbridge/amd/pi/hudson/sata.c
M src/southbridge/amd/pi/hudson/sd.c
M src/southbridge/amd/pi/hudson/sm.c
M src/southbridge/amd/pi/hudson/usb.c
M src/southbridge/amd/rs780/cmn.c
M src/southbridge/amd/rs780/early_setup.c
M src/southbridge/amd/sb700/bootblock.c
M src/southbridge/amd/sb700/fadt.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/amd/sb700/smbus.h
M src/southbridge/amd/sb800/bootblock.c
M src/southbridge/amd/sb800/fadt.c
M src/southbridge/amd/sb800/lpc.c
M src/southbridge/amd/sr5650/cmn.h
M src/southbridge/broadcom/bcm5785/bootblock.c
M src/southbridge/broadcom/bcm5785/lpc.c
M src/southbridge/intel/bd82x6x/bootblock.c
M src/southbridge/intel/bd82x6x/early_spi.c
M src/southbridge/intel/bd82x6x/early_usb_mrc.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
M src/southbridge/intel/bd82x6x/watchdog.c
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/pmutil.c
M src/southbridge/intel/common/usb_debug.c
M src/southbridge/intel/fsp_bd82x6x/bootblock.c
M src/southbridge/intel/fsp_bd82x6x/early_spi.c
M src/southbridge/intel/fsp_bd82x6x/early_usb.c
M src/southbridge/intel/fsp_i89xx/bootblock.c
M src/southbridge/intel/fsp_i89xx/early_spi.c
M src/southbridge/intel/fsp_i89xx/early_usb.c
M src/southbridge/intel/fsp_rangeley/early_spi.c
M src/southbridge/intel/fsp_rangeley/early_usb.c
M src/southbridge/intel/fsp_rangeley/smbus.c
M src/southbridge/intel/i82371eb/bootblock.c
M src/southbridge/intel/i82371eb/early_pm.c
M src/southbridge/intel/i82371eb/i82371eb.h
M src/southbridge/intel/i82801dx/bootblock.c
M src/southbridge/intel/i82801gx/bootblock.c
M src/southbridge/intel/i82801gx/smbus.c
M src/southbridge/intel/i82801ix/bootblock.c
M src/southbridge/intel/i82801ix/dmi_setup.c
M src/southbridge/intel/i82801ix/smbus.c
M src/southbridge/intel/i82801ix/smihandler.c
M src/southbridge/intel/i82801jx/bootblock.c
M src/southbridge/intel/i82801jx/smbus.c
M src/southbridge/intel/i82870/pci_parity.c
M src/southbridge/intel/ibexpeak/madt.c
M src/southbridge/intel/lynxpoint/bootblock.c
M src/southbridge/intel/lynxpoint/early_spi.c
M src/southbridge/intel/lynxpoint/early_usb.c
M src/southbridge/intel/lynxpoint/pch.c
M src/southbridge/intel/lynxpoint/rcba.c
M src/southbridge/nvidia/ck804/bootblock.c
M src/southbridge/nvidia/ck804/ck804.c
M src/southbridge/nvidia/ck804/enable_usbdebug.c
M src/southbridge/nvidia/ck804/smbus.c
M src/southbridge/nvidia/mcp55/bootblock.c
M src/southbridge/nvidia/mcp55/enable_usbdebug.c
M src/southbridge/nvidia/mcp55/fadt.c
M src/southbridge/nvidia/mcp55/mcp55.c
M src/southbridge/nvidia/mcp55/smbus.c
M src/southbridge/ricoh/rl5c476/rl5c476.c
M src/southbridge/ti/pci1x2x/pci1x2x.c
M src/southbridge/ti/pci7420/cardbus.c
M src/southbridge/ti/pci7420/firewire.c
M src/southbridge/ti/pcixx12/pcixx12.c
M src/southbridge/via/common/early_smbus_delay.c
M src/southbridge/via/common/early_smbus_is_busy.c
M src/southbridge/via/common/early_smbus_reset.c
M src/southbridge/via/common/early_smbus_wait_until_ready.c
M src/southbridge/via/common/via_early_smbus.h
M src/superio/fintek/common/fintek.h
M src/superio/fintek/f71805f/superio.c
M src/superio/fintek/f71808a/f71808a_hwm.c
M src/superio/fintek/f71808a/f71808a_multifunc.c
M src/superio/fintek/f71808a/fintek_internal.h
M src/superio/fintek/f71808a/superio.c
M src/superio/fintek/f71859/superio.c
M src/superio/fintek/f71863fg/superio.c
M src/superio/fintek/f71869ad/f71869ad_hwm.c
M src/superio/fintek/f71869ad/f71869ad_multifunc.c
M src/superio/fintek/f71869ad/fintek_internal.h
M src/superio/fintek/f71869ad/superio.c
M src/superio/fintek/f71872/superio.c
M src/superio/fintek/f81865f/superio.c
M src/superio/fintek/f81866d/f81866d_hwm.c
M src/superio/fintek/f81866d/f81866d_uart.c
M src/superio/fintek/f81866d/fintek_internal.h
M src/superio/fintek/f81866d/superio.c
M src/superio/ite/common/ite.h
M src/superio/ite/it8623e/superio.c
M src/superio/ite/it8671f/it8671f.h
M src/superio/ite/it8712f/superio.c
M src/superio/ite/it8716f/superio.c
M src/superio/ite/it8718f/early_serial.c
M src/superio/ite/it8718f/it8718f.h
M src/superio/ite/it8728f/superio.c
M src/superio/ite/it8783ef/it8783ef.h
M src/superio/nsc/pc87309/early_serial.c
M src/superio/nsc/pc87309/pc87309.h
M src/superio/nsc/pc87309/superio.c
M src/superio/nsc/pc87360/early_serial.c
M src/superio/nsc/pc87360/pc87360.h
M src/superio/nsc/pc87360/superio.c
M src/superio/nsc/pc87366/early_serial.c
M src/superio/nsc/pc87366/pc87366.h
M src/superio/nsc/pc87366/superio.c
M src/superio/nsc/pc87382/superio.c
M src/superio/nsc/pc87384/superio.c
M src/superio/nsc/pc87392/early_serial.c
M src/superio/nsc/pc87392/superio.c
M src/superio/nsc/pc87417/early_serial.c
M src/superio/nsc/pc87417/pc87417.h
M src/superio/nsc/pc87417/superio.c
M src/superio/nsc/pc97317/pc97317.h
M src/superio/nsc/pc97317/superio.c
M src/superio/nuvoton/common/nuvoton.h
M src/superio/nuvoton/nct5104d/superio.c
M src/superio/nuvoton/nct5572d/superio.c
M src/superio/nuvoton/nct6776/superio.c
M src/superio/nuvoton/nct6779d/superio.c
M src/superio/nuvoton/nct6791d/superio.c
M src/superio/nuvoton/wpcm450/superio.c
M src/superio/renesas/m3885x/superio.c
M src/superio/serverengines/pilot/early_init.c
M src/superio/smsc/dme1737/dme1737.h
M src/superio/smsc/dme1737/superio.c
M src/superio/smsc/kbc1100/kbc1100.h
M src/superio/smsc/kbc1100/superio.c
M src/superio/smsc/lpc47b272/lpc47b272.h
M src/superio/smsc/lpc47b272/superio.c
M src/superio/smsc/lpc47b397/lpc47b397.h
M src/superio/smsc/lpc47b397/superio.c
M src/superio/smsc/lpc47m10x/lpc47m10x.h
M src/superio/smsc/lpc47m10x/superio.c
M src/superio/smsc/lpc47m15x/lpc47m15x.h
M src/superio/smsc/lpc47m15x/superio.c
M src/superio/smsc/lpc47n207/lpc47n207.h
M src/superio/smsc/lpc47n217/lpc47n217.h
M src/superio/smsc/lpc47n227/superio.c
M src/superio/smsc/mec1308/superio.c
M src/superio/smsc/sch4037/superio.c
M src/superio/smsc/sio1036/sio1036.h
M src/superio/smsc/sio1036/superio.c
M src/superio/smsc/smscsuperio/smscsuperio.h
M src/superio/smsc/smscsuperio/superio.c
M src/superio/winbond/common/winbond.h
M src/superio/winbond/w83627dhg/superio.c
M src/superio/winbond/w83627dhg/w83627dhg.h
M src/superio/winbond/w83627ehg/superio.c
M src/superio/winbond/w83627hf/superio.c
M src/superio/winbond/w83627thg/superio.c
M src/superio/winbond/w83627thg/w83627thg.h
M src/superio/winbond/w83627uhg/superio.c
M src/superio/winbond/w83667hg-a/superio.c
M src/superio/winbond/w83977tf/superio.c
M src/superio/winbond/wpcd376i/early_serial.c
M src/superio/winbond/wpcd376i/superio.c
M src/superio/winbond/wpcd376i/wpcd376i.h
596 files changed, 8 insertions(+), 588 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/29307/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Gerrit-Change-Number: 29307
Gerrit-PatchSet: 3
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include <arch/io.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29307
to look at the new patch set (#2).
Change subject: src: Remove unneeded include <arch/io.h>
......................................................................
src: Remove unneeded include <arch/io.h>
Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/arm/armv7/mmu.c
M src/arch/x86/cpu.c
M src/console/die.c
M src/cpu/amd/family_10h-family_15h/ram_calc.c
M src/cpu/amd/geode_lx/cpubug.c
M src/cpu/amd/smm/smm_init.c
M src/cpu/intel/haswell/romstage.c
M src/cpu/x86/lapic/apic_timer.c
M src/device/device.c
M src/device/oprom/realmode/x86_interrupts.c
M src/device/pci_device.c
M src/device/pci_early.c
M src/drivers/elog/gsmi.c
M src/drivers/emulation/qemu/cirrus.c
M src/drivers/i2c/at24rf08c/at24rf08c.c
M src/drivers/i2c/at24rf08c/lenovo_serials.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
M src/drivers/intel/gma/intel_ddi.c
M src/drivers/intel/gma/vbt.c
M src/drivers/maxim/max77686/max77686.c
M src/drivers/ricoh/rce822/rce822.c
M src/drivers/sil/3114/sil_sata.c
M src/drivers/uart/oxpcie_early.c
M src/drivers/xgi/common/xgi_coreboot.c
M src/drivers/xgi/common/xgi_coreboot.h
M src/drivers/xgi/z9s/z9s.c
M src/ec/google/chromeec/crosec_proto.c
M src/ec/google/chromeec/ec.c
M src/ec/google/chromeec/ec_i2c.c
M src/ec/lenovo/h8/h8.c
M src/include/device/azalia_device.h
M src/include/device/device.h
M src/include/device/pci_ehci.h
M src/include/reg_script.h
M src/lib/edid.c
M src/mainboard/advansus/a785e-i/mainboard.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bettong/mptable.c
M src/mainboard/amd/bimini_fam10/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mptable.c
M src/mainboard/amd/gardenia/mptable.c
M src/mainboard/amd/lamar/mainboard.c
M src/mainboard/amd/lamar/mptable.c
M src/mainboard/amd/mahogany_fam10/mainboard.c
M src/mainboard/amd/mahogany_fam10/mptable.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/olivehillplus/mainboard.c
M src/mainboard/amd/parmer/romstage.c
M src/mainboard/amd/persimmon/mptable.c
M src/mainboard/amd/tilapia_fam10/mainboard.c
M src/mainboard/amd/tilapia_fam10/mptable.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/amd/torpedo/acpi_tables.c
M src/mainboard/aopen/dxplplusu/romstage.c
M src/mainboard/apple/macbook21/smihandler.c
M src/mainboard/apple/macbookair4_2/early_southbridge.c
M src/mainboard/asus/am1i-a/mptable.c
M src/mainboard/asus/kcma-d8/bootblock.c
M src/mainboard/asus/kcma-d8/mptable.c
M src/mainboard/asus/kfsn4-dre/acpi_tables.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/bootblock.c
M src/mainboard/asus/kgpe-d16/mptable.c
M src/mainboard/asus/m4a78-em/mainboard.c
M src/mainboard/asus/m4a78-em/mptable.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/mainboard.c
M src/mainboard/asus/m4a785-m/mptable.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/mainboard.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/asus/maximus_iv_gene-z/romstage.c
M src/mainboard/asus/p5qc/romstage.c
M src/mainboard/asus/p8h61-m_lx/romstage.c
M src/mainboard/avalue/eax-785e/mainboard.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/bap/ode_e20XX/mptable.c
M src/mainboard/bap/ode_e21XX/mainboard.c
M src/mainboard/biostar/am1ml/mptable.c
M src/mainboard/elmex/pcm205400/mptable.c
M src/mainboard/emulation/qemu-i440fx/mainboard.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-power8/uart.c
M src/mainboard/emulation/qemu-q35/bootblock.c
M src/mainboard/emulation/qemu-q35/mainboard.c
M src/mainboard/emulation/qemu-q35/romstage.c
M src/mainboard/emulation/qemu-riscv/uart.c
M src/mainboard/emulation/spike-riscv/uart.c
M src/mainboard/getac/p470/mainboard.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
M src/mainboard/gigabyte/ma785gm/mainboard.c
M src/mainboard/gigabyte/ma785gm/mptable.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/mainboard.c
M src/mainboard/gigabyte/ma785gmt/mptable.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/mainboard.c
M src/mainboard/gigabyte/ma78gm/mptable.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/gizmosphere/gizmo2/mptable.c
M src/mainboard/google/auron/variant.h
M src/mainboard/google/beltino/chromeos.c
M src/mainboard/google/beltino/smihandler.c
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/butterfly/mainboard_smi.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/eve/smihandler.c
M src/mainboard/google/foster/mainboard.c
M src/mainboard/google/foster/reset.c
M src/mainboard/google/glados/smihandler.c
M src/mainboard/google/gru/sdram_configs.c
M src/mainboard/google/jecht/chromeos.c
M src/mainboard/google/jecht/smihandler.c
M src/mainboard/google/kahlee/mptable.c
M src/mainboard/google/link/mainboard_smi.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/oak/bootblock.c
M src/mainboard/google/oak/mainboard.c
M src/mainboard/google/octopus/ec.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/parrot/ec.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/parrot/smihandler.c
M src/mainboard/google/rambi/mainboard.c
M src/mainboard/google/smaug/reset.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/stout/ec.c
M src/mainboard/google/stout/mainboard.c
M src/mainboard/google/stout/mainboard_smi.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/google/urara/mainboard.c
M src/mainboard/google/veyron/sdram_configs.c
M src/mainboard/google/veyron_mickey/sdram_configs.c
M src/mainboard/google/veyron_rialto/sdram_configs.c
M src/mainboard/hp/2570p/romstage.c
M src/mainboard/hp/2760p/romstage.c
M src/mainboard/hp/8460p/romstage.c
M src/mainboard/hp/8470p/romstage.c
M src/mainboard/hp/8770w/romstage.c
M src/mainboard/hp/compaq_8200_elite_sff/romstage.c
M src/mainboard/hp/folio_9470m/romstage.c
M src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
M src/mainboard/hp/revolve_810_g1/romstage.c
M src/mainboard/iei/kino-780am2-fam10/mainboard.c
M src/mainboard/iei/kino-780am2-fam10/mptable.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/mainboard.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/camelbackmountain_fsp/mainboard.c
M src/mainboard/intel/cannonlake_rvp/smihandler.c
M src/mainboard/intel/d945gclf/romstage.c
M src/mainboard/intel/dg43gt/romstage.c
M src/mainboard/intel/emeraldlake2/mainboard.c
M src/mainboard/intel/galileo/gpio.c
M src/mainboard/intel/galileo/reg_access.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/kblrvp/smihandler.c
M src/mainboard/intel/kunimitsu/smihandler.c
M src/mainboard/intel/stargo2/mainboard_smi.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/intel/wtm2/chromeos.c
M src/mainboard/jetway/nf81-t56n-lf/mptable.c
M src/mainboard/jetway/pa78vm5/mainboard.c
M src/mainboard/jetway/pa78vm5/mptable.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/kontron/ktqm77/mainboard.c
M src/mainboard/lenovo/l520/romstage.c
M src/mainboard/lenovo/s230u/mainboard.c
M src/mainboard/lenovo/s230u/romstage.c
M src/mainboard/lenovo/s230u/smihandler.c
M src/mainboard/lenovo/t400/acpi_tables.c
M src/mainboard/lenovo/t420/romstage.c
M src/mainboard/lenovo/t420s/romstage.c
M src/mainboard/lenovo/t430/romstage.c
M src/mainboard/lenovo/t430s/romstage.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t530/romstage.c
M src/mainboard/lenovo/x131e/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x200/acpi_tables.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/irq_tables.c
M src/mainboard/pcengines/apu1/mptable.c
M src/mainboard/roda/rk9/acpi_tables.c
M src/mainboard/roda/rk9/smihandler.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/mainboard/samsung/lumpy/smihandler.c
M src/mainboard/samsung/stumpy/chromeos.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/samsung/stumpy/smihandler.c
M src/mainboard/sapphire/pureplatinumh61/romstage.c
M src/mainboard/siemens/mc_tcu3/mainboard.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/sifive/hifive-unleashed/mainboard.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/mainboard.c
M src/mainboard/supermicro/h8scm_fam10/mptable.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/agesa/family12/northbridge.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/amdfam10/amdfam10.h
M src/northbridge/amd/amdfam10/amdfam10_util.c
M src/northbridge/amd/amdfam10/early_ht.c
M src/northbridge/amd/amdfam10/ht_config.c
M src/northbridge/amd/amdfam10/northbridge.c
M src/northbridge/amd/amdfam10/pci.h
M src/northbridge/amd/amdfam10/raminit_amdmct.c
M src/northbridge/amd/amdk8/reset_test.c
M src/northbridge/amd/lx/grphinit.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/amd/pi/ramtop.c
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/fsp_rangeley/acpi.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_rangeley/port_access.c
M src/northbridge/intel/fsp_rangeley/raminit.c
M src/northbridge/intel/fsp_sandybridge/bootblock.c
M src/northbridge/intel/fsp_sandybridge/finalize.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/fsp_sandybridge/ram_calc.c
M src/northbridge/intel/fsp_sandybridge/raminit.c
M src/northbridge/intel/fsp_sandybridge/report_platform.c
M src/northbridge/intel/gm45/bootblock.c
M src/northbridge/intel/gm45/early_init.c
M src/northbridge/intel/gm45/igd.c
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/gm45/pcie.c
M src/northbridge/intel/gm45/pm.c
M src/northbridge/intel/gm45/ram_calc.c
M src/northbridge/intel/gm45/thermal.c
M src/northbridge/intel/haswell/bootblock.c
M src/northbridge/intel/haswell/finalize.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/haswell/ram_calc.c
M src/northbridge/intel/haswell/report_platform.c
M src/northbridge/intel/i440bx/debug.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i440bx/ram_calc.c
M src/northbridge/intel/i945/bootblock.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/i945/ram_calc.c
M src/northbridge/intel/nehalem/bootblock.c
M src/northbridge/intel/nehalem/finalize.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/nehalem/ram_calc.c
M src/northbridge/intel/pineview/bootblock.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/pineview/ram_calc.c
M src/northbridge/intel/sandybridge/bootblock.c
M src/northbridge/intel/sandybridge/finalize.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/sandybridge/ram_calc.c
M src/northbridge/intel/sandybridge/raminit_ivy.c
M src/northbridge/intel/x4x/bootblock.c
M src/northbridge/intel/x4x/gma.c
M src/northbridge/intel/x4x/northbridge.c
M src/northbridge/intel/x4x/ram_calc.c
M src/northbridge/intel/x4x/raminit_tables.c
M src/northbridge/via/vx900/bootblock.c
M src/northbridge/via/vx900/chrome9hd.c
M src/northbridge/via/vx900/early_vx900.c
M src/northbridge/via/vx900/lpc.c
M src/northbridge/via/vx900/pcie.c
M src/northbridge/via/vx900/vx900.h
M src/soc/amd/common/block/acpi/halt.c
M src/soc/amd/stoneyridge/hda.c
M src/soc/amd/stoneyridge/include/soc/northbridge.h
M src/soc/amd/stoneyridge/include/soc/pci_devs.h
M src/soc/amd/stoneyridge/include/soc/smi.h
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/amd/stoneyridge/sata.c
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/tsc_freq.c
M src/soc/cavium/cn81xx/bootblock.c
M src/soc/cavium/common/bdk-coreboot.c
M src/soc/imgtec/pistachio/include/soc/spi.h
M src/soc/intel/apollolake/include/soc/pci_devs.h
M src/soc/intel/apollolake/memmap.c
M src/soc/intel/apollolake/romstage.c
M src/soc/intel/apollolake/smihandler.c
M src/soc/intel/baytrail/bootblock/bootblock.c
M src/soc/intel/baytrail/dptf.c
M src/soc/intel/baytrail/elog.c
M src/soc/intel/baytrail/emmc.c
M src/soc/intel/baytrail/hda.c
M src/soc/intel/baytrail/lpss.c
M src/soc/intel/baytrail/memmap.c
M src/soc/intel/baytrail/perf_power.c
M src/soc/intel/baytrail/romstage/early_spi.c
M src/soc/intel/baytrail/romstage/gfx.c
M src/soc/intel/baytrail/romstage/uart.c
M src/soc/intel/baytrail/sd.c
M src/soc/intel/braswell/bootblock/bootblock.c
M src/soc/intel/braswell/elog.c
M src/soc/intel/braswell/emmc.c
M src/soc/intel/braswell/gfx.c
M src/soc/intel/braswell/hda.c
M src/soc/intel/braswell/include/soc/gpio.h
M src/soc/intel/braswell/lpss.c
M src/soc/intel/braswell/memmap.c
M src/soc/intel/braswell/romstage/early_spi.c
M src/soc/intel/braswell/sata.c
M src/soc/intel/braswell/sd.c
M src/soc/intel/broadwell/acpi.c
M src/soc/intel/broadwell/bootblock/pch.c
M src/soc/intel/broadwell/bootblock/systemagent.c
M src/soc/intel/broadwell/ehci.c
M src/soc/intel/broadwell/include/soc/pci_devs.h
M src/soc/intel/broadwell/iobp.c
M src/soc/intel/broadwell/me_status.c
M src/soc/intel/broadwell/memmap.c
M src/soc/intel/broadwell/pch.c
M src/soc/intel/broadwell/romstage/pch.c
M src/soc/intel/broadwell/romstage/raminit.c
M src/soc/intel/broadwell/romstage/report_platform.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/romstage/smbus.c
M src/soc/intel/broadwell/romstage/spi.c
M src/soc/intel/broadwell/romstage/uart.c
M src/soc/intel/broadwell/systemagent.c
M src/soc/intel/broadwell/usb_debug.c
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/cannonlake/include/soc/pci_devs.h
M src/soc/intel/cannonlake/include/soc/pm.h
M src/soc/intel/cannonlake/memmap.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/include/intelblocks/smihandler.h
M src/soc/intel/common/block/include/intelblocks/uart.h
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/xdci/xdci.c
M src/soc/intel/common/block/xhci/xhci.c
M src/soc/intel/common/pch/lockdown/lockdown.c
M src/soc/intel/denverton_ns/include/soc/pci_devs.h
M src/soc/intel/denverton_ns/include/soc/pm.h
M src/soc/intel/denverton_ns/memmap.c
M src/soc/intel/denverton_ns/npk.c
M src/soc/intel/denverton_ns/xhci.c
M src/soc/intel/fsp_baytrail/gfx.c
M src/soc/intel/fsp_baytrail/include/soc/i2c.h
M src/soc/intel/fsp_baytrail/lpss.c
M src/soc/intel/fsp_baytrail/memmap.c
M src/soc/intel/fsp_baytrail/romstage/report_platform.c
M src/soc/intel/fsp_baytrail/romstage/uart.c
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/smihandler.c
M src/soc/intel/fsp_broadwell_de/smmrelocate.c
M src/soc/intel/icelake/bootblock/report_platform.c
M src/soc/intel/icelake/include/soc/pci_devs.h
M src/soc/intel/icelake/include/soc/pm.h
M src/soc/intel/icelake/memmap.c
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/quark/include/soc/reg_access.h
M src/soc/intel/quark/sd.c
M src/soc/intel/quark/spi_debug.c
M src/soc/intel/quark/storage_test.c
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/bootblock/report_platform.c
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/elog.c
M src/soc/intel/skylake/include/soc/pci_devs.h
M src/soc/intel/skylake/me.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
M src/soc/intel/skylake/systemagent.c
M src/soc/intel/skylake/vr_config.c
M src/soc/mediatek/mt8173/memory.c
M src/soc/mediatek/mt8173/mt6391.c
M src/soc/mediatek/mt8183/gpio.c
M src/soc/nvidia/tegra124/dp.c
M src/soc/nvidia/tegra124/include/soc/clock.h
M src/soc/nvidia/tegra124/soc.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/dp.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/include/soc/clock.h
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/mipi_dsi.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/qualcomm/ipq40xx/i2c.c
M src/soc/qualcomm/ipq806x/i2c.c
M src/soc/rockchip/common/include/soc/soc.h
M src/soc/rockchip/rk3288/bootblock.c
M src/soc/rockchip/rk3288/gpio.c
M src/soc/rockchip/rk3399/decompressor.c
M src/soc/rockchip/rk3399/gpio.c
M src/soc/samsung/exynos5250/include/soc/cpu.h
M src/soc/samsung/exynos5420/dp.c
M src/soc/samsung/exynos5420/include/soc/cpu.h
M src/southbridge/amd/agesa/hudson/bootblock.c
M src/southbridge/amd/agesa/hudson/hda.c
M src/southbridge/amd/agesa/hudson/lpc.c
M src/southbridge/amd/agesa/hudson/reset.c
M src/southbridge/amd/agesa/hudson/sata.c
M src/southbridge/amd/agesa/hudson/sd.c
M src/southbridge/amd/agesa/hudson/sm.c
M src/southbridge/amd/agesa/hudson/usb.c
M src/southbridge/amd/amd8111/bootblock.c
M src/southbridge/amd/amd8111/early_ctrl.c
M src/southbridge/amd/amd8111/reset.c
M src/southbridge/amd/amd8111/smbus.c
M src/southbridge/amd/amd8111/usb.c
M src/southbridge/amd/cimx/sb800/cfg.c
M src/southbridge/amd/cimx/sb800/early.c
M src/southbridge/amd/cimx/sb800/lpc.c
M src/southbridge/amd/cimx/sb800/reset.c
M src/southbridge/amd/cimx/sb900/bootblock.c
M src/southbridge/amd/cimx/sb900/reset.c
M src/southbridge/amd/pi/hudson/bootblock.c
M src/southbridge/amd/pi/hudson/hda.c
M src/southbridge/amd/pi/hudson/reset.c
M src/southbridge/amd/pi/hudson/sata.c
M src/southbridge/amd/pi/hudson/sd.c
M src/southbridge/amd/pi/hudson/sm.c
M src/southbridge/amd/pi/hudson/usb.c
M src/southbridge/amd/rs780/cmn.c
M src/southbridge/amd/rs780/early_setup.c
M src/southbridge/amd/sb700/bootblock.c
M src/southbridge/amd/sb700/fadt.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/amd/sb700/smbus.h
M src/southbridge/amd/sb800/bootblock.c
M src/southbridge/amd/sb800/fadt.c
M src/southbridge/amd/sb800/lpc.c
M src/southbridge/amd/sr5650/cmn.h
M src/southbridge/broadcom/bcm5785/bootblock.c
M src/southbridge/broadcom/bcm5785/lpc.c
M src/southbridge/intel/bd82x6x/bootblock.c
M src/southbridge/intel/bd82x6x/early_spi.c
M src/southbridge/intel/bd82x6x/early_usb_mrc.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
M src/southbridge/intel/bd82x6x/watchdog.c
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/pmutil.c
M src/southbridge/intel/common/usb_debug.c
M src/southbridge/intel/fsp_bd82x6x/bootblock.c
M src/southbridge/intel/fsp_bd82x6x/early_spi.c
M src/southbridge/intel/fsp_bd82x6x/early_usb.c
M src/southbridge/intel/fsp_i89xx/bootblock.c
M src/southbridge/intel/fsp_i89xx/early_spi.c
M src/southbridge/intel/fsp_i89xx/early_usb.c
M src/southbridge/intel/fsp_rangeley/early_spi.c
M src/southbridge/intel/fsp_rangeley/early_usb.c
M src/southbridge/intel/fsp_rangeley/smbus.c
M src/southbridge/intel/i82371eb/bootblock.c
M src/southbridge/intel/i82371eb/early_pm.c
M src/southbridge/intel/i82371eb/i82371eb.h
M src/southbridge/intel/i82801dx/bootblock.c
M src/southbridge/intel/i82801gx/bootblock.c
M src/southbridge/intel/i82801gx/smbus.c
M src/southbridge/intel/i82801ix/bootblock.c
M src/southbridge/intel/i82801ix/dmi_setup.c
M src/southbridge/intel/i82801ix/smbus.c
M src/southbridge/intel/i82801ix/smihandler.c
M src/southbridge/intel/i82801jx/bootblock.c
M src/southbridge/intel/i82801jx/smbus.c
M src/southbridge/intel/i82870/pci_parity.c
M src/southbridge/intel/ibexpeak/madt.c
M src/southbridge/intel/lynxpoint/bootblock.c
M src/southbridge/intel/lynxpoint/early_spi.c
M src/southbridge/intel/lynxpoint/early_usb.c
M src/southbridge/intel/lynxpoint/pch.c
M src/southbridge/intel/lynxpoint/rcba.c
M src/southbridge/nvidia/ck804/bootblock.c
M src/southbridge/nvidia/ck804/ck804.c
M src/southbridge/nvidia/ck804/enable_usbdebug.c
M src/southbridge/nvidia/ck804/smbus.c
M src/southbridge/nvidia/mcp55/bootblock.c
M src/southbridge/nvidia/mcp55/enable_usbdebug.c
M src/southbridge/nvidia/mcp55/fadt.c
M src/southbridge/nvidia/mcp55/mcp55.c
M src/southbridge/nvidia/mcp55/smbus.c
M src/southbridge/ricoh/rl5c476/rl5c476.c
M src/southbridge/ti/pci1x2x/pci1x2x.c
M src/southbridge/ti/pci7420/cardbus.c
M src/southbridge/ti/pci7420/firewire.c
M src/southbridge/ti/pcixx12/pcixx12.c
M src/southbridge/via/common/early_smbus_delay.c
M src/southbridge/via/common/early_smbus_is_busy.c
M src/southbridge/via/common/early_smbus_reset.c
M src/southbridge/via/common/early_smbus_wait_until_ready.c
M src/southbridge/via/common/via_early_smbus.h
M src/superio/fintek/common/fintek.h
M src/superio/fintek/f71805f/superio.c
M src/superio/fintek/f71808a/f71808a_hwm.c
M src/superio/fintek/f71808a/f71808a_multifunc.c
M src/superio/fintek/f71808a/fintek_internal.h
M src/superio/fintek/f71808a/superio.c
M src/superio/fintek/f71859/superio.c
M src/superio/fintek/f71863fg/superio.c
M src/superio/fintek/f71869ad/f71869ad_hwm.c
M src/superio/fintek/f71869ad/f71869ad_multifunc.c
M src/superio/fintek/f71869ad/fintek_internal.h
M src/superio/fintek/f71869ad/superio.c
M src/superio/fintek/f71872/superio.c
M src/superio/fintek/f81865f/superio.c
M src/superio/fintek/f81866d/f81866d_hwm.c
M src/superio/fintek/f81866d/f81866d_uart.c
M src/superio/fintek/f81866d/fintek_internal.h
M src/superio/fintek/f81866d/superio.c
M src/superio/ite/common/ite.h
M src/superio/ite/it8623e/superio.c
M src/superio/ite/it8671f/it8671f.h
M src/superio/ite/it8712f/superio.c
M src/superio/ite/it8716f/superio.c
M src/superio/ite/it8718f/early_serial.c
M src/superio/ite/it8718f/it8718f.h
M src/superio/ite/it8728f/superio.c
M src/superio/ite/it8783ef/it8783ef.h
M src/superio/nsc/pc87309/early_serial.c
M src/superio/nsc/pc87309/pc87309.h
M src/superio/nsc/pc87309/superio.c
M src/superio/nsc/pc87360/early_serial.c
M src/superio/nsc/pc87360/pc87360.h
M src/superio/nsc/pc87360/superio.c
M src/superio/nsc/pc87366/early_serial.c
M src/superio/nsc/pc87366/pc87366.h
M src/superio/nsc/pc87366/superio.c
M src/superio/nsc/pc87382/superio.c
M src/superio/nsc/pc87384/superio.c
M src/superio/nsc/pc87392/early_serial.c
M src/superio/nsc/pc87392/superio.c
M src/superio/nsc/pc87417/early_serial.c
M src/superio/nsc/pc87417/pc87417.h
M src/superio/nsc/pc87417/superio.c
M src/superio/nsc/pc97317/pc97317.h
M src/superio/nsc/pc97317/superio.c
M src/superio/nuvoton/common/nuvoton.h
M src/superio/nuvoton/nct5104d/superio.c
M src/superio/nuvoton/nct5572d/superio.c
M src/superio/nuvoton/nct6776/superio.c
M src/superio/nuvoton/nct6779d/superio.c
M src/superio/nuvoton/nct6791d/superio.c
M src/superio/nuvoton/wpcm450/superio.c
M src/superio/renesas/m3885x/superio.c
M src/superio/serverengines/pilot/early_init.c
M src/superio/smsc/dme1737/dme1737.h
M src/superio/smsc/dme1737/superio.c
M src/superio/smsc/kbc1100/kbc1100.h
M src/superio/smsc/kbc1100/superio.c
M src/superio/smsc/lpc47b272/lpc47b272.h
M src/superio/smsc/lpc47b272/superio.c
M src/superio/smsc/lpc47b397/lpc47b397.h
M src/superio/smsc/lpc47b397/superio.c
M src/superio/smsc/lpc47m10x/lpc47m10x.h
M src/superio/smsc/lpc47m10x/superio.c
M src/superio/smsc/lpc47m15x/lpc47m15x.h
M src/superio/smsc/lpc47m15x/superio.c
M src/superio/smsc/lpc47n207/lpc47n207.h
M src/superio/smsc/lpc47n217/lpc47n217.h
M src/superio/smsc/lpc47n227/superio.c
M src/superio/smsc/mec1308/superio.c
M src/superio/smsc/sch4037/superio.c
M src/superio/smsc/sio1036/sio1036.h
M src/superio/smsc/sio1036/superio.c
M src/superio/smsc/smscsuperio/smscsuperio.h
M src/superio/smsc/smscsuperio/superio.c
M src/superio/winbond/common/winbond.h
M src/superio/winbond/w83627dhg/superio.c
M src/superio/winbond/w83627dhg/w83627dhg.h
M src/superio/winbond/w83627ehg/superio.c
M src/superio/winbond/w83627hf/superio.c
M src/superio/winbond/w83627thg/superio.c
M src/superio/winbond/w83627thg/w83627thg.h
M src/superio/winbond/w83627uhg/superio.c
M src/superio/winbond/w83667hg-a/superio.c
M src/superio/winbond/w83977tf/superio.c
M src/superio/winbond/wpcd376i/early_serial.c
M src/superio/winbond/wpcd376i/superio.c
M src/superio/winbond/wpcd376i/wpcd376i.h
597 files changed, 11 insertions(+), 589 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/29307/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Gerrit-Change-Number: 29307
Gerrit-PatchSet: 2
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include <arch/io.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29307
Change subject: src: Remove unneeded include <arch/io.h>
......................................................................
src: Remove unneeded include <arch/io.h>
Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/arm/armv7/mmu.c
M src/arch/x86/cpu.c
M src/console/die.c
M src/cpu/amd/family_10h-family_15h/ram_calc.c
M src/cpu/amd/geode_lx/cpubug.c
M src/cpu/amd/smm/smm_init.c
M src/cpu/intel/haswell/romstage.c
M src/cpu/x86/lapic/apic_timer.c
M src/device/device.c
M src/device/oprom/realmode/x86_interrupts.c
M src/device/pci_device.c
M src/device/pci_early.c
M src/drivers/elog/gsmi.c
M src/drivers/emulation/qemu/cirrus.c
M src/drivers/i2c/at24rf08c/at24rf08c.c
M src/drivers/i2c/at24rf08c/lenovo_serials.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
M src/drivers/intel/gma/intel_ddi.c
M src/drivers/intel/gma/vbt.c
M src/drivers/maxim/max77686/max77686.c
M src/drivers/ricoh/rce822/rce822.c
M src/drivers/sil/3114/sil_sata.c
M src/drivers/uart/oxpcie_early.c
M src/drivers/xgi/common/xgi_coreboot.c
M src/drivers/xgi/common/xgi_coreboot.h
M src/drivers/xgi/z9s/z9s.c
M src/ec/google/chromeec/crosec_proto.c
M src/ec/google/chromeec/ec.c
M src/ec/google/chromeec/ec_i2c.c
M src/ec/lenovo/h8/h8.c
M src/include/device/azalia_device.h
M src/include/device/device.h
M src/include/device/pci.h
M src/include/device/pci_ehci.h
M src/include/reg_script.h
M src/lib/edid.c
M src/mainboard/advansus/a785e-i/mainboard.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bettong/mptable.c
M src/mainboard/amd/bimini_fam10/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mainboard.c
M src/mainboard/amd/db-ft3b-lc/mptable.c
M src/mainboard/amd/gardenia/mptable.c
M src/mainboard/amd/lamar/mainboard.c
M src/mainboard/amd/lamar/mptable.c
M src/mainboard/amd/mahogany_fam10/mainboard.c
M src/mainboard/amd/mahogany_fam10/mptable.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/olivehillplus/mainboard.c
M src/mainboard/amd/parmer/romstage.c
M src/mainboard/amd/persimmon/mptable.c
M src/mainboard/amd/tilapia_fam10/mainboard.c
M src/mainboard/amd/tilapia_fam10/mptable.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/amd/torpedo/acpi_tables.c
M src/mainboard/aopen/dxplplusu/romstage.c
M src/mainboard/apple/macbook21/smihandler.c
M src/mainboard/apple/macbookair4_2/early_southbridge.c
M src/mainboard/asus/am1i-a/mptable.c
M src/mainboard/asus/kcma-d8/bootblock.c
M src/mainboard/asus/kcma-d8/mptable.c
M src/mainboard/asus/kfsn4-dre/acpi_tables.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/bootblock.c
M src/mainboard/asus/kgpe-d16/mptable.c
M src/mainboard/asus/m4a78-em/mainboard.c
M src/mainboard/asus/m4a78-em/mptable.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/mainboard.c
M src/mainboard/asus/m4a785-m/mptable.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/mainboard.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/asus/maximus_iv_gene-z/romstage.c
M src/mainboard/asus/p5qc/romstage.c
M src/mainboard/asus/p8h61-m_lx/romstage.c
M src/mainboard/avalue/eax-785e/mainboard.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/bap/ode_e20XX/mptable.c
M src/mainboard/bap/ode_e21XX/mainboard.c
M src/mainboard/biostar/am1ml/mptable.c
M src/mainboard/elmex/pcm205400/mptable.c
M src/mainboard/emulation/qemu-i440fx/mainboard.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-power8/uart.c
M src/mainboard/emulation/qemu-q35/bootblock.c
M src/mainboard/emulation/qemu-q35/mainboard.c
M src/mainboard/emulation/qemu-q35/romstage.c
M src/mainboard/emulation/qemu-riscv/uart.c
M src/mainboard/emulation/spike-riscv/uart.c
M src/mainboard/getac/p470/mainboard.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
M src/mainboard/gigabyte/ma785gm/mainboard.c
M src/mainboard/gigabyte/ma785gm/mptable.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/mainboard.c
M src/mainboard/gigabyte/ma785gmt/mptable.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/mainboard.c
M src/mainboard/gigabyte/ma78gm/mptable.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/gizmosphere/gizmo2/mptable.c
M src/mainboard/google/auron/variant.h
M src/mainboard/google/beltino/chromeos.c
M src/mainboard/google/beltino/smihandler.c
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/butterfly/mainboard_smi.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/eve/smihandler.c
M src/mainboard/google/foster/mainboard.c
M src/mainboard/google/foster/reset.c
M src/mainboard/google/glados/smihandler.c
M src/mainboard/google/gru/sdram_configs.c
M src/mainboard/google/jecht/chromeos.c
M src/mainboard/google/jecht/smihandler.c
M src/mainboard/google/kahlee/mptable.c
M src/mainboard/google/link/mainboard_smi.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/oak/bootblock.c
M src/mainboard/google/oak/mainboard.c
M src/mainboard/google/octopus/ec.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/parrot/ec.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/parrot/smihandler.c
M src/mainboard/google/rambi/mainboard.c
M src/mainboard/google/smaug/reset.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/stout/ec.c
M src/mainboard/google/stout/mainboard.c
M src/mainboard/google/stout/mainboard_smi.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/google/urara/mainboard.c
M src/mainboard/google/veyron/sdram_configs.c
M src/mainboard/google/veyron_mickey/sdram_configs.c
M src/mainboard/google/veyron_rialto/sdram_configs.c
M src/mainboard/hp/2570p/romstage.c
M src/mainboard/hp/2760p/romstage.c
M src/mainboard/hp/8460p/romstage.c
M src/mainboard/hp/8470p/romstage.c
M src/mainboard/hp/8770w/romstage.c
M src/mainboard/hp/compaq_8200_elite_sff/romstage.c
M src/mainboard/hp/folio_9470m/romstage.c
M src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
M src/mainboard/hp/revolve_810_g1/romstage.c
M src/mainboard/iei/kino-780am2-fam10/mainboard.c
M src/mainboard/iei/kino-780am2-fam10/mptable.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/mainboard.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/camelbackmountain_fsp/mainboard.c
M src/mainboard/intel/cannonlake_rvp/smihandler.c
M src/mainboard/intel/d945gclf/romstage.c
M src/mainboard/intel/dg43gt/romstage.c
M src/mainboard/intel/emeraldlake2/mainboard.c
M src/mainboard/intel/galileo/gpio.c
M src/mainboard/intel/galileo/reg_access.c
M src/mainboard/intel/kblrvp/chromeos.c
M src/mainboard/intel/kblrvp/smihandler.c
M src/mainboard/intel/kunimitsu/smihandler.c
M src/mainboard/intel/stargo2/mainboard_smi.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/intel/wtm2/chromeos.c
M src/mainboard/jetway/nf81-t56n-lf/mptable.c
M src/mainboard/jetway/pa78vm5/mainboard.c
M src/mainboard/jetway/pa78vm5/mptable.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/kontron/ktqm77/mainboard.c
M src/mainboard/lenovo/l520/romstage.c
M src/mainboard/lenovo/s230u/mainboard.c
M src/mainboard/lenovo/s230u/romstage.c
M src/mainboard/lenovo/s230u/smihandler.c
M src/mainboard/lenovo/t400/acpi_tables.c
M src/mainboard/lenovo/t420/romstage.c
M src/mainboard/lenovo/t420s/romstage.c
M src/mainboard/lenovo/t430/romstage.c
M src/mainboard/lenovo/t430s/romstage.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t530/romstage.c
M src/mainboard/lenovo/x131e/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x200/acpi_tables.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/irq_tables.c
M src/mainboard/pcengines/apu1/mptable.c
M src/mainboard/roda/rk9/acpi_tables.c
M src/mainboard/roda/rk9/smihandler.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/mainboard/samsung/lumpy/smihandler.c
M src/mainboard/samsung/stumpy/chromeos.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/samsung/stumpy/smihandler.c
M src/mainboard/sapphire/pureplatinumh61/romstage.c
M src/mainboard/siemens/mc_tcu3/mainboard.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/sifive/hifive-unleashed/mainboard.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/mainboard.c
M src/mainboard/supermicro/h8scm_fam10/mptable.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/agesa/family12/northbridge.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/amdfam10/amdfam10.h
M src/northbridge/amd/amdfam10/amdfam10_util.c
M src/northbridge/amd/amdfam10/early_ht.c
M src/northbridge/amd/amdfam10/ht_config.c
M src/northbridge/amd/amdfam10/northbridge.c
M src/northbridge/amd/amdfam10/pci.h
M src/northbridge/amd/amdfam10/raminit_amdmct.c
M src/northbridge/amd/amdk8/reset_test.c
M src/northbridge/amd/lx/grphinit.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/amd/pi/ramtop.c
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/fsp_rangeley/acpi.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_rangeley/port_access.c
M src/northbridge/intel/fsp_rangeley/raminit.c
M src/northbridge/intel/fsp_sandybridge/bootblock.c
M src/northbridge/intel/fsp_sandybridge/finalize.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/fsp_sandybridge/ram_calc.c
M src/northbridge/intel/fsp_sandybridge/raminit.c
M src/northbridge/intel/fsp_sandybridge/report_platform.c
M src/northbridge/intel/gm45/bootblock.c
M src/northbridge/intel/gm45/early_init.c
M src/northbridge/intel/gm45/igd.c
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/gm45/pcie.c
M src/northbridge/intel/gm45/pm.c
M src/northbridge/intel/gm45/ram_calc.c
M src/northbridge/intel/gm45/thermal.c
M src/northbridge/intel/haswell/bootblock.c
M src/northbridge/intel/haswell/finalize.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/haswell/ram_calc.c
M src/northbridge/intel/haswell/report_platform.c
M src/northbridge/intel/i440bx/debug.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i440bx/ram_calc.c
M src/northbridge/intel/i945/bootblock.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/i945/ram_calc.c
M src/northbridge/intel/nehalem/bootblock.c
M src/northbridge/intel/nehalem/finalize.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/nehalem/ram_calc.c
M src/northbridge/intel/pineview/bootblock.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/pineview/ram_calc.c
M src/northbridge/intel/sandybridge/bootblock.c
M src/northbridge/intel/sandybridge/finalize.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/sandybridge/ram_calc.c
M src/northbridge/intel/sandybridge/raminit_ivy.c
M src/northbridge/intel/x4x/bootblock.c
M src/northbridge/intel/x4x/gma.c
M src/northbridge/intel/x4x/northbridge.c
M src/northbridge/intel/x4x/ram_calc.c
M src/northbridge/intel/x4x/raminit_tables.c
M src/northbridge/via/vx900/bootblock.c
M src/northbridge/via/vx900/chrome9hd.c
M src/northbridge/via/vx900/early_vx900.c
M src/northbridge/via/vx900/lpc.c
M src/northbridge/via/vx900/pcie.c
M src/northbridge/via/vx900/vx900.h
M src/soc/amd/common/block/acpi/halt.c
M src/soc/amd/stoneyridge/hda.c
M src/soc/amd/stoneyridge/include/soc/northbridge.h
M src/soc/amd/stoneyridge/include/soc/pci_devs.h
M src/soc/amd/stoneyridge/include/soc/smi.h
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/amd/stoneyridge/sata.c
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/tsc_freq.c
M src/soc/cavium/cn81xx/bootblock.c
M src/soc/cavium/common/bdk-coreboot.c
M src/soc/imgtec/pistachio/include/soc/spi.h
M src/soc/intel/apollolake/include/soc/pci_devs.h
M src/soc/intel/apollolake/memmap.c
M src/soc/intel/apollolake/romstage.c
M src/soc/intel/apollolake/smihandler.c
M src/soc/intel/baytrail/bootblock/bootblock.c
M src/soc/intel/baytrail/dptf.c
M src/soc/intel/baytrail/elog.c
M src/soc/intel/baytrail/emmc.c
M src/soc/intel/baytrail/hda.c
M src/soc/intel/baytrail/lpss.c
M src/soc/intel/baytrail/memmap.c
M src/soc/intel/baytrail/perf_power.c
M src/soc/intel/baytrail/romstage/early_spi.c
M src/soc/intel/baytrail/romstage/gfx.c
M src/soc/intel/baytrail/romstage/uart.c
M src/soc/intel/baytrail/sd.c
M src/soc/intel/braswell/bootblock/bootblock.c
M src/soc/intel/braswell/elog.c
M src/soc/intel/braswell/emmc.c
M src/soc/intel/braswell/gfx.c
M src/soc/intel/braswell/hda.c
M src/soc/intel/braswell/include/soc/gpio.h
M src/soc/intel/braswell/lpss.c
M src/soc/intel/braswell/memmap.c
M src/soc/intel/braswell/romstage/early_spi.c
M src/soc/intel/braswell/sata.c
M src/soc/intel/braswell/sd.c
M src/soc/intel/broadwell/acpi.c
M src/soc/intel/broadwell/bootblock/pch.c
M src/soc/intel/broadwell/bootblock/systemagent.c
M src/soc/intel/broadwell/ehci.c
M src/soc/intel/broadwell/include/soc/pci_devs.h
M src/soc/intel/broadwell/iobp.c
M src/soc/intel/broadwell/me_status.c
M src/soc/intel/broadwell/memmap.c
M src/soc/intel/broadwell/pch.c
M src/soc/intel/broadwell/romstage/pch.c
M src/soc/intel/broadwell/romstage/raminit.c
M src/soc/intel/broadwell/romstage/report_platform.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/romstage/smbus.c
M src/soc/intel/broadwell/romstage/spi.c
M src/soc/intel/broadwell/romstage/uart.c
M src/soc/intel/broadwell/systemagent.c
M src/soc/intel/broadwell/usb_debug.c
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/cannonlake/include/soc/pci_devs.h
M src/soc/intel/cannonlake/include/soc/pm.h
M src/soc/intel/cannonlake/memmap.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/include/intelblocks/smihandler.h
M src/soc/intel/common/block/include/intelblocks/uart.h
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/xdci/xdci.c
M src/soc/intel/common/block/xhci/xhci.c
M src/soc/intel/common/pch/lockdown/lockdown.c
M src/soc/intel/denverton_ns/include/soc/pci_devs.h
M src/soc/intel/denverton_ns/include/soc/pm.h
M src/soc/intel/denverton_ns/memmap.c
M src/soc/intel/denverton_ns/npk.c
M src/soc/intel/denverton_ns/xhci.c
M src/soc/intel/fsp_baytrail/gfx.c
M src/soc/intel/fsp_baytrail/include/soc/i2c.h
M src/soc/intel/fsp_baytrail/lpss.c
M src/soc/intel/fsp_baytrail/memmap.c
M src/soc/intel/fsp_baytrail/romstage/report_platform.c
M src/soc/intel/fsp_baytrail/romstage/uart.c
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/smihandler.c
M src/soc/intel/fsp_broadwell_de/smmrelocate.c
M src/soc/intel/icelake/bootblock/report_platform.c
M src/soc/intel/icelake/include/soc/pci_devs.h
M src/soc/intel/icelake/include/soc/pm.h
M src/soc/intel/icelake/memmap.c
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/quark/include/soc/reg_access.h
M src/soc/intel/quark/sd.c
M src/soc/intel/quark/spi_debug.c
M src/soc/intel/quark/storage_test.c
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/bootblock/report_platform.c
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/elog.c
M src/soc/intel/skylake/include/soc/pci_devs.h
M src/soc/intel/skylake/me.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
M src/soc/intel/skylake/systemagent.c
M src/soc/intel/skylake/vr_config.c
M src/soc/mediatek/mt8173/memory.c
M src/soc/mediatek/mt8173/mt6391.c
M src/soc/mediatek/mt8183/gpio.c
M src/soc/nvidia/tegra124/dp.c
M src/soc/nvidia/tegra124/include/soc/clock.h
M src/soc/nvidia/tegra124/soc.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/dp.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/include/soc/clock.h
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/mipi_dsi.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/qualcomm/ipq40xx/i2c.c
M src/soc/qualcomm/ipq806x/i2c.c
M src/soc/rockchip/common/include/soc/soc.h
M src/soc/rockchip/rk3288/bootblock.c
M src/soc/rockchip/rk3288/gpio.c
M src/soc/rockchip/rk3399/decompressor.c
M src/soc/rockchip/rk3399/gpio.c
M src/soc/samsung/exynos5250/include/soc/cpu.h
M src/soc/samsung/exynos5420/dp.c
M src/soc/samsung/exynos5420/include/soc/cpu.h
M src/southbridge/amd/agesa/hudson/bootblock.c
M src/southbridge/amd/agesa/hudson/hda.c
M src/southbridge/amd/agesa/hudson/lpc.c
M src/southbridge/amd/agesa/hudson/reset.c
M src/southbridge/amd/agesa/hudson/sata.c
M src/southbridge/amd/agesa/hudson/sd.c
M src/southbridge/amd/agesa/hudson/sm.c
M src/southbridge/amd/agesa/hudson/usb.c
M src/southbridge/amd/amd8111/bootblock.c
M src/southbridge/amd/amd8111/early_ctrl.c
M src/southbridge/amd/amd8111/reset.c
M src/southbridge/amd/amd8111/smbus.c
M src/southbridge/amd/amd8111/usb.c
M src/southbridge/amd/cimx/sb800/cfg.c
M src/southbridge/amd/cimx/sb800/early.c
M src/southbridge/amd/cimx/sb800/lpc.c
M src/southbridge/amd/cimx/sb800/reset.c
M src/southbridge/amd/cimx/sb900/bootblock.c
M src/southbridge/amd/cimx/sb900/reset.c
M src/southbridge/amd/pi/hudson/bootblock.c
M src/southbridge/amd/pi/hudson/hda.c
M src/southbridge/amd/pi/hudson/reset.c
M src/southbridge/amd/pi/hudson/sata.c
M src/southbridge/amd/pi/hudson/sd.c
M src/southbridge/amd/pi/hudson/sm.c
M src/southbridge/amd/pi/hudson/usb.c
M src/southbridge/amd/rs780/cmn.c
M src/southbridge/amd/rs780/early_setup.c
M src/southbridge/amd/sb700/bootblock.c
M src/southbridge/amd/sb700/fadt.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/amd/sb700/smbus.h
M src/southbridge/amd/sb800/bootblock.c
M src/southbridge/amd/sb800/fadt.c
M src/southbridge/amd/sb800/lpc.c
M src/southbridge/amd/sr5650/cmn.h
M src/southbridge/broadcom/bcm5785/bootblock.c
M src/southbridge/broadcom/bcm5785/lpc.c
M src/southbridge/intel/bd82x6x/bootblock.c
M src/southbridge/intel/bd82x6x/early_spi.c
M src/southbridge/intel/bd82x6x/early_usb_mrc.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
M src/southbridge/intel/bd82x6x/watchdog.c
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/pmutil.c
M src/southbridge/intel/common/usb_debug.c
M src/southbridge/intel/fsp_bd82x6x/bootblock.c
M src/southbridge/intel/fsp_bd82x6x/early_spi.c
M src/southbridge/intel/fsp_bd82x6x/early_usb.c
M src/southbridge/intel/fsp_i89xx/bootblock.c
M src/southbridge/intel/fsp_i89xx/early_spi.c
M src/southbridge/intel/fsp_i89xx/early_usb.c
M src/southbridge/intel/fsp_rangeley/early_spi.c
M src/southbridge/intel/fsp_rangeley/early_usb.c
M src/southbridge/intel/fsp_rangeley/smbus.c
M src/southbridge/intel/i82371eb/bootblock.c
M src/southbridge/intel/i82371eb/early_pm.c
M src/southbridge/intel/i82371eb/i82371eb.h
M src/southbridge/intel/i82801dx/bootblock.c
M src/southbridge/intel/i82801gx/bootblock.c
M src/southbridge/intel/i82801gx/smbus.c
M src/southbridge/intel/i82801ix/bootblock.c
M src/southbridge/intel/i82801ix/dmi_setup.c
M src/southbridge/intel/i82801ix/smbus.c
M src/southbridge/intel/i82801ix/smihandler.c
M src/southbridge/intel/i82801jx/bootblock.c
M src/southbridge/intel/i82801jx/smbus.c
M src/southbridge/intel/i82870/pci_parity.c
M src/southbridge/intel/ibexpeak/madt.c
M src/southbridge/intel/lynxpoint/bootblock.c
M src/southbridge/intel/lynxpoint/early_spi.c
M src/southbridge/intel/lynxpoint/early_usb.c
M src/southbridge/intel/lynxpoint/pch.c
M src/southbridge/intel/lynxpoint/rcba.c
M src/southbridge/nvidia/ck804/bootblock.c
M src/southbridge/nvidia/ck804/ck804.c
M src/southbridge/nvidia/ck804/enable_usbdebug.c
M src/southbridge/nvidia/ck804/smbus.c
M src/southbridge/nvidia/mcp55/bootblock.c
M src/southbridge/nvidia/mcp55/enable_usbdebug.c
M src/southbridge/nvidia/mcp55/fadt.c
M src/southbridge/nvidia/mcp55/mcp55.c
M src/southbridge/nvidia/mcp55/smbus.c
M src/southbridge/ricoh/rl5c476/rl5c476.c
M src/southbridge/ti/pci1x2x/pci1x2x.c
M src/southbridge/ti/pci7420/cardbus.c
M src/southbridge/ti/pci7420/firewire.c
M src/southbridge/ti/pcixx12/pcixx12.c
M src/southbridge/via/common/early_smbus_delay.c
M src/southbridge/via/common/early_smbus_is_busy.c
M src/southbridge/via/common/early_smbus_reset.c
M src/southbridge/via/common/early_smbus_wait_until_ready.c
M src/southbridge/via/common/via_early_smbus.h
M src/superio/fintek/common/fintek.h
M src/superio/fintek/f71805f/superio.c
M src/superio/fintek/f71808a/f71808a_hwm.c
M src/superio/fintek/f71808a/f71808a_multifunc.c
M src/superio/fintek/f71808a/fintek_internal.h
M src/superio/fintek/f71808a/superio.c
M src/superio/fintek/f71859/superio.c
M src/superio/fintek/f71863fg/superio.c
M src/superio/fintek/f71869ad/f71869ad_hwm.c
M src/superio/fintek/f71869ad/f71869ad_multifunc.c
M src/superio/fintek/f71869ad/fintek_internal.h
M src/superio/fintek/f71869ad/superio.c
M src/superio/fintek/f71872/superio.c
M src/superio/fintek/f81865f/superio.c
M src/superio/fintek/f81866d/f81866d_hwm.c
M src/superio/fintek/f81866d/f81866d_uart.c
M src/superio/fintek/f81866d/fintek_internal.h
M src/superio/fintek/f81866d/superio.c
M src/superio/ite/common/ite.h
M src/superio/ite/it8623e/superio.c
M src/superio/ite/it8671f/it8671f.h
M src/superio/ite/it8712f/superio.c
M src/superio/ite/it8716f/superio.c
M src/superio/ite/it8718f/early_serial.c
M src/superio/ite/it8718f/it8718f.h
M src/superio/ite/it8728f/superio.c
M src/superio/ite/it8772f/it8772f.h
M src/superio/ite/it8783ef/it8783ef.h
M src/superio/nsc/pc87309/early_serial.c
M src/superio/nsc/pc87309/pc87309.h
M src/superio/nsc/pc87309/superio.c
M src/superio/nsc/pc87360/early_serial.c
M src/superio/nsc/pc87360/pc87360.h
M src/superio/nsc/pc87360/superio.c
M src/superio/nsc/pc87366/early_serial.c
M src/superio/nsc/pc87366/pc87366.h
M src/superio/nsc/pc87366/superio.c
M src/superio/nsc/pc87382/superio.c
M src/superio/nsc/pc87384/superio.c
M src/superio/nsc/pc87392/early_serial.c
M src/superio/nsc/pc87392/superio.c
M src/superio/nsc/pc87417/early_serial.c
M src/superio/nsc/pc87417/pc87417.h
M src/superio/nsc/pc87417/superio.c
M src/superio/nsc/pc97317/pc97317.h
M src/superio/nsc/pc97317/superio.c
M src/superio/nuvoton/common/nuvoton.h
M src/superio/nuvoton/nct5104d/superio.c
M src/superio/nuvoton/nct5572d/superio.c
M src/superio/nuvoton/nct6776/superio.c
M src/superio/nuvoton/nct6779d/superio.c
M src/superio/nuvoton/nct6791d/superio.c
M src/superio/nuvoton/wpcm450/superio.c
M src/superio/renesas/m3885x/superio.c
M src/superio/serverengines/pilot/early_init.c
M src/superio/smsc/dme1737/dme1737.h
M src/superio/smsc/dme1737/superio.c
M src/superio/smsc/kbc1100/kbc1100.h
M src/superio/smsc/kbc1100/superio.c
M src/superio/smsc/lpc47b272/lpc47b272.h
M src/superio/smsc/lpc47b272/superio.c
M src/superio/smsc/lpc47b397/lpc47b397.h
M src/superio/smsc/lpc47b397/superio.c
M src/superio/smsc/lpc47m10x/lpc47m10x.h
M src/superio/smsc/lpc47m10x/superio.c
M src/superio/smsc/lpc47m15x/lpc47m15x.h
M src/superio/smsc/lpc47m15x/superio.c
M src/superio/smsc/lpc47n207/lpc47n207.h
M src/superio/smsc/lpc47n217/lpc47n217.h
M src/superio/smsc/lpc47n227/superio.c
M src/superio/smsc/mec1308/superio.c
M src/superio/smsc/sch4037/superio.c
M src/superio/smsc/sio1036/sio1036.h
M src/superio/smsc/sio1036/superio.c
M src/superio/smsc/smscsuperio/smscsuperio.h
M src/superio/smsc/smscsuperio/superio.c
M src/superio/winbond/common/winbond.h
M src/superio/winbond/w83627dhg/superio.c
M src/superio/winbond/w83627dhg/w83627dhg.h
M src/superio/winbond/w83627ehg/superio.c
M src/superio/winbond/w83627hf/superio.c
M src/superio/winbond/w83627thg/superio.c
M src/superio/winbond/w83627thg/w83627thg.h
M src/superio/winbond/w83627uhg/superio.c
M src/superio/winbond/w83667hg-a/superio.c
M src/superio/winbond/w83977tf/superio.c
M src/superio/winbond/wpcd376i/early_serial.c
M src/superio/winbond/wpcd376i/superio.c
M src/superio/winbond/wpcd376i/wpcd376i.h
599 files changed, 8 insertions(+), 591 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/29307/1
diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c
index 935f778..57a9967 100644
--- a/src/arch/arm/armv7/mmu.c
+++ b/src/arch/arm/armv7/mmu.c
@@ -37,7 +37,6 @@
#include <console/console.h>
#include <arch/cache.h>
-#include <arch/io.h>
#if IS_ENABLED(CONFIG_ARM_LPAE)
/* See B3.6.2 of ARMv7 Architecture Reference Manual */
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index 6bbeb59..72c3ecb 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -15,7 +15,6 @@
#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <cpu/cpu.h>
-#include <arch/io.h>
#include <string.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/lapic.h>
diff --git a/src/console/die.c b/src/console/die.c
index aedf66e..769e651 100644
--- a/src/console/die.c
+++ b/src/console/die.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <halt.h>
diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c
index 54fdaf5..94ea245 100644
--- a/src/cpu/amd/family_10h-family_15h/ram_calc.c
+++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c
@@ -18,7 +18,6 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/cpu/amd/geode_lx/cpubug.c b/src/cpu/amd/geode_lx/cpubug.c
index 7e7d81b..493b015 100644
--- a/src/cpu/amd/geode_lx/cpubug.c
+++ b/src/cpu/amd/geode_lx/cpubug.c
@@ -17,7 +17,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <stdlib.h>
diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c
index 7af8808..a85991f 100644
--- a/src/cpu/amd/smm/smm_init.c
+++ b/src/cpu/amd/smm/smm_init.c
@@ -15,7 +15,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8c65dae..f77c40f 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -27,7 +27,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <cbmem.h>
diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c
index e6a12ce..28cbdd4 100644
--- a/src/cpu/x86/lapic/apic_timer.c
+++ b/src/cpu/x86/lapic/apic_timer.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <delay.h>
#include <thread.h>
-#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/early_variables.h>
#include <cpu/x86/msr.h>
diff --git a/src/device/device.c b/src/device/device.c
index 7836af1..527298c 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -39,7 +39,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
diff --git a/src/device/oprom/realmode/x86_interrupts.c b/src/device/oprom/realmode/x86_interrupts.c
index 7ec77f8..94983cc 100644
--- a/src/device/oprom/realmode/x86_interrupts.c
+++ b/src/device/oprom/realmode/x86_interrupts.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/registers.h>
#include <console/console.h>
#include <device/pci.h>
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index e35c22c..74598ba 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -32,7 +32,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <bootmode.h>
#include <console/console.h>
#include <stdlib.h>
diff --git a/src/device/pci_early.c b/src/device/pci_early.c
index 6baebe0..58e9085 100644
--- a/src/device/pci_early.c
+++ b/src/device/pci_early.c
@@ -15,7 +15,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <delay.h>
diff --git a/src/drivers/elog/gsmi.c b/src/drivers/elog/gsmi.c
index 5ecb2c5..9f676cb 100644
--- a/src/drivers/elog/gsmi.c
+++ b/src/drivers/elog/gsmi.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <elog.h>
diff --git a/src/drivers/emulation/qemu/cirrus.c b/src/drivers/emulation/qemu/cirrus.c
index 61b329d..ede0232 100644
--- a/src/drivers/emulation/qemu/cirrus.c
+++ b/src/drivers/emulation/qemu/cirrus.c
@@ -19,7 +19,6 @@
#include <edid.h>
#include <stdlib.h>
#include <string.h>
-#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h>
diff --git a/src/drivers/i2c/at24rf08c/at24rf08c.c b/src/drivers/i2c/at24rf08c/at24rf08c.c
index 4918630..f20678c 100644
--- a/src/drivers/i2c/at24rf08c/at24rf08c.c
+++ b/src/drivers/i2c/at24rf08c/at24rf08c.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/smbus.h>
#include <smbios.h>
diff --git a/src/drivers/i2c/at24rf08c/lenovo_serials.c b/src/drivers/i2c/at24rf08c/lenovo_serials.c
index 0209bb2..60b12ce 100644
--- a/src/drivers/i2c/at24rf08c/lenovo_serials.c
+++ b/src/drivers/i2c/at24rf08c/lenovo_serials.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <string.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/smbus.h>
#include <smbios.h>
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index e1910e6..c8f8579 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -16,7 +16,6 @@
#include <stddef.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <assert.h>
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 5eeea29..9e759a1 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -12,7 +12,6 @@
*/
#include <security/vboot/antirollback.h>
-#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/symbols.h>
#include <assert.h>
diff --git a/src/drivers/intel/fsp2_0/temp_ram_exit.c b/src/drivers/intel/fsp2_0/temp_ram_exit.c
index 6b3a999..ceb30fd 100644
--- a/src/drivers/intel/fsp2_0/temp_ram_exit.c
+++ b/src/drivers/intel/fsp2_0/temp_ram_exit.c
@@ -9,7 +9,6 @@
* (at your option) any later version.
*/
-#include <arch/io.h>
#include <arch/cpu.h>
#include <console/console.h>
#include <fsp/api.h>
diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c
index 93aa87d..22c0403 100644
--- a/src/drivers/intel/gma/intel_ddi.c
+++ b/src/drivers/intel/gma/intel_ddi.c
@@ -35,7 +35,6 @@
#include <delay.h>
#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <smbios.h>
diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c
index c908eb4..90e0e63 100644
--- a/src/drivers/intel/gma/vbt.c
+++ b/src/drivers/intel/gma/vbt.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/drivers/maxim/max77686/max77686.c b/src/drivers/maxim/max77686/max77686.c
index f1ee32f..212fbe7 100644
--- a/src/drivers/maxim/max77686/max77686.c
+++ b/src/drivers/maxim/max77686/max77686.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/i2c_simple.h>
#include "max77686.h"
diff --git a/src/drivers/ricoh/rce822/rce822.c b/src/drivers/ricoh/rce822/rce822.c
index 297dd61..00af981 100644
--- a/src/drivers/ricoh/rce822/rce822.c
+++ b/src/drivers/ricoh/rce822/rce822.c
@@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include "chip.h"
static void rce822_enable(struct device *dev)
diff --git a/src/drivers/sil/3114/sil_sata.c b/src/drivers/sil/3114/sil_sata.c
index 3c56266..a008cba 100644
--- a/src/drivers/sil/3114/sil_sata.c
+++ b/src/drivers/sil/3114/sil_sata.c
@@ -17,7 +17,6 @@
#include <delay.h>
#include <stdlib.h>
#include <string.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c
index 42f7966..ac5f54b 100644
--- a/src/drivers/uart/oxpcie_early.c
+++ b/src/drivers/uart/oxpcie_early.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
-#include <arch/io.h>
#include <arch/early_variables.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h>
diff --git a/src/drivers/xgi/common/xgi_coreboot.c b/src/drivers/xgi/common/xgi_coreboot.c
index 47320fd..a9b5bd3 100644
--- a/src/drivers/xgi/common/xgi_coreboot.c
+++ b/src/drivers/xgi/common/xgi_coreboot.c
@@ -18,7 +18,6 @@
#include <delay.h>
#include <stdlib.h>
#include <string.h>
-#include <arch/io.h>
#include <vbe.h>
#include <console/console.h>
diff --git a/src/drivers/xgi/common/xgi_coreboot.h b/src/drivers/xgi/common/xgi_coreboot.h
index b9332e8..3da333f 100644
--- a/src/drivers/xgi/common/xgi_coreboot.h
+++ b/src/drivers/xgi/common/xgi_coreboot.h
@@ -23,7 +23,6 @@
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/drivers/xgi/z9s/z9s.c b/src/drivers/xgi/z9s/z9s.c
index 94b4f26..72c5d7c 100644
--- a/src/drivers/xgi/z9s/z9s.c
+++ b/src/drivers/xgi/z9s/z9s.c
@@ -15,7 +15,6 @@
#include <delay.h>
#include <stdlib.h>
#include <string.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/ec/google/chromeec/crosec_proto.c b/src/ec/google/chromeec/crosec_proto.c
index 2043347..928cc6c 100644
--- a/src/ec/google/chromeec/crosec_proto.c
+++ b/src/ec/google/chromeec/crosec_proto.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <stdint.h>
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 75d9da1..9ca05c8 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -18,7 +18,6 @@
#include <cbmem.h>
#include <console/console.h>
#include <arch/early_variables.h>
-#include <arch/io.h>
#include <assert.h>
#include <bootmode.h>
#include <bootstate.h>
diff --git a/src/ec/google/chromeec/ec_i2c.c b/src/ec/google/chromeec/ec_i2c.c
index 22b491a..7770d60 100644
--- a/src/ec/google/chromeec/ec_i2c.c
+++ b/src/ec/google/chromeec/ec_i2c.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c_simple.h>
diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c
index 1f1655d..010c441 100644
--- a/src/ec/lenovo/h8/h8.c
+++ b/src/ec/lenovo/h8/h8.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h
index 53aad97..7b6164d 100644
--- a/src/include/device/azalia_device.h
+++ b/src/include/device/azalia_device.h
@@ -20,7 +20,6 @@
#include <string.h>
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <device/device.h>
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 6713c94..85a07d4 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -20,7 +20,6 @@
#ifndef __SIMPLE_DEVICE__
typedef struct device *device_t;
#endif
-#include <arch/io.h>
struct pci_operations;
struct pci_bus_operations;
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index f1ab91b..e479e1a 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -20,7 +20,6 @@
#include <stdint.h>
#include <stddef.h>
#include <rules.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/resource.h>
#include <device/device.h>
diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h
index 9d18bcc..3084530 100644
--- a/src/include/device/pci_ehci.h
+++ b/src/include/device/pci_ehci.h
@@ -17,7 +17,6 @@
#ifndef _PCI_EHCI_H_
#define _PCI_EHCI_H_
-#include <arch/io.h>
#include <device/device.h>
#define EHCI_BAR_INDEX 0x10
diff --git a/src/include/reg_script.h b/src/include/reg_script.h
index 116dd92..6763835 100644
--- a/src/include/reg_script.h
+++ b/src/include/reg_script.h
@@ -17,7 +17,6 @@
#define REG_SCRIPT_H
#include <stdint.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/resource.h>
diff --git a/src/lib/edid.c b/src/lib/edid.c
index fbd8ef6..d9c900d 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -31,7 +31,6 @@
#include <assert.h>
#include <stddef.h>
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
diff --git a/src/mainboard/advansus/a785e-i/mainboard.c b/src/mainboard/advansus/a785e-i/mainboard.c
index 4b9f581..d6372aa 100644
--- a/src/mainboard/advansus/a785e-i/mainboard.c
+++ b/src/mainboard/advansus/a785e-i/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <southbridge/amd/common/amd_defs.h>
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index 2a0a1d9..95a582b 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -23,7 +23,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c
index 5a06fe7..9e83359 100644
--- a/src/mainboard/amd/bettong/mptable.c
+++ b/src/mainboard/amd/bettong/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c
index 6372c4b..c8b4f63 100644
--- a/src/mainboard/amd/bimini_fam10/mainboard.c
+++ b/src/mainboard/amd/bimini_fam10/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/common/amd_defs.h>
#include <southbridge/amd/sb800/sb800.h>
diff --git a/src/mainboard/amd/db-ft3b-lc/mainboard.c b/src/mainboard/amd/db-ft3b-lc/mainboard.c
index 991b243..d5ae995 100644
--- a/src/mainboard/amd/db-ft3b-lc/mainboard.c
+++ b/src/mainboard/amd/db-ft3b-lc/mainboard.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/amd/db-ft3b-lc/mptable.c b/src/mainboard/amd/db-ft3b-lc/mptable.c
index ebe20ac..13bbdd4 100644
--- a/src/mainboard/amd/db-ft3b-lc/mptable.c
+++ b/src/mainboard/amd/db-ft3b-lc/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/amd/gardenia/mptable.c b/src/mainboard/amd/gardenia/mptable.c
index 860bb5a..1f623e6 100644
--- a/src/mainboard/amd/gardenia/mptable.c
+++ b/src/mainboard/amd/gardenia/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/amd/lamar/mainboard.c b/src/mainboard/amd/lamar/mainboard.c
index 94e680b..08d21c8 100644
--- a/src/mainboard/amd/lamar/mainboard.c
+++ b/src/mainboard/amd/lamar/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
diff --git a/src/mainboard/amd/lamar/mptable.c b/src/mainboard/amd/lamar/mptable.c
index 7cc635c..edd8eb9 100644
--- a/src/mainboard/amd/lamar/mptable.c
+++ b/src/mainboard/amd/lamar/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 9c357f9..f319a25 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index 4a244eb..299060b 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/olivehillplus/mainboard.c b/src/mainboard/amd/olivehillplus/mainboard.c
index 1e8d723..45841f9 100644
--- a/src/mainboard/amd/olivehillplus/mainboard.c
+++ b/src/mainboard/amd/olivehillplus/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 1736d48..f2d3772 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/cpu.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c
index d153c79..66387c1 100644
--- a/src/mainboard/amd/persimmon/mptable.c
+++ b/src/mainboard/amd/persimmon/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index 543b775..b98d851 100644
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/amd/tilapia_fam10/mptable.c
+++ b/src/mainboard/amd/tilapia_fam10/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 0e60fc5..32c2e2d 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -23,7 +23,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/torpedo/acpi_tables.c b/src/mainboard/amd/torpedo/acpi_tables.c
index 4e2c454..e2e8304 100644
--- a/src/mainboard/amd/torpedo/acpi_tables.c
+++ b/src/mainboard/amd/torpedo/acpi_tables.c
@@ -17,7 +17,6 @@
#include <string.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
-#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c
index d18c2ad..b2ae343 100644
--- a/src/mainboard/aopen/dxplplusu/romstage.c
+++ b/src/mainboard/aopen/dxplplusu/romstage.c
@@ -15,7 +15,6 @@
#include <stdint.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <arch/cpu.h>
#include <stdlib.h>
#include <cbmem.h>
diff --git a/src/mainboard/apple/macbook21/smihandler.c b/src/mainboard/apple/macbook21/smihandler.c
index 93920f2..c3598fa 100644
--- a/src/mainboard/apple/macbook21/smihandler.c
+++ b/src/mainboard/apple/macbook21/smihandler.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
diff --git a/src/mainboard/apple/macbookair4_2/early_southbridge.c b/src/mainboard/apple/macbookair4_2/early_southbridge.c
index d189ae2..43cb675 100644
--- a/src/mainboard/apple/macbookair4_2/early_southbridge.c
+++ b/src/mainboard/apple/macbookair4_2/early_southbridge.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <lib.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/asus/am1i-a/mptable.c b/src/mainboard/asus/am1i-a/mptable.c
index 82be639..0519911 100644
--- a/src/mainboard/asus/am1i-a/mptable.c
+++ b/src/mainboard/asus/am1i-a/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/asus/kcma-d8/bootblock.c b/src/mainboard/asus/kcma-d8/bootblock.c
index 4e8a790..becfd26 100644
--- a/src/mainboard/asus/kcma-d8/bootblock.c
+++ b/src/mainboard/asus/kcma-d8/bootblock.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <pc80/mc146818rtc.h>
void bootblock_mainboard_init(void)
diff --git a/src/mainboard/asus/kcma-d8/mptable.c b/src/mainboard/asus/kcma-d8/mptable.c
index 4bdb21e..5108a93 100644
--- a/src/mainboard/asus/kcma-d8/mptable.c
+++ b/src/mainboard/asus/kcma-d8/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/kfsn4-dre/acpi_tables.c b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
index 6c4a02a..c17d445 100644
--- a/src/mainboard/asus/kfsn4-dre/acpi_tables.c
+++ b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
@@ -24,7 +24,6 @@
#include <string.h>
#include <assert.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index a6fd8b2..8d2a83e 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -25,7 +25,6 @@
#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/kgpe-d16/bootblock.c b/src/mainboard/asus/kgpe-d16/bootblock.c
index 4e8a790..becfd26 100644
--- a/src/mainboard/asus/kgpe-d16/bootblock.c
+++ b/src/mainboard/asus/kgpe-d16/bootblock.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <pc80/mc146818rtc.h>
void bootblock_mainboard_init(void)
diff --git a/src/mainboard/asus/kgpe-d16/mptable.c b/src/mainboard/asus/kgpe-d16/mptable.c
index afde757..fe5b5ec 100644
--- a/src/mainboard/asus/kgpe-d16/mptable.c
+++ b/src/mainboard/asus/kgpe-d16/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c
index b39f9db..939b3e9 100644
--- a/src/mainboard/asus/m4a78-em/mainboard.c
+++ b/src/mainboard/asus/m4a78-em/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/asus/m4a78-em/mptable.c b/src/mainboard/asus/m4a78-em/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/asus/m4a78-em/mptable.c
+++ b/src/mainboard/asus/m4a78-em/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 4320525..7fd4323 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -24,7 +24,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c
index 0a0eedd..67a504e 100644
--- a/src/mainboard/asus/m4a785-m/mainboard.c
+++ b/src/mainboard/asus/m4a785-m/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/asus/m4a785-m/mptable.c b/src/mainboard/asus/m4a785-m/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/asus/m4a785-m/mptable.c
+++ b/src/mainboard/asus/m4a785-m/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 44d8d51..230ec76 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m5a88-v/mainboard.c b/src/mainboard/asus/m5a88-v/mainboard.c
index 2eef74f..ee8ce5e 100644
--- a/src/mainboard/asus/m5a88-v/mainboard.c
+++ b/src/mainboard/asus/m5a88-v/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
#include <southbridge/amd/rs780/rs780.h>
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 56e1541..1b793dd 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
index d32b6f9..2d092ce 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c
+++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/asus/p5qc/romstage.c b/src/mainboard/asus/p5qc/romstage.c
index eb534ca..ed5c908 100644
--- a/src/mainboard/asus/p5qc/romstage.c
+++ b/src/mainboard/asus/p5qc/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/asus/p8h61-m_lx/romstage.c b/src/mainboard/asus/p8h61-m_lx/romstage.c
index 76fc8aa..09ca7db 100644
--- a/src/mainboard/asus/p8h61-m_lx/romstage.c
+++ b/src/mainboard/asus/p8h61-m_lx/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/avalue/eax-785e/mainboard.c b/src/mainboard/avalue/eax-785e/mainboard.c
index 6753633..45779dd 100644
--- a/src/mainboard/avalue/eax-785e/mainboard.c
+++ b/src/mainboard/avalue/eax-785e/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <southbridge/amd/common/amd_defs.h>
#include <device/pci_def.h>
#include <southbridge/amd/rs780/rs780.h>
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index e9e865e..c241210 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -23,7 +23,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/bap/ode_e20XX/mptable.c b/src/mainboard/bap/ode_e20XX/mptable.c
index 42d8431..23bc588 100644
--- a/src/mainboard/bap/ode_e20XX/mptable.c
+++ b/src/mainboard/bap/ode_e20XX/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/bap/ode_e21XX/mainboard.c b/src/mainboard/bap/ode_e21XX/mainboard.c
index 1e8d723..45841f9 100644
--- a/src/mainboard/bap/ode_e21XX/mainboard.c
+++ b/src/mainboard/bap/ode_e21XX/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
diff --git a/src/mainboard/biostar/am1ml/mptable.c b/src/mainboard/biostar/am1ml/mptable.c
index dcf4321..10cfaa8 100644
--- a/src/mainboard/biostar/am1ml/mptable.c
+++ b/src/mainboard/biostar/am1ml/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/elmex/pcm205400/mptable.c b/src/mainboard/elmex/pcm205400/mptable.c
index d153c79..66387c1 100644
--- a/src/mainboard/elmex/pcm205400/mptable.c
+++ b/src/mainboard/elmex/pcm205400/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
diff --git a/src/mainboard/emulation/qemu-i440fx/mainboard.c b/src/mainboard/emulation/qemu-i440fx/mainboard.c
index b2439bb..2d3cb8f 100644
--- a/src/mainboard/emulation/qemu-i440fx/mainboard.c
+++ b/src/mainboard/emulation/qemu-i440fx/mainboard.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
static const unsigned char qemu_i440fx_irqs[] = {
11, 10, 10, 11,
diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c
index ce12a8b..7bb1cb0 100644
--- a/src/mainboard/emulation/qemu-i440fx/romstage.c
+++ b/src/mainboard/emulation/qemu-i440fx/romstage.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c
index 508d679..9548b7c 100644
--- a/src/mainboard/emulation/qemu-power8/uart.c
+++ b/src/mainboard/emulation/qemu-power8/uart.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <console/uart.h>
-#include <arch/io.h>
#include <boot/coreboot_tables.h>
static uint8_t *buf = (void *)0;
diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c
index 3625cf9..81de573 100644
--- a/src/mainboard/emulation/qemu-q35/bootblock.c
+++ b/src/mainboard/emulation/qemu-q35/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just define these here, there is no gm35.h file to include. */
#define D0F0_PCIEXBAR_LO 0x60
diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c
index 9b93751..7e358fe 100644
--- a/src/mainboard/emulation/qemu-q35/mainboard.c
+++ b/src/mainboard/emulation/qemu-q35/mainboard.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <console/console.h>
#include <drivers/intel/gma/i915.h>
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index 870dd07..dc2c586 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
diff --git a/src/mainboard/emulation/qemu-riscv/uart.c b/src/mainboard/emulation/qemu-riscv/uart.c
index 730ef3e..1a61120 100644
--- a/src/mainboard/emulation/qemu-riscv/uart.c
+++ b/src/mainboard/emulation/qemu-riscv/uart.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <console/uart.h>
-#include <arch/io.h>
#include <boot/coreboot_tables.h>
static uint8_t *buf = (void *)0x3f8;
diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c
index 26ab630..eeb0b57 100644
--- a/src/mainboard/emulation/spike-riscv/uart.c
+++ b/src/mainboard/emulation/spike-riscv/uart.c
@@ -15,7 +15,6 @@
#include <types.h>
#include <console/uart.h>
-#include <arch/io.h>
#include <boot/coreboot_tables.h>
uintptr_t uart_platform_base(int idx)
diff --git a/src/mainboard/getac/p470/mainboard.c b/src/mainboard/getac/p470/mainboard.c
index 140423e..71248ef 100644
--- a/src/mainboard/getac/p470/mainboard.c
+++ b/src/mainboard/getac/p470/mainboard.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <delay.h>
#include <drivers/intel/gma/int15.h>
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index 49a25af..286a731 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -18,7 +18,6 @@
#include <stdint.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
index 13c888e..83a2f86 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stdlib.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <console/console.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c
index 4c9799a5..a976d42 100644
--- a/src/mainboard/gigabyte/ma785gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gm/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma785gm/mptable.c b/src/mainboard/gigabyte/ma785gm/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/gigabyte/ma785gm/mptable.c
+++ b/src/mainboard/gigabyte/ma785gm/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index 7b30452..a2d1ad2 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c
index a0e9631..f950481 100644
--- a/src/mainboard/gigabyte/ma785gmt/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/gigabyte/ma785gmt/mptable.c
+++ b/src/mainboard/gigabyte/ma785gmt/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index fef31f7..68c7274 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c
index 6b0e229..cfbec0b 100644
--- a/src/mainboard/gigabyte/ma78gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma78gm/mainboard.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/gigabyte/ma78gm/mptable.c
+++ b/src/mainboard/gigabyte/ma78gm/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index c09b170..53831a6 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -24,7 +24,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gizmosphere/gizmo2/mptable.c b/src/mainboard/gizmosphere/gizmo2/mptable.c
index 42d8431..23bc588 100644
--- a/src/mainboard/gizmosphere/gizmo2/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo2/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/google/auron/variant.h b/src/mainboard/google/auron/variant.h
index 9c27a9a6..e5f5f04 100644
--- a/src/mainboard/google/auron/variant.h
+++ b/src/mainboard/google/auron/variant.h
@@ -14,7 +14,6 @@
#ifndef VARIANT_H
#define VARIANT_H
-#include <arch/io.h>
#include <device/device.h>
#include <soc/romstage.h>
diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c
index ad4eab9..c412981 100644
--- a/src/mainboard/google/beltino/chromeos.c
+++ b/src/mainboard/google/beltino/chromeos.c
@@ -14,7 +14,6 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <bootmode.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c
index 3d9324d..e74808c 100644
--- a/src/mainboard/google/beltino/smihandler.c
+++ b/src/mainboard/google/beltino/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/intel/haswell/haswell.h>
#include <cpu/x86/smm.h>
diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c
index 7a74ed5..6103cc6 100644
--- a/src/mainboard/google/butterfly/chromeos.c
+++ b/src/mainboard/google/butterfly/chromeos.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/butterfly/mainboard_smi.c b/src/mainboard/google/butterfly/mainboard_smi.c
index 03e0316..cd669c9 100644
--- a/src/mainboard/google/butterfly/mainboard_smi.c
+++ b/src/mainboard/google/butterfly/mainboard_smi.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index d68a46c..21ffdbf 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/google/eve/smihandler.c b/src/mainboard/google/eve/smihandler.c
index e449900..7b97446 100644
--- a/src/mainboard/google/eve/smihandler.c
+++ b/src/mainboard/google/eve/smihandler.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <ec/google/chromeec/smm.h>
#include <gpio.h>
diff --git a/src/mainboard/google/foster/mainboard.c b/src/mainboard/google/foster/mainboard.c
index 3c2d831..d3091ad 100644
--- a/src/mainboard/google/foster/mainboard.c
+++ b/src/mainboard/google/foster/mainboard.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/mmu.h>
#include <boot/coreboot_tables.h>
#include <delay.h>
diff --git a/src/mainboard/google/foster/reset.c b/src/mainboard/google/foster/reset.c
index b30e1ac..60e8133 100644
--- a/src/mainboard/google/foster/reset.c
+++ b/src/mainboard/google/foster/reset.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <gpio.h>
#include <reset.h>
diff --git a/src/mainboard/google/glados/smihandler.c b/src/mainboard/google/glados/smihandler.c
index dd2c448..5296b0f 100644
--- a/src/mainboard/google/glados/smihandler.c
+++ b/src/mainboard/google/glados/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <baseboard/variant.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c
index 2091c36..e67f0ec 100644
--- a/src/mainboard/google/gru/sdram_configs.c
+++ b/src/mainboard/google/gru/sdram_configs.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <boardid.h>
#include <cbfs.h>
#include <console/console.h>
diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index c7925fd..5804db8 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -14,7 +14,6 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c
index 8243354..70fcb97 100644
--- a/src/mainboard/google/jecht/smihandler.c
+++ b/src/mainboard/google/jecht/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <soc/pm.h>
diff --git a/src/mainboard/google/kahlee/mptable.c b/src/mainboard/google/kahlee/mptable.c
index 860bb5a..1f623e6 100644
--- a/src/mainboard/google/kahlee/mptable.c
+++ b/src/mainboard/google/kahlee/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c
index 0bd164e..f2b5500 100644
--- a/src/mainboard/google/link/mainboard_smi.c
+++ b/src/mainboard/google/link/mainboard_smi.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 495c80e..ef5a3ce 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index b96917e..07f3f54 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -16,7 +16,6 @@
#include <arch/cache.h>
#include <arch/cpu.h>
#include <arch/exception.h>
-#include <arch/io.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index b96917e..07f3f54 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -16,7 +16,6 @@
#include <arch/cache.h>
#include <arch/cpu.h>
#include <arch/exception.h>
-#include <arch/io.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index cc8f90e..92fe56f 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -16,7 +16,6 @@
#include <arch/cache.h>
#include <arch/cpu.h>
#include <arch/exception.h>
-#include <arch/io.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c
index 9cba3b4..760cb38 100644
--- a/src/mainboard/google/oak/bootblock.c
+++ b/src/mainboard/google/oak/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <boardid.h>
#include <bootblock_common.h>
#include <delay.h>
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c
index 2510a65..7ffa746 100644
--- a/src/mainboard/google/oak/mainboard.c
+++ b/src/mainboard/google/oak/mainboard.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <arch/io.h>
#include <boardid.h>
#include <boot/coreboot_tables.h>
#include <bootmode.h>
diff --git a/src/mainboard/google/octopus/ec.c b/src/mainboard/google/octopus/ec.c
index 8ed862c..c422305 100644
--- a/src/mainboard/google/octopus/ec.c
+++ b/src/mainboard/google/octopus/ec.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c
index b82efba..1922b87 100644
--- a/src/mainboard/google/parrot/chromeos.c
+++ b/src/mainboard/google/parrot/chromeos.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/parrot/ec.c b/src/mainboard/google/parrot/ec.c
index d75cc29..623c0bc 100644
--- a/src/mainboard/google/parrot/ec.c
+++ b/src/mainboard/google/parrot/ec.c
@@ -17,7 +17,6 @@
#include <types.h>
#include <console/console.h>
#include <device/device.h>
-#include <arch/io.h>
#include <ec/compal/ene932/ec.h>
#include "ec.h"
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 163f4c3..6be38166 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c
index e30f78f..e49dfce 100644
--- a/src/mainboard/google/parrot/smihandler.c
+++ b/src/mainboard/google/parrot/smihandler.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c
index 641b4de..6802de9 100644
--- a/src/mainboard/google/rambi/mainboard.c
+++ b/src/mainboard/google/rambi/mainboard.c
@@ -24,7 +24,6 @@
#include <x86emu/x86emu.h>
#endif
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <smbios.h>
diff --git a/src/mainboard/google/smaug/reset.c b/src/mainboard/google/smaug/reset.c
index 121cf64..1d96343 100644
--- a/src/mainboard/google/smaug/reset.c
+++ b/src/mainboard/google/smaug/reset.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <reset.h>
#include "gpio.h"
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index 6d77a2a..4e1a8f4 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c
index 229f919..6c89508 100644
--- a/src/mainboard/google/stout/ec.c
+++ b/src/mainboard/google/stout/ec.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <bootmode.h>
#include <types.h>
#include <console/console.h>
diff --git a/src/mainboard/google/stout/mainboard.c b/src/mainboard/google/stout/mainboard.c
index d2925a8..71862c6 100644
--- a/src/mainboard/google/stout/mainboard.c
+++ b/src/mainboard/google/stout/mainboard.c
@@ -22,7 +22,6 @@
#include <console/console.h>
#include <drivers/intel/gma/int15.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include "onboard.h"
diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c
index 6a51645..e0969f4 100644
--- a/src/mainboard/google/stout/mainboard_smi.c
+++ b/src/mainboard/google/stout/mainboard_smi.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index d56dfd4..b79479b 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/google/urara/mainboard.c b/src/mainboard/google/urara/mainboard.c
index b5c1b7d..20429ca 100644
--- a/src/mainboard/google/urara/mainboard.c
+++ b/src/mainboard/google/urara/mainboard.c
@@ -13,7 +13,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <symbols.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/mainboard/google/veyron/sdram_configs.c b/src/mainboard/google/veyron/sdram_configs.c
index 88c0a69..55b87c7 100644
--- a/src/mainboard/google/veyron/sdram_configs.c
+++ b/src/mainboard/google/veyron/sdram_configs.c
@@ -12,7 +12,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c
index 88c0a69..55b87c7 100644
--- a/src/mainboard/google/veyron_mickey/sdram_configs.c
+++ b/src/mainboard/google/veyron_mickey/sdram_configs.c
@@ -12,7 +12,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
diff --git a/src/mainboard/google/veyron_rialto/sdram_configs.c b/src/mainboard/google/veyron_rialto/sdram_configs.c
index eba7a39..590b051 100644
--- a/src/mainboard/google/veyron_rialto/sdram_configs.c
+++ b/src/mainboard/google/veyron_rialto/sdram_configs.c
@@ -12,7 +12,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c
index b2095b9..21c1a83 100644
--- a/src/mainboard/hp/2570p/romstage.c
+++ b/src/mainboard/hp/2570p/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c
index c6d9a7c..20613e4 100644
--- a/src/mainboard/hp/2760p/romstage.c
+++ b/src/mainboard/hp/2760p/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index b97d5e4..89d267b 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c
index bb9298c..44697ac 100644
--- a/src/mainboard/hp/8470p/romstage.c
+++ b/src/mainboard/hp/8470p/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c
index 75c2db0..3214b46 100644
--- a/src/mainboard/hp/8770w/romstage.c
+++ b/src/mainboard/hp/8770w/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
index 2197f2d..a52106c 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
+++ b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
@@ -18,7 +18,6 @@
#include <stdint.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <superio/nuvoton/npcd378/npcd378.h>
diff --git a/src/mainboard/hp/folio_9470m/romstage.c b/src/mainboard/hp/folio_9470m/romstage.c
index 1994c4f..2dca35e 100644
--- a/src/mainboard/hp/folio_9470m/romstage.c
+++ b/src/mainboard/hp/folio_9470m/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
index d7f0771..da450c6 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
@@ -16,7 +16,6 @@
#include "ec.h"
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c
index c70660a..126e30f 100644
--- a/src/mainboard/hp/revolve_810_g1/romstage.c
+++ b/src/mainboard/hp/revolve_810_g1/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <cbfs.h>
#include <console/console.h>
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/iei/kino-780am2-fam10/mainboard.c b/src/mainboard/iei/kino-780am2-fam10/mainboard.c
index ad1fdd5..c602c82 100644
--- a/src/mainboard/iei/kino-780am2-fam10/mainboard.c
+++ b/src/mainboard/iei/kino-780am2-fam10/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/iei/kino-780am2-fam10/mptable.c b/src/mainboard/iei/kino-780am2-fam10/mptable.c
index 379f04a..4ced7d6 100644
--- a/src/mainboard/iei/kino-780am2-fam10/mptable.c
+++ b/src/mainboard/iei/kino-780am2-fam10/mptable.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index b4612ee..e4f89c0 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -24,7 +24,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/intel/bayleybay_fsp/mainboard.c b/src/mainboard/intel/bayleybay_fsp/mainboard.c
index 0330d82..00f5f5d 100644
--- a/src/mainboard/intel/bayleybay_fsp/mainboard.c
+++ b/src/mainboard/intel/bayleybay_fsp/mainboard.c
@@ -23,7 +23,6 @@
#include <x86emu/x86emu.h>
#endif
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index 199a15e..9db599b 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -17,7 +17,6 @@
#include <stddef.h>
#include <arch/cpu.h>
#include <lib.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/stages.h>
#include <console/console.h>
diff --git a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
index c5db452..e73da8d 100644
--- a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
+++ b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
@@ -23,7 +23,6 @@
#include <x86emu/x86emu.h>
#endif
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c
index 0f05351..d5f6dae 100644
--- a/src/mainboard/intel/cannonlake_rvp/smihandler.c
+++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <intelblocks/smihandler.h>
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 57f32c2..e39a6db 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <timestamp.h>
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c
index 36aa149..37bd9bf 100644
--- a/src/mainboard/intel/dg43gt/romstage.c
+++ b/src/mainboard/intel/dg43gt/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/intel/emeraldlake2/mainboard.c b/src/mainboard/intel/emeraldlake2/mainboard.c
index d5a4356..c57bd6f 100644
--- a/src/mainboard/intel/emeraldlake2/mainboard.c
+++ b/src/mainboard/intel/emeraldlake2/mainboard.c
@@ -21,7 +21,6 @@
#include <device/pci_ops.h>
#include <drivers/intel/gma/int15.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/intel/galileo/gpio.c b/src/mainboard/intel/galileo/gpio.c
index cee673d..1791ee3 100644
--- a/src/mainboard/intel/galileo/gpio.c
+++ b/src/mainboard/intel/galileo/gpio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <soc/car.h>
#include <soc/ramstage.h>
diff --git a/src/mainboard/intel/galileo/reg_access.c b/src/mainboard/intel/galileo/reg_access.c
index cff69ab..7aca458 100644
--- a/src/mainboard/intel/galileo/reg_access.c
+++ b/src/mainboard/intel/galileo/reg_access.c
@@ -16,7 +16,6 @@
#define __SIMPLE_DEVICE__
#include <assert.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/i2c_simple.h>
#include <soc/pci_devs.h>
diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c
index 4bd802a..07d806e 100644
--- a/src/mainboard/intel/kblrvp/chromeos.c
+++ b/src/mainboard/intel/kblrvp/chromeos.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/intel/kblrvp/smihandler.c b/src/mainboard/intel/kblrvp/smihandler.c
index 6006767..a12a460 100644
--- a/src/mainboard/intel/kblrvp/smihandler.c
+++ b/src/mainboard/intel/kblrvp/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <elog.h>
diff --git a/src/mainboard/intel/kunimitsu/smihandler.c b/src/mainboard/intel/kunimitsu/smihandler.c
index 24a5b96..64cc34b 100644
--- a/src/mainboard/intel/kunimitsu/smihandler.c
+++ b/src/mainboard/intel/kunimitsu/smihandler.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <elog.h>
diff --git a/src/mainboard/intel/stargo2/mainboard_smi.c b/src/mainboard/intel/stargo2/mainboard_smi.c
index 0e7e986..ab274c9 100644
--- a/src/mainboard/intel/stargo2/mainboard_smi.c
+++ b/src/mainboard/intel/stargo2/mainboard_smi.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/fsp_i89xx/nvs.h>
diff --git a/src/mainboard/intel/stargo2/romstage.c b/src/mainboard/intel/stargo2/romstage.c
index cdf087a..8db8d02 100644
--- a/src/mainboard/intel/stargo2/romstage.c
+++ b/src/mainboard/intel/stargo2/romstage.c
@@ -20,7 +20,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c
index fe98fd8..ad651f5 100644
--- a/src/mainboard/intel/wtm2/chromeos.c
+++ b/src/mainboard/intel/wtm2/chromeos.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <soc/gpio.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index a933f60..71b819e 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -16,7 +16,6 @@
*/
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c
index 066bd2e..d55fd8e 100644
--- a/src/mainboard/jetway/pa78vm5/mainboard.c
+++ b/src/mainboard/jetway/pa78vm5/mainboard.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/jetway/pa78vm5/mptable.c b/src/mainboard/jetway/pa78vm5/mptable.c
index 4311d67..75cbe95 100644
--- a/src/mainboard/jetway/pa78vm5/mptable.c
+++ b/src/mainboard/jetway/pa78vm5/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 28c3a5d..44696f7 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -25,7 +25,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 467606a..532d842 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -30,6 +30,7 @@
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627thg/w83627thg.h>
+#include <arch/io.h>
#include "option_table.h"
diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c
index 3a37290..32f23ba 100644
--- a/src/mainboard/kontron/ktqm77/mainboard.c
+++ b/src/mainboard/kontron/ktqm77/mainboard.c
@@ -26,7 +26,6 @@
#endif
#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c
index 9bfe54a..dce9cba 100644
--- a/src/mainboard/lenovo/l520/romstage.c
+++ b/src/mainboard/lenovo/l520/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/lenovo/s230u/mainboard.c b/src/mainboard/lenovo/s230u/mainboard.c
index 769fe3c..ea4b9b6 100644
--- a/src/mainboard/lenovo/s230u/mainboard.c
+++ b/src/mainboard/lenovo/s230u/mainboard.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <console/console.h>
#include <drivers/intel/gma/int15.h>
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c
index f4241db..c2c95d1 100644
--- a/src/mainboard/lenovo/s230u/romstage.c
+++ b/src/mainboard/lenovo/s230u/romstage.c
@@ -18,7 +18,6 @@
#include <cbfs.h>
#include <lib.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <console/console.h>
diff --git a/src/mainboard/lenovo/s230u/smihandler.c b/src/mainboard/lenovo/s230u/smihandler.c
index 4bd4d41..2f79243 100644
--- a/src/mainboard/lenovo/s230u/smihandler.c
+++ b/src/mainboard/lenovo/s230u/smihandler.c
@@ -18,7 +18,6 @@
#include "ec.h"
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <delay.h>
diff --git a/src/mainboard/lenovo/t400/acpi_tables.c b/src/mainboard/lenovo/t400/acpi_tables.c
index 2893d39..f7dc7c7 100644
--- a/src/mainboard/lenovo/t400/acpi_tables.c
+++ b/src/mainboard/lenovo/t400/acpi_tables.c
@@ -15,7 +15,6 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/mainboard/lenovo/t420/romstage.c b/src/mainboard/lenovo/t420/romstage.c
index aad8348..af27bf5 100644
--- a/src/mainboard/lenovo/t420/romstage.c
+++ b/src/mainboard/lenovo/t420/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c
index 8004e2f..7100667 100644
--- a/src/mainboard/lenovo/t420s/romstage.c
+++ b/src/mainboard/lenovo/t420s/romstage.c
@@ -16,7 +16,6 @@
*/
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t430/romstage.c b/src/mainboard/lenovo/t430/romstage.c
index 90d0886..30ef611 100644
--- a/src/mainboard/lenovo/t430/romstage.c
+++ b/src/mainboard/lenovo/t430/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c
index 203044e..b80671c 100644
--- a/src/mainboard/lenovo/t430s/romstage.c
+++ b/src/mainboard/lenovo/t430s/romstage.c
@@ -17,7 +17,6 @@
#include <option.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c
index c9a7f8e..3c810f8 100644
--- a/src/mainboard/lenovo/t520/romstage.c
+++ b/src/mainboard/lenovo/t520/romstage.c
@@ -20,7 +20,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c
index d7519ff..693d61b 100644
--- a/src/mainboard/lenovo/t530/romstage.c
+++ b/src/mainboard/lenovo/t530/romstage.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 43e0bd7..649e3cd 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index bd1c6a3..5e0aced 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -21,7 +21,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c
index 2893d39..f7dc7c7 100644
--- a/src/mainboard/lenovo/x200/acpi_tables.c
+++ b/src/mainboard/lenovo/x200/acpi_tables.c
@@ -15,7 +15,6 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index efe6dde..7eca1ce 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -20,7 +20,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index d0ff67e..ac80951 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -20,7 +20,6 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 4555bf9..0f7d471 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -22,7 +22,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index e482840..bda2d83 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -17,7 +17,6 @@
#include <stdlib.h>
#include <spd.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <console/console.h>
#include <lib.h>
diff --git a/src/mainboard/pcengines/alix2d/irq_tables.c b/src/mainboard/pcengines/alix2d/irq_tables.c
index 5b3ae20..81bb916 100644
--- a/src/mainboard/pcengines/alix2d/irq_tables.c
+++ b/src/mainboard/pcengines/alix2d/irq_tables.c
@@ -14,7 +14,6 @@
*/
#include <arch/pirq_routing.h>
-#include <arch/io.h>
#include <southbridge/amd/cs5536/cs5536.h>
/* Platform IRQs */
diff --git a/src/mainboard/pcengines/apu1/mptable.c b/src/mainboard/pcengines/apu1/mptable.c
index eacdc73..7bd1988 100644
--- a/src/mainboard/pcengines/apu1/mptable.c
+++ b/src/mainboard/pcengines/apu1/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c
index b673784..078eb59 100644
--- a/src/mainboard/roda/rk9/acpi_tables.c
+++ b/src/mainboard/roda/rk9/acpi_tables.c
@@ -15,7 +15,6 @@
*/
#include <string.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/mainboard/roda/rk9/smihandler.c b/src/mainboard/roda/rk9/smihandler.c
index 70aed98..72f1d35 100644
--- a/src/mainboard/roda/rk9/smihandler.c
+++ b/src/mainboard/roda/rk9/smihandler.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801ix/nvs.h>
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index 0f672b6..7869c50 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/samsung/lumpy/smihandler.c b/src/mainboard/samsung/lumpy/smihandler.c
index f2c2dc3..627a3a7 100644
--- a/src/mainboard/samsung/lumpy/smihandler.c
+++ b/src/mainboard/samsung/lumpy/smihandler.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index 9c34995..2228230 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -15,7 +15,6 @@
#include <string.h>
#include <bootmode.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index bb11761..5c9ddb7 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/samsung/stumpy/smihandler.c b/src/mainboard/samsung/stumpy/smihandler.c
index ad27bce..b78d938 100644
--- a/src/mainboard/samsung/stumpy/smihandler.c
+++ b/src/mainboard/samsung/stumpy/smihandler.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c
index da825a9..6c0bc3b 100644
--- a/src/mainboard/sapphire/pureplatinumh61/romstage.c
+++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <lib.h>
#include <arch/byteorder.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/siemens/mc_tcu3/mainboard.c b/src/mainboard/siemens/mc_tcu3/mainboard.c
index bd15af7..819782f 100644
--- a/src/mainboard/siemens/mc_tcu3/mainboard.c
+++ b/src/mainboard/siemens/mc_tcu3/mainboard.c
@@ -24,7 +24,6 @@
#include <x86emu/x86emu.h>
#endif
#include <arch/acpi.h>
-#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <hwilib.h>
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index ef07f7e..79a7d16 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -17,7 +17,6 @@
#include <stddef.h>
#include <arch/cpu.h>
#include <lib.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/stages.h>
#include <console/console.h>
diff --git a/src/mainboard/sifive/hifive-unleashed/mainboard.c b/src/mainboard/sifive/hifive-unleashed/mainboard.c
index baf44d4..2d62cd0 100644
--- a/src/mainboard/sifive/hifive-unleashed/mainboard.c
+++ b/src/mainboard/sifive/hifive-unleashed/mainboard.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <soc/sdram.h>
#include <symbols.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 3e58848..e919a90 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -22,7 +22,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index e51cf19..c8bc5d4 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -22,7 +22,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/mainboard.c b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
index 9ff4339..e2fa24d 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mainboard.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/mptable.c b/src/mainboard/supermicro/h8scm_fam10/mptable.c
index d0b6a13..7feba38 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mptable.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
-#include <arch/io.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index 045adae..dce6ae1 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -24,7 +24,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 2d302f1..b484ea4 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -22,7 +22,6 @@
#include <string.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 1851118..d476a87 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 0a56d18..9b2c80c 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 7248eb7..f6daf4c 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -15,7 +15,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index a42ee5c..f5555fd 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index f16ef83..66440ae 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -18,7 +18,6 @@
#define AMDFAM10_H
#include <inttypes.h>
-#include <arch/io.h>
#include <device/device.h>
#include "early_ht.h"
diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c
index 9d249e2..558c58a 100644
--- a/src/northbridge/amd/amdfam10/amdfam10_util.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_util.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include "raminit.h"
#include <northbridge/amd/amdmct/amddefs.h>
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c
index c68b0c4..04e507a 100644
--- a/src/northbridge/amd/amdfam10/early_ht.c
+++ b/src/northbridge/amd/amdfam10/early_ht.c
@@ -15,7 +15,6 @@
#include "early_ht.h"
#include <inttypes.h>
-#include <arch/io.h>
#include <device/pci_def.h>
// For SB HT chain only
diff --git a/src/northbridge/amd/amdfam10/ht_config.c b/src/northbridge/amd/amdfam10/ht_config.c
index 37b1492..4810b99 100644
--- a/src/northbridge/amd/amdfam10/ht_config.c
+++ b/src/northbridge/amd/amdfam10/ht_config.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 4da5228..e670a6d 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -16,7 +16,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/amd/amdfam10/pci.h b/src/northbridge/amd/amdfam10/pci.h
index 8fcdbd8..c528622 100644
--- a/src/northbridge/amd/amdfam10/pci.h
+++ b/src/northbridge/amd/amdfam10/pci.h
@@ -17,7 +17,6 @@
#define AMDFAM10_PCI_H
#include <inttypes.h>
-#include <arch/io.h>
#include <device/pci_def.h>
u32 pci_read_config32_index(pci_devfn_t dev, u32 index_reg, u32 index);
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 2843b92..b90eab0 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -16,7 +16,6 @@
*/
#include <inttypes.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <device/pci.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c
index 474f78f..a692a7a 100644
--- a/src/northbridge/amd/amdk8/reset_test.c
+++ b/src/northbridge/amd/amdk8/reset_test.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <stdint.h>
#include <cpu/x86/lapic.h>
diff --git a/src/northbridge/amd/lx/grphinit.c b/src/northbridge/amd/lx/grphinit.c
index 1adb9af..a55f190 100644
--- a/src/northbridge/amd/lx/grphinit.c
+++ b/src/northbridge/amd/lx/grphinit.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdint.h>
#include <cpu/amd/vr.h>
#include <console/console.h>
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index f6cb285..5988e62 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index fb3610d..4d9bb38 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 7125e1e..2d9350f 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -16,7 +16,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/ramtop.c b/src/northbridge/amd/pi/ramtop.c
index 8fa81c7..3224408 100644
--- a/src/northbridge/amd/pi/ramtop.c
+++ b/src/northbridge/amd/pi/ramtop.c
@@ -14,7 +14,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <cbmem.h>
#define CBMEM_TOP_SCRATCHPAD 0x78
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 1b86012..4b7ed5c 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -14,7 +14,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <arch/cpu.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index a5dc6cd..54ee546 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -12,7 +12,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c
index c8e6d45..1ce71c9 100644
--- a/src/northbridge/intel/fsp_rangeley/acpi.c
+++ b/src/northbridge/intel/fsp_rangeley/acpi.c
@@ -19,7 +19,6 @@
#include <types.h>
#include <string.h>
#include <console/console.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 94855cf..5fa06b7 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/fsp_model_406dx/model_406dx.h>
diff --git a/src/northbridge/intel/fsp_rangeley/port_access.c b/src/northbridge/intel/fsp_rangeley/port_access.c
index 07ef65c..7159a13 100644
--- a/src/northbridge/intel/fsp_rangeley/port_access.c
+++ b/src/northbridge/intel/fsp_rangeley/port_access.c
@@ -17,7 +17,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/northbridge/intel/fsp_rangeley/raminit.c b/src/northbridge/intel/fsp_rangeley/raminit.c
index 32506aa..247a7b8 100644
--- a/src/northbridge/intel/fsp_rangeley/raminit.c
+++ b/src/northbridge/intel/fsp_rangeley/raminit.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <string.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <device/pci_def.h>
#include "northbridge.h"
diff --git a/src/northbridge/intel/fsp_sandybridge/bootblock.c b/src/northbridge/intel/fsp_sandybridge/bootblock.c
index 05b0c75..cdbe007 100644
--- a/src/northbridge/intel/fsp_sandybridge/bootblock.c
+++ b/src/northbridge/intel/fsp_sandybridge/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just re-define this instead of including sandybridge.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/fsp_sandybridge/finalize.c b/src/northbridge/intel/fsp_sandybridge/finalize.c
index b02023d..859e525 100644
--- a/src/northbridge/intel/fsp_sandybridge/finalize.c
+++ b/src/northbridge/intel/fsp_sandybridge/finalize.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdlib.h>
#include <device/pci_ops.h>
#include "northbridge.h"
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index 111c201..60b7030 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/fsp_model_206ax/model_206ax.h>
diff --git a/src/northbridge/intel/fsp_sandybridge/ram_calc.c b/src/northbridge/intel/fsp_sandybridge/ram_calc.c
index f51de6d..f81902b 100644
--- a/src/northbridge/intel/fsp_sandybridge/ram_calc.c
+++ b/src/northbridge/intel/fsp_sandybridge/ram_calc.c
@@ -16,7 +16,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cbmem.h>
#include <fsp_util.h>
#include "northbridge.h"
diff --git a/src/northbridge/intel/fsp_sandybridge/raminit.c b/src/northbridge/intel/fsp_sandybridge/raminit.c
index f67d405..2ddc395 100644
--- a/src/northbridge/intel/fsp_sandybridge/raminit.c
+++ b/src/northbridge/intel/fsp_sandybridge/raminit.c
@@ -15,7 +15,6 @@
#include <console/console.h>
#include <string.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <device/pci_def.h>
#include "raminit.h"
diff --git a/src/northbridge/intel/fsp_sandybridge/report_platform.c b/src/northbridge/intel/fsp_sandybridge/report_platform.c
index 39bbc09..655b150 100644
--- a/src/northbridge/intel/fsp_sandybridge/report_platform.c
+++ b/src/northbridge/intel/fsp_sandybridge/report_platform.c
@@ -24,7 +24,6 @@
#include <southbridge/intel/fsp_i89xx/pch.h>
#endif
-#include <arch/io.h>
#include "northbridge.h"
static void report_cpu_info(void)
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index 8a61e1c..0040d8f 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just re-define these instead of including gm45.h. It blows up romcc. */
#define D0F0_PCIEXBAR_LO 0x60
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index c2e4aea..6c5321b 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include "gm45.h"
void gm45_early_init(void)
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 45144aa..6066f1c 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include <stddef.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index f424564..1b09447 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 405eb5d..330f16f 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -15,7 +15,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c
index 47203b4..e33f3ba 100644
--- a/src/northbridge/intel/gm45/pcie.c
+++ b/src/northbridge/intel/gm45/pcie.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c
index 7a3b498..9d5fb91 100644
--- a/src/northbridge/intel/gm45/pm.c
+++ b/src/northbridge/intel/gm45/pm.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index 5af3e16..9f0e5c8 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index b05d411..39c8e1a 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <spd.h>
diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index a25f363..93e7883 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just re-define this instead of including haswell.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index 5f42518..1777006 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdlib.h>
#include <device/pci_ops.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 0453246..6e6257d 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/haswell/haswell.h>
diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/ram_calc.c
index d3e88f2..11df754 100644
--- a/src/northbridge/intel/haswell/ram_calc.c
+++ b/src/northbridge/intel/haswell/ram_calc.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cbmem.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 04ef3d5..b56b8cd 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -17,7 +17,6 @@
#include <arch/cpu.h>
#include <string.h>
#include <southbridge/intel/lynxpoint/pch.h>
-#include <arch/io.h>
#include <cpu/x86/msr.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index cff3ade..29418bb 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -12,7 +12,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <spd.h>
#include "raminit.h"
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index affd8a1..6c76011 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -12,7 +12,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/i440bx/ram_calc.c b/src/northbridge/intel/i440bx/ram_calc.c
index 3362d93..9523c5b 100644
--- a/src/northbridge/intel/i440bx/ram_calc.c
+++ b/src/northbridge/intel/i440bx/ram_calc.c
@@ -15,7 +15,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <commonlib/helpers.h>
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c
index 5296d52..8e74d80 100644
--- a/src/northbridge/intel/i945/bootblock.c
+++ b/src/northbridge/intel/i945/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just re-define this instead of including i945.h. It blows up romcc. */
#define PCIEXBAR 0x48
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index 0f388df..41704ac 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -16,7 +16,6 @@
#include <spd.h>
#include <lib.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index de55cc3..bae5a74 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -15,7 +15,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c
index 7ee7198..a8e3fd9 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/ram_calc.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <arch/cpu.h>
#include <cbmem.h>
#include "i945.h"
diff --git a/src/northbridge/intel/nehalem/bootblock.c b/src/northbridge/intel/nehalem/bootblock.c
index 807e919..dec23e3 100644
--- a/src/northbridge/intel/nehalem/bootblock.c
+++ b/src/northbridge/intel/nehalem/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
static void bootblock_northbridge_init(void)
{
diff --git a/src/northbridge/intel/nehalem/finalize.c b/src/northbridge/intel/nehalem/finalize.c
index 73138406..97f6011 100644
--- a/src/northbridge/intel/nehalem/finalize.c
+++ b/src/northbridge/intel/nehalem/finalize.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdlib.h>
#include <device/pci_ops.h>
#include "nehalem.h"
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 4c6cdd4..8bd1a26 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_2065x/model_2065x.h>
diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/ram_calc.c
index baf087e..7535b43 100644
--- a/src/northbridge/intel/nehalem/ram_calc.c
+++ b/src/northbridge/intel/nehalem/ram_calc.c
@@ -17,7 +17,6 @@
#define __SIMPLE_DEVICE__
#include <arch/cpu.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index 1fab845..86dda91 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#define PCIEXBAR 0x60
#define MMCONF_256_BUSSES 16
#define ENABLE 1
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 2647bcc..56c8586 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -16,7 +16,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c
index 62855c2..04ed1f0 100644
--- a/src/northbridge/intel/pineview/ram_calc.c
+++ b/src/northbridge/intel/pineview/ram_calc.c
@@ -16,7 +16,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 05b0c75..cdbe007 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
/* Just re-define this instead of including sandybridge.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index 3fb0aa6..7051b24 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdlib.h>
#include <device/pci_ops.h>
#include "sandybridge.h"
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index cb0e5db..37d3058 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_206ax/model_206ax.h>
diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/ram_calc.c
index 00e3e78..4768b64 100644
--- a/src/northbridge/intel/sandybridge/ram_calc.c
+++ b/src/northbridge/intel/sandybridge/ram_calc.c
@@ -16,7 +16,6 @@
#define __SIMPLE_DEVICE__
#include <arch/cpu.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_ivy.c b/src/northbridge/intel/sandybridge/raminit_ivy.c
index 20f3038..5c1a58a 100644
--- a/src/northbridge/intel/sandybridge/raminit_ivy.c
+++ b/src/northbridge/intel/sandybridge/raminit_ivy.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <console/usb.h>
#include <delay.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include "raminit_native.h"
#include "raminit_common.h"
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c
index 9629d88..b1e384b 100644
--- a/src/northbridge/intel/x4x/bootblock.c
+++ b/src/northbridge/intel/x4x/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include "iomap.h"
#include "x4x.h"
diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c
index 1fcc682..723c064 100644
--- a/src/northbridge/intel/x4x/gma.c
+++ b/src/northbridge/intel/x4x/gma.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index bc7a5b3..1c2d6d0 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -16,7 +16,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c
index 1f1c13f..030ccff 100644
--- a/src/northbridge/intel/x4x/ram_calc.c
+++ b/src/northbridge/intel/x4x/ram_calc.c
@@ -21,7 +21,6 @@
#include <commonlib/helpers.h>
#include <stdint.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/x4x/raminit_tables.c b/src/northbridge/intel/x4x/raminit_tables.c
index ebd1562..b2b36ca 100644
--- a/src/northbridge/intel/x4x/raminit_tables.c
+++ b/src/northbridge/intel/x4x/raminit_tables.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <stdint.h>
#include "x4x.h"
diff --git a/src/northbridge/via/vx900/bootblock.c b/src/northbridge/via/vx900/bootblock.c
index 11123b6..478893b 100644
--- a/src/northbridge/via/vx900/bootblock.c
+++ b/src/northbridge/via/vx900/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#if CONFIG_ROM_SIZE == 0x80000
# define ROM_DECODE_MAP 0x00
diff --git a/src/northbridge/via/vx900/chrome9hd.c b/src/northbridge/via/vx900/chrome9hd.c
index 494d78a..df1bfd6 100644
--- a/src/northbridge/via/vx900/chrome9hd.c
+++ b/src/northbridge/via/vx900/chrome9hd.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c
index 1260941..bd55d76 100644
--- a/src/northbridge/via/vx900/early_vx900.c
+++ b/src/northbridge/via/vx900/early_vx900.c
@@ -15,7 +15,6 @@
*/
#include "early_vx900.h"
-#include <arch/io.h>
#include <console/console.h>
/**
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index b9dac56..6c07269 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <device/pci.h>
diff --git a/src/northbridge/via/vx900/pcie.c b/src/northbridge/via/vx900/pcie.c
index 1d3ecd9..3c432aa 100644
--- a/src/northbridge/via/vx900/pcie.c
+++ b/src/northbridge/via/vx900/pcie.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pciexp.h>
diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h
index a2a360a..131aded 100644
--- a/src/northbridge/via/vx900/vx900.h
+++ b/src/northbridge/via/vx900/vx900.h
@@ -26,7 +26,6 @@
#define VX900_MAX_DIMM_SLOTS 2
#define VX900_MAX_MEM_RANKS 4
-#include <arch/io.h>
#include <device/pci.h>
#include <console/console.h>
diff --git a/src/soc/amd/common/block/acpi/halt.c b/src/soc/amd/common/block/acpi/halt.c
index 8fba38d..e1aa817 100644
--- a/src/soc/amd/common/block/acpi/halt.c
+++ b/src/soc/amd/common/block/acpi/halt.c
@@ -14,6 +14,7 @@
*/
#include <arch/acpi.h>
+#include <arch/io.h>
#include <soc/southbridge.h>
#include <halt.h>
diff --git a/src/soc/amd/stoneyridge/hda.c b/src/soc/amd/stoneyridge/hda.c
index 89fc0fd..ed3905f 100644
--- a/src/soc/amd/stoneyridge/hda.c
+++ b/src/soc/amd/stoneyridge/hda.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <delay.h>
#include <soc/southbridge.h>
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 7f7ac5d..7283034 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -17,7 +17,6 @@
#ifndef __PI_STONEYRIDGE_NORTHBRIDGE_H__
#define __PI_STONEYRIDGE_NORTHBRIDGE_H__
-#include <arch/io.h>
#include <device/device.h>
/* D0F0 - Root Complex */
diff --git a/src/soc/amd/stoneyridge/include/soc/pci_devs.h b/src/soc/amd/stoneyridge/include/soc/pci_devs.h
index 5fddc52..aeadcb3 100644
--- a/src/soc/amd/stoneyridge/include/soc/pci_devs.h
+++ b/src/soc/amd/stoneyridge/include/soc/pci_devs.h
@@ -23,7 +23,6 @@
#include <device/device.h>
#define _SOC_DEV(slot, func) dev_find_slot(0, PCI_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SOC_DEV(slot, func) PCI_DEV(0, slot, func)
#endif
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h
index 2454351..d22b8db 100644
--- a/src/soc/amd/stoneyridge/include/soc/smi.h
+++ b/src/soc/amd/stoneyridge/include/soc/smi.h
@@ -18,7 +18,6 @@
#ifndef __SOUTHBRIDGE_AMD_PI_STONEYRIDGE_SMI_H__
#define __SOUTHBRIDGE_AMD_PI_STONEYRIDGE_SMI_H__
-#include <arch/io.h>
#define SMI_GEVENTS 24
#define SCIMAPS 58
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index a2ae52c..03511e3 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -14,7 +14,6 @@
*/
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index ed83e1e..8e7951e 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/amd/stoneyridge/sata.c b/src/soc/amd/stoneyridge/sata.c
index 5376786..e36aaa6 100644
--- a/src/soc/amd/stoneyridge/sata.c
+++ b/src/soc/amd/stoneyridge/sata.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <soc/southbridge.h>
diff --git a/src/soc/amd/stoneyridge/sm.c b/src/soc/amd/stoneyridge/sm.c
index 278f8a8..4b6634c 100644
--- a/src/soc/amd/stoneyridge/sm.c
+++ b/src/soc/amd/stoneyridge/sm.c
@@ -20,7 +20,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
#include <stdlib.h>
diff --git a/src/soc/amd/stoneyridge/tsc_freq.c b/src/soc/amd/stoneyridge/tsc_freq.c
index 89b0a78..29121b9 100644
--- a/src/soc/amd/stoneyridge/tsc_freq.c
+++ b/src/soc/amd/stoneyridge/tsc_freq.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/tsc.h>
diff --git a/src/soc/cavium/cn81xx/bootblock.c b/src/soc/cavium/cn81xx/bootblock.c
index 8517467..64728da 100644
--- a/src/soc/cavium/cn81xx/bootblock.c
+++ b/src/soc/cavium/cn81xx/bootblock.c
@@ -16,7 +16,6 @@
* Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0.
*/
-#include <arch/io.h>
#include <commonlib/helpers.h>
#include <soc/bootblock.h>
#include <soc/sysreg.h>
diff --git a/src/soc/cavium/common/bdk-coreboot.c b/src/soc/cavium/common/bdk-coreboot.c
index ff30edf..ca33f40 100644
--- a/src/soc/cavium/common/bdk-coreboot.c
+++ b/src/soc/cavium/common/bdk-coreboot.c
@@ -21,7 +21,6 @@
#include <device/i2c.h>
#include <device/i2c_simple.h>
#include <endian.h>
-#include <arch/io.h>
#include <delay.h>
#include <reset.h>
#include <soc/timer.h>
diff --git a/src/soc/imgtec/pistachio/include/soc/spi.h b/src/soc/imgtec/pistachio/include/soc/spi.h
index 00d1aec..f23cca5 100644
--- a/src/soc/imgtec/pistachio/include/soc/spi.h
+++ b/src/soc/imgtec/pistachio/include/soc/spi.h
@@ -17,7 +17,6 @@
#ifndef __SOC_IMGTEC_DANUBE_SPI_H__
#define __SOC_IMGTEC_DANUBE_SPI_H__
-#include <arch/io.h>
#include <arch/types.h>
#define spi_read_reg_field(regval, field) \
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h
index 37d0fab..4e23b87 100644
--- a/src/soc/intel/apollolake/include/soc/pci_devs.h
+++ b/src/soc/intel/apollolake/include/soc/pci_devs.h
@@ -27,7 +27,6 @@
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
#define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#endif
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
index 6d68501..886851e 100644
--- a/src/soc/intel/apollolake/memmap.c
+++ b/src/soc/intel/apollolake/memmap.c
@@ -23,7 +23,6 @@
*/
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <assert.h>
#include <cbmem.h>
#include "chip.h"
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index d2ec6c1..da000ae 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -18,7 +18,6 @@
#include <arch/cpu.h>
#include <arch/early_variables.h>
-#include <arch/io.h>
#include <arch/symbols.h>
#include <assert.h>
#include <bootmode.h>
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c
index 4acd7cb..cbb0c8c 100644
--- a/src/soc/intel/apollolake/smihandler.c
+++ b/src/soc/intel/apollolake/smihandler.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <intelblocks/smihandler.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index ac61375..9a189e3 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/baytrail/dptf.c b/src/soc/intel/baytrail/dptf.c
index 6121d85d..3815c34 100644
--- a/src/soc/intel/baytrail/dptf.c
+++ b/src/soc/intel/baytrail/dptf.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <bootstate.h>
#include <console/console.h>
#include <reg_script.h>
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c
index aef820e..45dcec8 100644
--- a/src/soc/intel/baytrail/elog.c
+++ b/src/soc/intel/baytrail/elog.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c
index 6dd8f70..bf5a8dd 100644
--- a/src/soc/intel/baytrail/emmc.c
+++ b/src/soc/intel/baytrail/emmc.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c
index ec40868..ff69be5 100644
--- a/src/soc/intel/baytrail/hda.c
+++ b/src/soc/intel/baytrail/hda.c
@@ -12,7 +12,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c
index 5ea1bcd..a21a788 100644
--- a/src/soc/intel/baytrail/lpss.c
+++ b/src/soc/intel/baytrail/lpss.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c
index f1131f6..211f476 100644
--- a/src/soc/intel/baytrail/memmap.c
+++ b/src/soc/intel/baytrail/memmap.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <soc/iosf.h>
#include <soc/smm.h>
diff --git a/src/soc/intel/baytrail/perf_power.c b/src/soc/intel/baytrail/perf_power.c
index 6cddf76..9d92513 100644
--- a/src/soc/intel/baytrail/perf_power.c
+++ b/src/soc/intel/baytrail/perf_power.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <bootstate.h>
#include <console/console.h>
#include <reg_script.h>
diff --git a/src/soc/intel/baytrail/romstage/early_spi.c b/src/soc/intel/baytrail/romstage/early_spi.c
index e1e7542..72e9b2c 100644
--- a/src/soc/intel/baytrail/romstage/early_spi.c
+++ b/src/soc/intel/baytrail/romstage/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <delay.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/romstage/gfx.c b/src/soc/intel/baytrail/romstage/gfx.c
index e1434ef..d19c1a6 100644
--- a/src/soc/intel/baytrail/romstage/gfx.c
+++ b/src/soc/intel/baytrail/romstage/gfx.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/gfx.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
diff --git a/src/soc/intel/baytrail/romstage/uart.c b/src/soc/intel/baytrail/romstage/uart.c
index f3c5029..9b4a03b 100644
--- a/src/soc/intel/baytrail/romstage/uart.c
+++ b/src/soc/intel/baytrail/romstage/uart.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c
index 0c03e56..833e9b2 100644
--- a/src/soc/intel/baytrail/sd.c
+++ b/src/soc/intel/baytrail/sd.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c
index 79d44e0..ea33832 100644
--- a/src/soc/intel/braswell/bootblock/bootblock.c
+++ b/src/soc/intel/braswell/bootblock/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/braswell/elog.c b/src/soc/intel/braswell/elog.c
index 08994b4..f1fc7d4 100644
--- a/src/soc/intel/braswell/elog.c
+++ b/src/soc/intel/braswell/elog.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/acpi.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/braswell/emmc.c b/src/soc/intel/braswell/emmc.c
index 238f8db..09e801d 100644
--- a/src/soc/intel/braswell/emmc.c
+++ b/src/soc/intel/braswell/emmc.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/gfx.c b/src/soc/intel/braswell/gfx.c
index 895d2ee..d57389e 100644
--- a/src/soc/intel/braswell/gfx.c
+++ b/src/soc/intel/braswell/gfx.c
@@ -15,7 +15,6 @@
*/
#include "chip.h"
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/hda.c b/src/soc/intel/braswell/hda.c
index a92d7a9..73ac274 100644
--- a/src/soc/intel/braswell/hda.c
+++ b/src/soc/intel/braswell/hda.c
@@ -13,7 +13,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 894096f..2240ae1 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -18,7 +18,6 @@
#define _SOC_GPIO_H_
#include <stdint.h>
-#include <arch/io.h>
#include <soc/gpio_defs.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c
index 60ff49f..d1ce76a 100644
--- a/src/soc/intel/braswell/lpss.c
+++ b/src/soc/intel/braswell/lpss.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 19189f9..0b68732 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <fsp/memmap.h>
diff --git a/src/soc/intel/braswell/romstage/early_spi.c b/src/soc/intel/braswell/romstage/early_spi.c
index e387ad8..0ca5ef5 100644
--- a/src/soc/intel/braswell/romstage/early_spi.c
+++ b/src/soc/intel/braswell/romstage/early_spi.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <delay.h>
#include <console/console.h>
diff --git a/src/soc/intel/braswell/sata.c b/src/soc/intel/braswell/sata.c
index 2507641..ab16745 100644
--- a/src/soc/intel/braswell/sata.c
+++ b/src/soc/intel/braswell/sata.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/sata.h>
diff --git a/src/soc/intel/braswell/sd.c b/src/soc/intel/braswell/sd.c
index 1775ce7..1a11c9d 100644
--- a/src/soc/intel/braswell/sd.c
+++ b/src/soc/intel/braswell/sd.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 2d9d0b7..4d54727 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -16,7 +16,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <device/pci_ops.h>
diff --git a/src/soc/intel/broadwell/bootblock/pch.c b/src/soc/intel/broadwell/bootblock/pch.c
index 2643801..fb36c66 100644
--- a/src/soc/intel/broadwell/bootblock/pch.c
+++ b/src/soc/intel/broadwell/bootblock/pch.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c
index 1a09f8e..cf1fb40 100644
--- a/src/soc/intel/broadwell/bootblock/systemagent.c
+++ b/src/soc/intel/broadwell/bootblock/systemagent.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/pci_devs.h>
#include <soc/systemagent.h>
diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c
index b1ead77..1011a75 100644
--- a/src/soc/intel/broadwell/ehci.c
+++ b/src/soc/intel/broadwell/ehci.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ehci.h>
-#include <arch/io.h>
#include <soc/ehci.h>
#include <soc/pch.h>
diff --git a/src/soc/intel/broadwell/include/soc/pci_devs.h b/src/soc/intel/broadwell/include/soc/pci_devs.h
index 0880353..6e1ba4b 100644
--- a/src/soc/intel/broadwell/include/soc/pci_devs.h
+++ b/src/soc/intel/broadwell/include/soc/pci_devs.h
@@ -20,7 +20,6 @@
#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
#if defined(__PRE_RAM__) || defined(__SMM__) || defined(__ROMCC__)
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#else
diff --git a/src/soc/intel/broadwell/iobp.c b/src/soc/intel/broadwell/iobp.c
index 8d3a562..c4f325e 100644
--- a/src/soc/intel/broadwell/iobp.c
+++ b/src/soc/intel/broadwell/iobp.c
@@ -15,7 +15,6 @@
#include <console/console.h>
#include <delay.h>
-#include <arch/io.h>
#include <soc/iobp.h>
#include <soc/rcba.h>
diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c
index 819e94c..189e1a9 100644
--- a/src/soc/intel/broadwell/me_status.c
+++ b/src/soc/intel/broadwell/me_status.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c
index 175c20c..5f152e9 100644
--- a/src/soc/intel/broadwell/memmap.c
+++ b/src/soc/intel/broadwell/memmap.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <device/pci.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index c5df1ad..71dd619 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <delay.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/romstage/pch.c b/src/soc/intel/broadwell/romstage/pch.c
index 7e614c1..a1764e3 100644
--- a/src/soc/intel/broadwell/romstage/pch.c
+++ b/src/soc/intel/broadwell/romstage/pch.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index c4a3b2c..acb435b 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -14,7 +14,6 @@
*/
#include <arch/cbfs.h>
-#include <arch/io.h>
#include <assert.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c
index 44a3d27..09e7ac6 100644
--- a/src/soc/intel/broadwell/romstage/report_platform.c
+++ b/src/soc/intel/broadwell/romstage/report_platform.c
@@ -14,7 +14,6 @@
*/
#include <arch/cpu.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 3abc853..3452508 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -16,7 +16,6 @@
#include <stddef.h>
#include <stdint.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <bootmode.h>
diff --git a/src/soc/intel/broadwell/romstage/smbus.c b/src/soc/intel/broadwell/romstage/smbus.c
index 13fdaf6..50ccd28 100644
--- a/src/soc/intel/broadwell/romstage/smbus.c
+++ b/src/soc/intel/broadwell/romstage/smbus.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/romstage/spi.c b/src/soc/intel/broadwell/romstage/spi.c
index c4a5452..2c4039c 100644
--- a/src/soc/intel/broadwell/romstage/spi.c
+++ b/src/soc/intel/broadwell/romstage/spi.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/romstage/uart.c b/src/soc/intel/broadwell/romstage/uart.c
index abc4a47..a3c4c61 100644
--- a/src/soc/intel/broadwell/romstage/uart.c
+++ b/src/soc/intel/broadwell/romstage/uart.c
@@ -14,7 +14,6 @@
*/
#include <arch/early_variables.h>
-#include <arch/io.h>
#include <delay.h>
#include <device/pci_def.h>
#include <reg_script.h>
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index afb6038..ebb5edc 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <stdint.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/broadwell/usb_debug.c b/src/soc/intel/broadwell/usb_debug.c
index 9580a5c..3feb853 100644
--- a/src/soc/intel/broadwell/usb_debug.c
+++ b/src/soc/intel/broadwell/usb_debug.c
@@ -17,7 +17,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 17bcce9..cb7cdfb 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -15,7 +15,6 @@
*/
#include <arch/cpu.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h
index 63a59db..9548097 100644
--- a/src/soc/intel/cannonlake/include/soc/pci_devs.h
+++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h
@@ -29,7 +29,6 @@
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
#define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#endif
diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h
index 1661ece..c8df25a 100644
--- a/src/soc/intel/cannonlake/include/soc/pm.h
+++ b/src/soc/intel/cannonlake/include/soc/pm.h
@@ -141,7 +141,6 @@
#if !defined(__ACPI__)
#include <arch/acpi.h>
-#include <arch/io.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
#include <soc/smbus.h>
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c
index 64e07be..8ffda2a 100644
--- a/src/soc/intel/cannonlake/memmap.c
+++ b/src/soc/intel/cannonlake/memmap.c
@@ -15,7 +15,6 @@
*/
#include <arch/ebda.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <chip.h>
#include <console/console.h>
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 246e0ea..e06e36d 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/early_variables.h>
#include <assert.h>
#include <chip.h>
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index ebbdabd..a5d9f68 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -15,7 +15,6 @@
*/
#include <arch/acpigen.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index af49c0a..368569d 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <assert.h>
#include <bootstate.h>
#include <cpu/cpu.h>
diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c
index 4b67280..e3fe18f 100644
--- a/src/soc/intel/common/block/i2c/i2c.c
+++ b/src/soc/intel/common/block/i2c/i2c.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/i2c_simple.h>
diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h
index 050d93a..d8520f1 100644
--- a/src/soc/intel/common/block/include/intelblocks/smihandler.h
+++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h
@@ -16,7 +16,6 @@
#ifndef SOC_INTEL_COMMON_BLOCK_SMI_HANDLER_H
#define SOC_INTEL_COMMON_BLOCK_SMI_HANDLER_H
-#include <arch/io.h>
#include <device/device.h>
#include <stdint.h>
diff --git a/src/soc/intel/common/block/include/intelblocks/uart.h b/src/soc/intel/common/block/include/intelblocks/uart.h
index 545e158..ad2ddf4 100644
--- a/src/soc/intel/common/block/include/intelblocks/uart.h
+++ b/src/soc/intel/common/block/include/intelblocks/uart.h
@@ -16,7 +16,6 @@
#ifndef SOC_INTEL_COMMON_BLOCK_UART_H
#define SOC_INTEL_COMMON_BLOCK_UART_H
-#include <arch/io.h>
#include <console/uart.h>
#include <device/device.h>
#include <intelblocks/gpio.h>
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index 69e1f97..a36f7d2e 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 62ea122..ab79a60 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
index 47a116e..afb30bc 100644
--- a/src/soc/intel/common/block/xdci/xdci.c
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index be97aa7..215fd5f 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -17,7 +17,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <intelblocks/acpi.h>
#include <intelblocks/xhci.h>
diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c
index f37d001..52cca5a 100644
--- a/src/soc/intel/common/pch/lockdown/lockdown.c
+++ b/src/soc/intel/common/pch/lockdown/lockdown.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <bootstate.h>
#include <console/console.h>
#include <intelblocks/chip.h>
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
index b10a905..1e4d78c 100644
--- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h
+++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
@@ -31,7 +31,6 @@
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
#define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_##slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_##slot, func)
#endif
diff --git a/src/soc/intel/denverton_ns/include/soc/pm.h b/src/soc/intel/denverton_ns/include/soc/pm.h
index 32d8a76..fbdcdce 100644
--- a/src/soc/intel/denverton_ns/include/soc/pm.h
+++ b/src/soc/intel/denverton_ns/include/soc/pm.h
@@ -18,7 +18,6 @@
#ifndef _DENVERTON_NS_PM_H_
#define _DENVERTON_NS_PM_H_
-#include <arch/io.h>
#include <soc/pmc.h>
#include <arch/acpi.h>
diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c
index 813d5c6..d4147ec 100644
--- a/src/soc/intel/denverton_ns/memmap.c
+++ b/src/soc/intel/denverton_ns/memmap.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbfs.h>
#include <cbmem.h>
#include <assert.h>
diff --git a/src/soc/intel/denverton_ns/npk.c b/src/soc/intel/denverton_ns/npk.c
index 7b63054..0404893 100644
--- a/src/soc/intel/denverton_ns/npk.c
+++ b/src/soc/intel/denverton_ns/npk.c
@@ -14,7 +14,6 @@
*
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/xhci.c b/src/soc/intel/denverton_ns/xhci.c
index 5f8482e..85b0585 100644
--- a/src/soc/intel/denverton_ns/xhci.c
+++ b/src/soc/intel/denverton_ns/xhci.c
@@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <arch/io.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/fsp_baytrail/gfx.c b/src/soc/intel/fsp_baytrail/gfx.c
index 5464b66..6bde32e 100644
--- a/src/soc/intel/fsp_baytrail/gfx.c
+++ b/src/soc/intel/fsp_baytrail/gfx.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h
index 4efb9bd..f142707 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h
@@ -16,7 +16,6 @@
#ifndef __SOC_INTEL_FSP_BAYTRAIL_I2C_H__
#define __SOC_INTEL_FSP_BAYTRAIL_I2C_H__
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/fsp_baytrail/lpss.c b/src/soc/intel/fsp_baytrail/lpss.c
index 8820eed..d644138 100644
--- a/src/soc/intel/fsp_baytrail/lpss.c
+++ b/src/soc/intel/fsp_baytrail/lpss.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 1886c6f..77ba406 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <soc/iosf.h>
#include <soc/smm.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/report_platform.c b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
index 4c91b0a..4787429 100644
--- a/src/soc/intel/fsp_baytrail/romstage/report_platform.c
+++ b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
@@ -15,7 +15,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <soc/iosf.h>
#include <soc/romstage.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/uart.c b/src/soc/intel/fsp_baytrail/romstage/uart.c
index 10a00f8..54fb117 100644
--- a/src/soc/intel/fsp_baytrail/romstage/uart.c
+++ b/src/soc/intel/fsp_baytrail/romstage/uart.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 0f53a79..3a01860 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -18,7 +18,6 @@
#include <stddef.h>
#include <arch/cpu.h>
#include <lib.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c
index d34a070..2182a66 100644
--- a/src/soc/intel/fsp_broadwell_de/smihandler.c
+++ b/src/soc/intel/fsp_broadwell_de/smihandler.c
@@ -17,7 +17,6 @@
#include <delay.h>
#include <types.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index fe7bc6f..fe798d0 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -25,7 +25,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <console/console.h>
-#include <arch/io.h>
#include <soc/lpc.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c
index 9df6a1e..58549aa 100644
--- a/src/soc/intel/icelake/bootblock/report_platform.c
+++ b/src/soc/intel/icelake/bootblock/report_platform.c
@@ -14,7 +14,6 @@
*/
#include <arch/cpu.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/icelake/include/soc/pci_devs.h b/src/soc/intel/icelake/include/soc/pci_devs.h
index 9b9e434..158ef45 100644
--- a/src/soc/intel/icelake/include/soc/pci_devs.h
+++ b/src/soc/intel/icelake/include/soc/pci_devs.h
@@ -28,7 +28,6 @@
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
#define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#endif
diff --git a/src/soc/intel/icelake/include/soc/pm.h b/src/soc/intel/icelake/include/soc/pm.h
index 6b1b298..9caf49f 100644
--- a/src/soc/intel/icelake/include/soc/pm.h
+++ b/src/soc/intel/icelake/include/soc/pm.h
@@ -140,7 +140,6 @@
#if !defined(__ACPI__)
#include <arch/acpi.h>
-#include <arch/io.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
#include <soc/smbus.h>
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c
index 027b8b0..faf1b2a 100644
--- a/src/soc/intel/icelake/memmap.c
+++ b/src/soc/intel/icelake/memmap.c
@@ -14,7 +14,6 @@
*/
#include <arch/ebda.h>
-#include <arch/io.h>
#include <cbmem.h>
#include <chip.h>
#include <console/console.h>
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 432cae5..f7c1ed3 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/early_variables.h>
#include <assert.h>
#include <chip.h>
diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h
index 1695297..3027de4 100644
--- a/src/soc/intel/quark/include/soc/reg_access.h
+++ b/src/soc/intel/quark/include/soc/reg_access.h
@@ -18,7 +18,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/quark/sd.c b/src/soc/intel/quark/sd.c
index e41afa4..5072e3a 100644
--- a/src/soc/intel/quark/sd.c
+++ b/src/soc/intel/quark/sd.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <commonlib/sdhci.h>
#include <commonlib/storage.h>
#include <console/console.h>
diff --git a/src/soc/intel/quark/spi_debug.c b/src/soc/intel/quark/spi_debug.c
index d229f2e..d9dfe8e 100644
--- a/src/soc/intel/quark/spi_debug.c
+++ b/src/soc/intel/quark/spi_debug.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <soc/spi.h>
diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c
index 507fa92..47a655f 100644
--- a/src/soc/intel/quark/storage_test.c
+++ b/src/soc/intel/quark/storage_test.c
@@ -14,7 +14,6 @@
*/
#include <arch/early_variables.h>
-#include <arch/io.h>
#include <assert.h>
#include <cbmem.h>
#include <commonlib/cbmem_id.h>
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 86dcc48..f06205d 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -18,7 +18,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index b59d351..6b4a92d 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -15,7 +15,6 @@
*/
#include <arch/cpu.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 7cc6de5..9fd4f85 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <chip.h>
#include <bootstate.h>
#include <console/console.h>
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index 25a9610..f7327c8 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/pci_ops.h>
#include <stdint.h>
+#include <arch/io.h>
#include <elog.h>
#include <intelblocks/pmclib.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index bc6c9cb..fc7638b 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -29,7 +29,6 @@
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
#define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func))
#else
-#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
#endif
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 6baa568..fa96f10 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <console/console.h>
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 215b07c..6aaa6c0 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -15,7 +15,6 @@
*/
#include <arch/cpu.h>
-#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/stages.h>
#include <arch/early_variables.h>
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 0945780..2503b43 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -15,7 +15,6 @@
#include <arch/cpu.h>
#include <arch/early_variables.h>
-#include <arch/io.h>
#include <arch/symbols.h>
#include <assert.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 2c4408fe..150eacc 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index 4508fda..89169d0 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -14,7 +14,6 @@
*
*/
-#include <arch/io.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <fsp/api.h>
diff --git a/src/soc/mediatek/mt8173/memory.c b/src/soc/mediatek/mt8173/memory.c
index a02e75e..066b18b 100644
--- a/src/soc/mediatek/mt8173/memory.c
+++ b/src/soc/mediatek/mt8173/memory.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
#include <soc/addressmap.h>
diff --git a/src/soc/mediatek/mt8173/mt6391.c b/src/soc/mediatek/mt8173/mt6391.c
index ecea693..ba3cd42 100644
--- a/src/soc/mediatek/mt8173/mt6391.c
+++ b/src/soc/mediatek/mt8173/mt6391.c
@@ -12,7 +12,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/mediatek/mt8183/gpio.c b/src/soc/mediatek/mt8183/gpio.c
index d555c33..005efaa 100644
--- a/src/soc/mediatek/mt8183/gpio.c
+++ b/src/soc/mediatek/mt8183/gpio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <gpio.h>
enum {
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index 7fae4e9..b9fa0ea 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -17,7 +17,6 @@
*
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h
index d08e26f..0288590 100644
--- a/src/soc/nvidia/tegra124/include/soc/clock.h
+++ b/src/soc/nvidia/tegra124/include/soc/clock.h
@@ -18,7 +18,6 @@
#define __SOC_NVIDIA_TEGRA124_CLOCK_H__
#include <arch/hlt.h>
-#include <arch/io.h>
#include <console/console.h>
#include <soc/clk_rst.h>
#include <stdint.h>
diff --git a/src/soc/nvidia/tegra124/soc.c b/src/soc/nvidia/tegra124/soc.c
index e44ea8d..9d5e79f 100644
--- a/src/soc/nvidia/tegra124/soc.c
+++ b/src/soc/nvidia/tegra124/soc.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index d9137ad..fb8ab70 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -16,7 +16,6 @@
*
*/
-#include <arch/io.h>
#include <boot/tables.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/nvidia/tegra210/dp.c b/src/soc/nvidia/tegra210/dp.c
index 44811d6..b0c0846 100644
--- a/src/soc/nvidia/tegra210/dp.c
+++ b/src/soc/nvidia/tegra210/dp.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/i2c_simple.h>
diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c
index b4319d5..a218862 100644
--- a/src/soc/nvidia/tegra210/funitcfg.c
+++ b/src/soc/nvidia/tegra210/funitcfg.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
diff --git a/src/soc/nvidia/tegra210/include/soc/clock.h b/src/soc/nvidia/tegra210/include/soc/clock.h
index 50d7260..5704c3e 100644
--- a/src/soc/nvidia/tegra210/include/soc/clock.h
+++ b/src/soc/nvidia/tegra210/include/soc/clock.h
@@ -18,7 +18,6 @@
#define __SOC_NVIDIA_TEGRA210_CLOCK_H__
#include <arch/hlt.h>
-#include <arch/io.h>
#include <console/console.h>
#include <soc/clk_rst.h>
#include <stdint.h>
diff --git a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
index fc48aa7..081e1c6 100644
--- a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
+++ b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c
index 001032a..eff6c77 100644
--- a/src/soc/nvidia/tegra210/mipi-phy.c
+++ b/src/soc/nvidia/tegra210/mipi-phy.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
diff --git a/src/soc/nvidia/tegra210/mipi_dsi.c b/src/soc/nvidia/tegra210/mipi_dsi.c
index f81cb32..b3a7412 100644
--- a/src/soc/nvidia/tegra210/mipi_dsi.c
+++ b/src/soc/nvidia/tegra210/mipi_dsi.c
@@ -39,7 +39,6 @@
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index a8f111b..6862a03 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <arch/cache.h>
#include <cpu/cpu.h>
#include <bootmode.h>
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index a00bdad..4a9ef5b 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -17,7 +17,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <stdint.h>
#include <lib.h>
#include <stdlib.h>
diff --git a/src/soc/qualcomm/ipq40xx/i2c.c b/src/soc/qualcomm/ipq40xx/i2c.c
index 133f564..b727f6d 100644
--- a/src/soc/qualcomm/ipq40xx/i2c.c
+++ b/src/soc/qualcomm/ipq40xx/i2c.c
@@ -29,7 +29,6 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/qualcomm/ipq806x/i2c.c b/src/soc/qualcomm/ipq806x/i2c.c
index 9660ec8..4898d9b 100644
--- a/src/soc/qualcomm/ipq806x/i2c.c
+++ b/src/soc/qualcomm/ipq806x/i2c.c
@@ -27,7 +27,6 @@
* SUCH DAMAGE.
*/
-#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/rockchip/common/include/soc/soc.h b/src/soc/rockchip/common/include/soc/soc.h
index 465066b..f4b07a7 100644
--- a/src/soc/rockchip/common/include/soc/soc.h
+++ b/src/soc/rockchip/common/include/soc/soc.h
@@ -16,7 +16,6 @@
#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SOC_H
#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SOC_H
-#include <arch/io.h>
#include <symbols.h>
#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set)
diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c
index 02fe9ff..6cc26f4 100644
--- a/src/soc/rockchip/rk3288/bootblock.c
+++ b/src/soc/rockchip/rk3288/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <arch/io.h>
#include <bootblock_common.h>
#include <console/console.h>
#include <soc/addressmap.h>
diff --git a/src/soc/rockchip/rk3288/gpio.c b/src/soc/rockchip/rk3288/gpio.c
index 662116e..c326667 100644
--- a/src/soc/rockchip/rk3288/gpio.c
+++ b/src/soc/rockchip/rk3288/gpio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/gpio.h>
diff --git a/src/soc/rockchip/rk3399/decompressor.c b/src/soc/rockchip/rk3399/decompressor.c
index 7d3c714..7e746ba 100644
--- a/src/soc/rockchip/rk3399/decompressor.c
+++ b/src/soc/rockchip/rk3399/decompressor.c
@@ -14,7 +14,6 @@
*
*/
-#include <arch/io.h>
#include <arch/mmu.h>
#include <bootblock_common.h>
#include <console/console.h>
diff --git a/src/soc/rockchip/rk3399/gpio.c b/src/soc/rockchip/rk3399/gpio.c
index 3316027..7f349c7 100644
--- a/src/soc/rockchip/rk3399/gpio.c
+++ b/src/soc/rockchip/rk3399/gpio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/addressmap.h>
diff --git a/src/soc/samsung/exynos5250/include/soc/cpu.h b/src/soc/samsung/exynos5250/include/soc/cpu.h
index 24bb96f..d7121a9 100644
--- a/src/soc/samsung/exynos5250/include/soc/cpu.h
+++ b/src/soc/samsung/exynos5250/include/soc/cpu.h
@@ -16,7 +16,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5250_CPU_H
#define CPU_SAMSUNG_EXYNOS5250_CPU_H
-#include <arch/io.h>
#include <symbols.h>
/* Base address registers */
diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c
index 64dfc39..0c39ac8 100644
--- a/src/soc/samsung/exynos5420/dp.c
+++ b/src/soc/samsung/exynos5420/dp.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <delay.h>
#include <lib.h>
diff --git a/src/soc/samsung/exynos5420/include/soc/cpu.h b/src/soc/samsung/exynos5420/include/soc/cpu.h
index f523b41..f61aa2c 100644
--- a/src/soc/samsung/exynos5420/include/soc/cpu.h
+++ b/src/soc/samsung/exynos5420/include/soc/cpu.h
@@ -16,7 +16,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_CPU_H
#define CPU_SAMSUNG_EXYNOS5420_CPU_H
-#include <arch/io.h>
#include <symbols.h>
#define EXYNOS5_SRAM_BASE 0x02020000
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index 32b1298..4191c8b 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
/*
diff --git a/src/southbridge/amd/agesa/hudson/hda.c b/src/southbridge/amd/agesa/hudson/hda.c
index 360ca89..44eeb73 100644
--- a/src/southbridge/amd/agesa/hudson/hda.c
+++ b/src/southbridge/amd/agesa/hudson/hda.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <delay.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 132a333..d3907a6 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <pc80/i8254.h>
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c
index 83eaa46..b7a2287 100644
--- a/src/southbridge/amd/agesa/hudson/reset.c
+++ b/src/southbridge/amd/agesa/hudson/reset.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c
index 8045279..f6b5ce1 100644
--- a/src/southbridge/amd/agesa/hudson/sata.c
+++ b/src/southbridge/amd/agesa/hudson/sata.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/agesa/hudson/sd.c b/src/southbridge/amd/agesa/hudson/sd.c
index e98be57..9f40801 100644
--- a/src/southbridge/amd/agesa/hudson/sd.c
+++ b/src/southbridge/amd/agesa/hudson/sd.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include "hudson.h"
static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c
index 30fcd37..5c2da53 100644
--- a/src/southbridge/amd/agesa/hudson/sm.c
+++ b/src/southbridge/amd/agesa/hudson/sm.c
@@ -20,7 +20,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
#include <stdlib.h>
diff --git a/src/southbridge/amd/agesa/hudson/usb.c b/src/southbridge/amd/agesa/hudson/usb.c
index 5b64ddf..2b06f27 100644
--- a/src/southbridge/amd/agesa/hudson/usb.c
+++ b/src/southbridge/amd/agesa/hudson/usb.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/pci_ehci.h>
-#include <arch/io.h>
#include "hudson.h"
static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
index 2c722c8..dc4e6af 100644
--- a/src/southbridge/amd/amd8111/bootblock.c
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
/* Enable 5MB ROM access at 0xFFB00000 - 0xFFFFFFFF. */
diff --git a/src/southbridge/amd/amd8111/early_ctrl.c b/src/southbridge/amd/amd8111/early_ctrl.c
index d04646c..914c665 100644
--- a/src/southbridge/amd/amd8111/early_ctrl.c
+++ b/src/southbridge/amd/amd8111/early_ctrl.c
@@ -14,6 +14,7 @@
*/
#include "amd8111.h"
+#include <arch/io.h>
#include <reset.h>
unsigned get_sbdn(unsigned bus)
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
index 41d9880..ca90f78 100644
--- a/src/southbridge/amd/amd8111/reset.c
+++ b/src/southbridge/amd/amd8111/reset.c
@@ -14,7 +14,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <reset.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c
index 375234e..2ebc3c1 100644
--- a/src/southbridge/amd/amd8111/smbus.c
+++ b/src/southbridge/amd/amd8111/smbus.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
-#include <arch/io.h>
#include "amd8111.h"
diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c
index 0b5a038..3c7000f 100644
--- a/src/southbridge/amd/amd8111/usb.c
+++ b/src/southbridge/amd/amd8111/usb.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include "amd8111.h"
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 9f8b3ab..79c01a4 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -19,7 +19,6 @@
#include "OEM.h"
#include <cbmem.h>
-#include <arch/io.h>
#include <arch/acpi.h>
/**
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 3e2c10a..a36c998 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -15,7 +15,6 @@
#include <stdint.h>
#include <device/pci_ids.h>
-#include <arch/io.h> /* inl, outl */
#include "SBPLATFORM.h"
#include "sb_cimx.h"
#include "cfg.h" /*sb800_cimx_config*/
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 40c0739..89012b8 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -19,7 +19,6 @@
#include <device/pci_def.h>
#include <arch/ioapic.h>
#include "lpc.h"
-#include <arch/io.h>
#include <cbmem.h>
void lpc_read_resources(struct device *dev)
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index b7ee613..74565b4 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c
index a069463..eaeb5f6 100644
--- a/src/southbridge/amd/cimx/sb900/bootblock.c
+++ b/src/southbridge/amd/cimx/sb900/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
static void sb900_enable_rom(void)
{
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index b7ee613..74565b4 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c
index 32b1298..4191c8b 100644
--- a/src/southbridge/amd/pi/hudson/bootblock.c
+++ b/src/southbridge/amd/pi/hudson/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
/*
diff --git a/src/southbridge/amd/pi/hudson/hda.c b/src/southbridge/amd/pi/hudson/hda.c
index 79932ee..e00c4f8 100644
--- a/src/southbridge/amd/pi/hudson/hda.c
+++ b/src/southbridge/amd/pi/hudson/hda.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <delay.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c
index 83eaa46..b7a2287 100644
--- a/src/southbridge/amd/pi/hudson/reset.c
+++ b/src/southbridge/amd/pi/hudson/reset.c
@@ -16,7 +16,6 @@
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c
index 11f0977..0d82c79 100644
--- a/src/southbridge/amd/pi/hudson/sata.c
+++ b/src/southbridge/amd/pi/hudson/sata.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/pi/hudson/sd.c b/src/southbridge/amd/pi/hudson/sd.c
index a87367f..3011717 100644
--- a/src/southbridge/amd/pi/hudson/sd.c
+++ b/src/southbridge/amd/pi/hudson/sd.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include "hudson.h"
static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index b369155..aaa1254 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -20,7 +20,6 @@
#include <device/pci_ops.h>
#include <device/smbus.h>
#include <pc80/mc146818rtc.h>
-#include <arch/io.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
#include <stdlib.h>
diff --git a/src/southbridge/amd/pi/hudson/usb.c b/src/southbridge/amd/pi/hudson/usb.c
index 0d9102a..0bda71a 100644
--- a/src/southbridge/amd/pi/hudson/usb.c
+++ b/src/southbridge/amd/pi/hudson/usb.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/pci_ehci.h>
-#include <arch/io.h>
#include "hudson.h"
static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c
index b849e1e..7d56e3c 100644
--- a/src/southbridge/amd/rs780/cmn.c
+++ b/src/southbridge/amd/rs780/cmn.c
@@ -15,7 +15,6 @@
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 017c764..ff10887 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -14,7 +14,6 @@
*/
#include <types.h>
-#include <arch/io.h>
#include <northbridge/amd/amdmct/mct/mct_d.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index e77db5c..8faeb06 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
#define IO_MEM_PORT_DECODE_ENABLE_5 0x48
diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 8dd0c01..67f8bdd 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <device/device.h>
#include <cpu/amd/powernow.h>
#include "sb700.h"
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 6569e39..32fbff5 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -26,7 +26,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <pc80/isa-dma.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <cbmem.h>
#include <cpu/amd/powernow.h>
diff --git a/src/southbridge/amd/sb700/smbus.h b/src/southbridge/amd/sb700/smbus.h
index 1b90091..179fbf0 100644
--- a/src/southbridge/amd/sb700/smbus.h
+++ b/src/southbridge/amd/sb700/smbus.h
@@ -19,7 +19,6 @@
#include <stdint.h>
#include "stddef.h"
-#include <arch/io.h>
#define SMBUS_IO_BASE 0xb00
#define SMBUS_AUX_IO_BASE 0xb20
diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index e95d4e9..5a3a185 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
/*
diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c
index ce64036..ea52e29 100644
--- a/src/southbridge/amd/sb800/fadt.c
+++ b/src/southbridge/amd/sb800/fadt.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <console/console.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <device/device.h>
#include <cpu/amd/powernow.h>
#include "sb800.h"
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 3bbf823..5c0464d 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -24,7 +24,6 @@
#include <pc80/i8254.h>
#include <pc80/i8259.h>
#include <pc80/isa-dma.h>
-#include <arch/io.h>
#include <arch/acpi.h>
#include "sb800.h"
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index 859e15d..1d47943 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -17,7 +17,6 @@
#ifndef __SR5650_CMN_H__
#define __SR5650_CMN_H__
-#include <arch/io.h>
#define NBMISC_INDEX 0x60
#define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */
diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c
index 2861ff0..a1ca36d 100644
--- a/src/southbridge/broadcom/bcm5785/bootblock.c
+++ b/src/southbridge/broadcom/bcm5785/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
/* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */
diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c
index 8619cbd..a091e9f 100644
--- a/src/southbridge/broadcom/bcm5785/lpc.c
+++ b/src/southbridge/broadcom/bcm5785/lpc.c
@@ -22,7 +22,6 @@
#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include "bcm5785.h"
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index 8541903..3a2b3d7 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/early_spi.c b/src/southbridge/intel/bd82x6x/early_spi.c
index 1400837..f0ba989 100644
--- a/src/southbridge/intel/bd82x6x/early_spi.c
+++ b/src/southbridge/intel/bd82x6x/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
index 4b9061e..4902bb0 100644
--- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 00265d0..4dc1751 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <delay.h>
#ifdef __SMM__
-#include <arch/io.h>
#include <device/pci_def.h>
#else /* !__SMM__ */
#include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index 1b2755b..cf8f741 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -20,7 +20,6 @@
#include <device/pci_ids.h>
#include "pch.h"
#include <device/pci_ehci.h>
-#include <arch/io.h>
static void usb_xhci_init(struct device *dev)
{
diff --git a/src/southbridge/intel/bd82x6x/watchdog.c b/src/southbridge/intel/bd82x6x/watchdog.c
index eb4d38c..7cf38a8 100644
--- a/src/southbridge/intel/bd82x6x/watchdog.c
+++ b/src/southbridge/intel/bd82x6x/watchdog.c
@@ -16,7 +16,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 1f1a2ab..ffdb0fc 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpigen.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c
index ac72eba..c69aca8 100644
--- a/src/southbridge/intel/common/pmutil.c
+++ b/src/southbridge/intel/common/pmutil.c
@@ -15,7 +15,6 @@
*/
#include <types.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index d87e018..8c6af50 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -17,7 +17,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_bd82x6x/bootblock.c b/src/southbridge/intel/fsp_bd82x6x/bootblock.c
index 67acbb1..86e8aff 100644
--- a/src/southbridge/intel/fsp_bd82x6x/bootblock.c
+++ b/src/southbridge/intel/fsp_bd82x6x/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "pch.h"
diff --git a/src/southbridge/intel/fsp_bd82x6x/early_spi.c b/src/southbridge/intel/fsp_bd82x6x/early_spi.c
index 1400837..f0ba989 100644
--- a/src/southbridge/intel/fsp_bd82x6x/early_spi.c
+++ b/src/southbridge/intel/fsp_bd82x6x/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_bd82x6x/early_usb.c b/src/southbridge/intel/fsp_bd82x6x/early_usb.c
index 4b9061e..4902bb0 100644
--- a/src/southbridge/intel/fsp_bd82x6x/early_usb.c
+++ b/src/southbridge/intel/fsp_bd82x6x/early_usb.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_i89xx/bootblock.c b/src/southbridge/intel/fsp_i89xx/bootblock.c
index acd53dc..fe55612 100644
--- a/src/southbridge/intel/fsp_i89xx/bootblock.c
+++ b/src/southbridge/intel/fsp_i89xx/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "pch.h"
diff --git a/src/southbridge/intel/fsp_i89xx/early_spi.c b/src/southbridge/intel/fsp_i89xx/early_spi.c
index 1400837..f0ba989 100644
--- a/src/southbridge/intel/fsp_i89xx/early_spi.c
+++ b/src/southbridge/intel/fsp_i89xx/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_i89xx/early_usb.c b/src/southbridge/intel/fsp_i89xx/early_usb.c
index 29ab981..967b39b 100644
--- a/src/southbridge/intel/fsp_i89xx/early_usb.c
+++ b/src/southbridge/intel/fsp_i89xx/early_usb.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_spi.c b/src/southbridge/intel/fsp_rangeley/early_spi.c
index dbf6003..41c23ad 100644
--- a/src/southbridge/intel/fsp_rangeley/early_spi.c
+++ b/src/southbridge/intel/fsp_rangeley/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c
index dfd8cc2..6c85a4d 100644
--- a/src/southbridge/intel/fsp_rangeley/early_usb.c
+++ b/src/southbridge/intel/fsp_rangeley/early_usb.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c
index 0ffe45e..ade507a 100644
--- a/src/southbridge/intel/fsp_rangeley/smbus.c
+++ b/src/southbridge/intel/fsp_rangeley/smbus.c
@@ -21,7 +21,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
#include "soc.h"
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index c59343d..f110a2f 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ids.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c
index 1794393..4862c1d 100644
--- a/src/southbridge/intel/i82371eb/early_pm.c
+++ b/src/southbridge/intel/i82371eb/early_pm.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index 1fea0ff..5e0ff3f 100644
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -19,7 +19,6 @@
#if !defined(__ASSEMBLER__) && !defined(__ACPI__)
#if !defined(__PRE_RAM__)
-#include <arch/io.h>
#include <device/device.h>
#include "chip.h"
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index 8ae419d..c10d5d2 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
static void bootblock_southbridge_init(void)
{
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index c9c19a3..9940665 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index 917321c..7e95beb 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index bb025b0..e8f5874 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
static void store_initial_timestamp(void)
diff --git a/src/southbridge/intel/i82801ix/dmi_setup.c b/src/southbridge/intel/i82801ix/dmi_setup.c
index 24fe347..663c6d3 100644
--- a/src/southbridge/intel/i82801ix/dmi_setup.c
+++ b/src/southbridge/intel/i82801ix/dmi_setup.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <northbridge/intel/gm45/gm45.h>
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index dc45510..ad97447 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -21,7 +21,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801ix.h"
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c
index e60fa9b..fd8c50b 100644
--- a/src/southbridge/intel/i82801ix/smihandler.c
+++ b/src/southbridge/intel/i82801ix/smihandler.c
@@ -16,7 +16,6 @@
*/
#include <types.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index 115555c..a2adfee 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "i82801jx.h"
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index d3f0711..bc12177 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -21,7 +21,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <arch/io.h>
#include <southbridge/intel/common/smbus.h>
#include "i82801jx.h"
diff --git a/src/southbridge/intel/i82870/pci_parity.c b/src/southbridge/intel/i82870/pci_parity.c
index 94b2f31..3bb05cc 100644
--- a/src/southbridge/intel/i82870/pci_parity.c
+++ b/src/southbridge/intel/i82870/pci_parity.c
@@ -12,7 +12,6 @@
*/
#include <pci.h>
-#include <arch/io.h>
#include <printk.h>
#
diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c
index d776c9f..bd18dda 100644
--- a/src/southbridge/intel/ibexpeak/madt.c
+++ b/src/southbridge/intel/ibexpeak/madt.c
@@ -17,7 +17,6 @@
#include <string.h>
#include <console/console.h>
-#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 20d0ee3..7cc31a9 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cpu/x86/tsc.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/early_spi.c b/src/southbridge/intel/lynxpoint/early_spi.c
index 1400837..f0ba989 100644
--- a/src/southbridge/intel/lynxpoint/early_spi.c
+++ b/src/southbridge/intel/lynxpoint/early_spi.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
index fbc7b37..eee6f22 100644
--- a/src/southbridge/intel/lynxpoint/early_usb.c
+++ b/src/southbridge/intel/lynxpoint/early_usb.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index cb01de7..18e52a6 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <delay.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/lynxpoint/rcba.c b/src/southbridge/intel/lynxpoint/rcba.c
index 24b745d..b89f142 100644
--- a/src/southbridge/intel/lynxpoint/rcba.c
+++ b/src/southbridge/intel/lynxpoint/rcba.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/pci_def.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include "pch.h"
diff --git a/src/southbridge/nvidia/ck804/bootblock.c b/src/southbridge/nvidia/ck804/bootblock.c
index 24ca0a8..8067e0c 100644
--- a/src/southbridge/nvidia/ck804/bootblock.c
+++ b/src/southbridge/nvidia/ck804/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include "ck804.h"
static void ck804_enable_rom(void)
diff --git a/src/southbridge/nvidia/ck804/ck804.c b/src/southbridge/nvidia/ck804/ck804.c
index 5fd9084..bb20be5 100644
--- a/src/southbridge/nvidia/ck804/ck804.c
+++ b/src/southbridge/nvidia/ck804/ck804.c
@@ -15,7 +15,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c
index 7296e05..170934b 100644
--- a/src/southbridge/nvidia/ck804/enable_usbdebug.c
+++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c
@@ -21,7 +21,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include "ck804.h"
diff --git a/src/southbridge/nvidia/ck804/smbus.c b/src/southbridge/nvidia/ck804/smbus.c
index 4a4ac2f..16a7adc 100644
--- a/src/southbridge/nvidia/ck804/smbus.c
+++ b/src/southbridge/nvidia/ck804/smbus.c
@@ -20,7 +20,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
-#include <arch/io.h>
#include "chip.h"
#include "smbus.h"
diff --git a/src/southbridge/nvidia/mcp55/bootblock.c b/src/southbridge/nvidia/mcp55/bootblock.c
index 6d24f56..0f865ba 100644
--- a/src/southbridge/nvidia/mcp55/bootblock.c
+++ b/src/southbridge/nvidia/mcp55/bootblock.c
@@ -18,7 +18,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include "mcp55.h"
static void mcp55_enable_rom(void)
diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
index 69e0859..5615cca 100644
--- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
@@ -21,7 +21,6 @@
#define __SIMPLE_DEVICE__
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include "mcp55.h"
diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c
index 8064b12..58a347c 100644
--- a/src/southbridge/nvidia/mcp55/fadt.c
+++ b/src/southbridge/nvidia/mcp55/fadt.c
@@ -19,7 +19,6 @@
#include <console/console.h>
#include <string.h>
#include <arch/acpi.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/nvidia/mcp55/mcp55.c b/src/southbridge/nvidia/mcp55/mcp55.c
index 629fbac..05f58ae 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.c
+++ b/src/southbridge/nvidia/mcp55/mcp55.c
@@ -18,7 +18,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c
index 244759d..b80311b 100644
--- a/src/southbridge/nvidia/mcp55/smbus.c
+++ b/src/southbridge/nvidia/mcp55/smbus.c
@@ -23,7 +23,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus.h>
-#include <arch/io.h>
#include "mcp55.h"
#include "smbus.h"
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 786a510..4d8b6e6 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pci1x2x/pci1x2x.c b/src/southbridge/ti/pci1x2x/pci1x2x.c
index e670a43..f84d866 100644
--- a/src/southbridge/ti/pci1x2x/pci1x2x.c
+++ b/src/southbridge/ti/pci1x2x/pci1x2x.c
@@ -20,7 +20,6 @@
#include <device/pci_ops.h>
#include <device/cardbus.h>
#include <console/console.h>
-#include <arch/io.h>
#include "chip.h"
static void ti_pci1x2y_init(struct device *dev)
diff --git a/src/southbridge/ti/pci7420/cardbus.c b/src/southbridge/ti/pci7420/cardbus.c
index 910b0c8..4abad8b 100644
--- a/src/southbridge/ti/pci7420/cardbus.c
+++ b/src/southbridge/ti/pci7420/cardbus.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pci7420/firewire.c b/src/southbridge/ti/pci7420/firewire.c
index e42b6a6..9a288e0 100644
--- a/src/southbridge/ti/pci7420/firewire.c
+++ b/src/southbridge/ti/pci7420/firewire.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c
index ab7231e..fdedbfa 100644
--- a/src/southbridge/ti/pcixx12/pcixx12.c
+++ b/src/southbridge/ti/pcixx12/pcixx12.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/via/common/early_smbus_delay.c b/src/southbridge/via/common/early_smbus_delay.c
index 0c04112..09bd416 100644
--- a/src/southbridge/via/common/early_smbus_delay.c
+++ b/src/southbridge/via/common/early_smbus_delay.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include "via_early_smbus.h"
/**
diff --git a/src/southbridge/via/common/early_smbus_is_busy.c b/src/southbridge/via/common/early_smbus_is_busy.c
index f719cb9..361d0eb 100644
--- a/src/southbridge/via/common/early_smbus_is_busy.c
+++ b/src/southbridge/via/common/early_smbus_is_busy.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include "via_early_smbus.h"
/**
diff --git a/src/southbridge/via/common/early_smbus_reset.c b/src/southbridge/via/common/early_smbus_reset.c
index 6145ab8..fa47de7 100644
--- a/src/southbridge/via/common/early_smbus_reset.c
+++ b/src/southbridge/via/common/early_smbus_reset.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include "via_early_smbus.h"
/**
diff --git a/src/southbridge/via/common/early_smbus_wait_until_ready.c b/src/southbridge/via/common/early_smbus_wait_until_ready.c
index 121803e..dbccce7 100644
--- a/src/southbridge/via/common/early_smbus_wait_until_ready.c
+++ b/src/southbridge/via/common/early_smbus_wait_until_ready.c
@@ -16,6 +16,7 @@
#include "via_early_smbus.h"
#include <console/console.h>
+#include <arch/io.h>
/**
* \brief Wait for the SMBus to become ready to process a new transaction.
diff --git a/src/southbridge/via/common/via_early_smbus.h b/src/southbridge/via/common/via_early_smbus.h
index 5f66822..f538577 100644
--- a/src/southbridge/via/common/via_early_smbus.h
+++ b/src/southbridge/via/common/via_early_smbus.h
@@ -50,4 +50,3 @@
#define SMBUS_TIMEOUT (100*1000*10)
#include <device/early_smbus.h>
-#include <arch/io.h>
diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h
index e083278..4f810f5 100644
--- a/src/superio/fintek/common/fintek.h
+++ b/src/superio/fintek/common/fintek.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_FINTEK_COMMON_ROMSTAGE_H
#define SUPERIO_FINTEK_COMMON_ROMSTAGE_H
-#include <arch/io.h>
#include <stdint.h>
void fintek_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c
index d702eec..d7f7e2d 100644
--- a/src/superio/fintek/f71805f/superio.c
+++ b/src/superio/fintek/f71805f/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f71808a/f71808a_hwm.c b/src/superio/fintek/f71808a/f71808a_hwm.c
index 1f53323..a370219 100644
--- a/src/superio/fintek/f71808a/f71808a_hwm.c
+++ b/src/superio/fintek/f71808a/f71808a_hwm.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/superio/fintek/f71808a/f71808a_multifunc.c b/src/superio/fintek/f71808a/f71808a_multifunc.c
index be4ff04..32119e2 100644
--- a/src/superio/fintek/f71808a/f71808a_multifunc.c
+++ b/src/superio/fintek/f71808a/f71808a_multifunc.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include "chip.h"
diff --git a/src/superio/fintek/f71808a/fintek_internal.h b/src/superio/fintek/f71808a/fintek_internal.h
index 715ae5d..7bdb94d 100644
--- a/src/superio/fintek/f71808a/fintek_internal.h
+++ b/src/superio/fintek/f71808a/fintek_internal.h
@@ -18,7 +18,6 @@
#ifndef SUPERIO_FINTEK_F71808A_INTERNAL_H
#define SUPERIO_FINTEK_F71808A_INTERNAL_H
-#include <arch/io.h>
#include <device/pnp.h>
void f71808a_multifunc_init(struct device *dev);
diff --git a/src/superio/fintek/f71808a/superio.c b/src/superio/fintek/f71808a/superio.c
index e8fcd95..4726eef 100644
--- a/src/superio/fintek/f71808a/superio.c
+++ b/src/superio/fintek/f71808a/superio.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c
index 976cb87f..192ee9b 100644
--- a/src/superio/fintek/f71859/superio.c
+++ b/src/superio/fintek/f71859/superio.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c
index bfa0aee..3229736 100644
--- a/src/superio/fintek/f71863fg/superio.c
+++ b/src/superio/fintek/f71863fg/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f71869ad/f71869ad_hwm.c b/src/superio/fintek/f71869ad/f71869ad_hwm.c
index b0b1a6b..329da35 100644
--- a/src/superio/fintek/f71869ad/f71869ad_hwm.c
+++ b/src/superio/fintek/f71869ad/f71869ad_hwm.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/superio/fintek/f71869ad/f71869ad_multifunc.c b/src/superio/fintek/f71869ad/f71869ad_multifunc.c
index 1d0b98a..dcfbb4d 100644
--- a/src/superio/fintek/f71869ad/f71869ad_multifunc.c
+++ b/src/superio/fintek/f71869ad/f71869ad_multifunc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include "chip.h"
diff --git a/src/superio/fintek/f71869ad/fintek_internal.h b/src/superio/fintek/f71869ad/fintek_internal.h
index 25b3468..2aeb896 100644
--- a/src/superio/fintek/f71869ad/fintek_internal.h
+++ b/src/superio/fintek/f71869ad/fintek_internal.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_FINTEK_F71869AD_INTERNAL_H
#define SUPERIO_FINTEK_F71869AD_INTERNAL_H
-#include <arch/io.h>
#include <device/pnp.h>
void f71869ad_multifunc_init(struct device *dev);
diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c
index 7fc4db4..ddb1110 100644
--- a/src/superio/fintek/f71869ad/superio.c
+++ b/src/superio/fintek/f71869ad/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c
index f26a0c6..0ea7ff4 100644
--- a/src/superio/fintek/f71872/superio.c
+++ b/src/superio/fintek/f71872/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c
index 08cbd90..7de4af6 100644
--- a/src/superio/fintek/f81865f/superio.c
+++ b/src/superio/fintek/f81865f/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c
index b0c4cfc..8b6435c 100644
--- a/src/superio/fintek/f81866d/f81866d_hwm.c
+++ b/src/superio/fintek/f81866d/f81866d_hwm.c
@@ -20,7 +20,6 @@
* Todo: Add support for Fan1 and Fan3
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/superio/fintek/f81866d/f81866d_uart.c b/src/superio/fintek/f81866d/f81866d_uart.c
index 4a198d0..79d5b31 100644
--- a/src/superio/fintek/f81866d/f81866d_uart.c
+++ b/src/superio/fintek/f81866d/f81866d_uart.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/superio/fintek/f81866d/fintek_internal.h b/src/superio/fintek/f81866d/fintek_internal.h
index 977a47d..3b06f48 100644
--- a/src/superio/fintek/f81866d/fintek_internal.h
+++ b/src/superio/fintek/f81866d/fintek_internal.h
@@ -19,7 +19,6 @@
#ifndef SUPERIO_FINTEK_F81866D_INTERNAL_H
#define SUPERIO_FINTEK_F81866D_INTERNAL_H
-#include <arch/io.h>
#include <device/pnp.h>
void f81866d_hwm_init(struct device *dev);
diff --git a/src/superio/fintek/f81866d/superio.c b/src/superio/fintek/f81866d/superio.c
index 7678383..2414478 100644
--- a/src/superio/fintek/f81866d/superio.c
+++ b/src/superio/fintek/f81866d/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 7e0e80e..c24b78c 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_ITE_COMMON_ROMSTAGE_H
#define SUPERIO_ITE_COMMON_ROMSTAGE_H
-#include <arch/io.h>
#include <stdint.h>
#define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */
diff --git a/src/superio/ite/it8623e/superio.c b/src/superio/ite/it8623e/superio.c
index d735a59..5fdfcef 100644
--- a/src/superio/ite/it8623e/superio.c
+++ b/src/superio/ite/it8623e/superio.c
@@ -19,7 +19,6 @@
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <stdlib.h>
#include <superio/conf_mode.h>
#include <superio/ite/common/env_ctrl.h>
diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h
index 4b1ab42..482ab71 100644
--- a/src/superio/ite/it8671f/it8671f.h
+++ b/src/superio/ite/it8671f/it8671f.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_ITE_IT8671F_H
#define SUPERIO_ITE_IT8671F_H
-#include <arch/io.h>
#include <stdint.h>
/* Datasheet: Not available online, got it from ITE per request. */
diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c
index 64cc9cf..6f096b0 100644
--- a/src/superio/ite/it8712f/superio.c
+++ b/src/superio/ite/it8712f/superio.c
@@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <stdlib.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c
index 50ab2b9..b5a117f 100644
--- a/src/superio/ite/it8716f/superio.c
+++ b/src/superio/ite/it8716f/superio.c
@@ -21,7 +21,6 @@
#include <device/pnp.h>
#include <console/console.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <stdlib.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/ite/it8718f/early_serial.c b/src/superio/ite/it8718f/early_serial.c
index 915e10b..68ae2fb 100644
--- a/src/superio/ite/it8718f/early_serial.c
+++ b/src/superio/ite/it8718f/early_serial.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <superio/ite/common/ite.h>
#include "it8718f.h"
diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h
index 8985997..41c938d 100644
--- a/src/superio/ite/it8718f/it8718f.h
+++ b/src/superio/ite/it8718f/it8718f.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_ITE_IT8718F_H
#define SUPERIO_ITE_IT8718F_H
-#include <arch/io.h>
/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8718_2.asp */
diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c
index 912a4c3..76b7324 100644
--- a/src/superio/ite/it8728f/superio.c
+++ b/src/superio/ite/it8728f/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h
index 91d107a..e2b4219 100644
--- a/src/superio/ite/it8772f/it8772f.h
+++ b/src/superio/ite/it8772f/it8772f.h
@@ -126,7 +126,6 @@
/* GPIO Mode: 0: input mode, 1: output mode */
#define GPIO_REG_OUTPUT(x) (0xc8 + (x))
-#include <arch/io.h>
#include <stdint.h>
u8 it8772f_sio_read(pnp_devfn_t dev, u8 reg);
diff --git a/src/superio/ite/it8783ef/it8783ef.h b/src/superio/ite/it8783ef/it8783ef.h
index 8706716..bdaea5a3 100644
--- a/src/superio/ite/it8783ef/it8783ef.h
+++ b/src/superio/ite/it8783ef/it8783ef.h
@@ -31,7 +31,6 @@
#define IT8783EF_SP6 0x0b /* COM6 */
#define IT8783EF_CIR 0x0c /* Consumer IR */
-#include <arch/io.h>
#include <stdint.h>
#endif /* SUPERIO_ITE_IT8783EF_H */
diff --git a/src/superio/nsc/pc87309/early_serial.c b/src/superio/nsc/pc87309/early_serial.c
index 6b1ccd2..83a7387 100644
--- a/src/superio/nsc/pc87309/early_serial.c
+++ b/src/superio/nsc/pc87309/early_serial.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pnp_def.h>
#include "pc87309.h"
diff --git a/src/superio/nsc/pc87309/pc87309.h b/src/superio/nsc/pc87309/pc87309.h
index dfc2de1..b5a837a 100644
--- a/src/superio/nsc/pc87309/pc87309.h
+++ b/src/superio/nsc/pc87309/pc87309.h
@@ -27,7 +27,6 @@
#define PC87309_KBCM 0x05 /* Mouse */
#define PC87309_KBCK 0x06 /* Keyboard */
-#include <arch/io.h>
#include <stdint.h>
void pc87309_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c
index ba5d97a..0c8fb0c 100644
--- a/src/superio/nsc/pc87309/superio.c
+++ b/src/superio/nsc/pc87309/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/nsc/pc87360/early_serial.c b/src/superio/nsc/pc87360/early_serial.c
index 371761e..d7f719f 100644
--- a/src/superio/nsc/pc87360/early_serial.c
+++ b/src/superio/nsc/pc87360/early_serial.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "pc87360.h"
diff --git a/src/superio/nsc/pc87360/pc87360.h b/src/superio/nsc/pc87360/pc87360.h
index 31680b4..26c5189 100644
--- a/src/superio/nsc/pc87360/pc87360.h
+++ b/src/superio/nsc/pc87360/pc87360.h
@@ -30,7 +30,6 @@
#define PC87360_FSCM 0x09
#define PC87360_WDT 0x0A
-#include <arch/io.h>
#include <stdint.h>
void pc87360_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c
index 85ccdea..0d1691c 100644
--- a/src/superio/nsc/pc87360/superio.c
+++ b/src/superio/nsc/pc87360/superio.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc87366/early_serial.c b/src/superio/nsc/pc87366/early_serial.c
index b088093..5e48435 100644
--- a/src/superio/nsc/pc87366/early_serial.c
+++ b/src/superio/nsc/pc87366/early_serial.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "pc87366.h"
diff --git a/src/superio/nsc/pc87366/pc87366.h b/src/superio/nsc/pc87366/pc87366.h
index 7f4a995..d4ea9f1b 100644
--- a/src/superio/nsc/pc87366/pc87366.h
+++ b/src/superio/nsc/pc87366/pc87366.h
@@ -34,7 +34,6 @@
#define PC87366_VLM 0x0D
#define PC87366_TMS 0x0E
-#include <arch/io.h>
#include <stdint.h>
void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c
index 6883e81..0b5773e 100644
--- a/src/superio/nsc/pc87366/superio.c
+++ b/src/superio/nsc/pc87366/superio.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc87382/superio.c b/src/superio/nsc/pc87382/superio.c
index 8e0d61c..fb2ded0 100644
--- a/src/superio/nsc/pc87382/superio.c
+++ b/src/superio/nsc/pc87382/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc87384/superio.c b/src/superio/nsc/pc87384/superio.c
index a24e1b6..c39bbdd 100644
--- a/src/superio/nsc/pc87384/superio.c
+++ b/src/superio/nsc/pc87384/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc87392/early_serial.c b/src/superio/nsc/pc87392/early_serial.c
index f8eb255..fcff67e 100644
--- a/src/superio/nsc/pc87392/early_serial.c
+++ b/src/superio/nsc/pc87392/early_serial.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include "pc87392.h"
static void pc87392_enable_serial(pnp_devfn_t dev, u16 iobase)
diff --git a/src/superio/nsc/pc87392/superio.c b/src/superio/nsc/pc87392/superio.c
index bf02e19..49d3984 100644
--- a/src/superio/nsc/pc87392/superio.c
+++ b/src/superio/nsc/pc87392/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc87417/early_serial.c b/src/superio/nsc/pc87417/early_serial.c
index 372709a..9db8082 100644
--- a/src/superio/nsc/pc87417/early_serial.c
+++ b/src/superio/nsc/pc87417/early_serial.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "pc87417.h"
diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h
index f118308..4f6914b 100644
--- a/src/superio/nsc/pc87417/pc87417.h
+++ b/src/superio/nsc/pc87417/pc87417.h
@@ -110,7 +110,6 @@
#define PC87417_XSCNF 0x15
#define PC87417_XWBCNF 0x16
-#include <arch/io.h>
#include <stdint.h>
void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c
index 73b7655..9bf9de6 100644
--- a/src/superio/nsc/pc87417/superio.c
+++ b/src/superio/nsc/pc87417/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h
index 1d82817..55b4bb4 100644
--- a/src/superio/nsc/pc97317/pc97317.h
+++ b/src/superio/nsc/pc97317/pc97317.h
@@ -27,7 +27,6 @@
#define PC97317_GPIO 0x07
#define PC97317_PM 0x08 /* Power Management */
-#include <arch/io.h>
#include <stdint.h>
void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c
index c840ced..0aae2a4 100644
--- a/src/superio/nsc/pc97317/superio.c
+++ b/src/superio/nsc/pc97317/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h
index 614b039..5cc227c 100644
--- a/src/superio/nuvoton/common/nuvoton.h
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -18,7 +18,6 @@
#ifndef SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
#define SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
-#include <arch/io.h>
#include <stdint.h>
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c
index 47687e1..8eaa213 100644
--- a/src/superio/nuvoton/nct5104d/superio.c
+++ b/src/superio/nuvoton/nct5104d/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
#include <stdlib.h>
diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c
index 10542d5..670bf33 100644
--- a/src/superio/nuvoton/nct5572d/superio.c
+++ b/src/superio/nuvoton/nct5572d/superio.c
@@ -17,7 +17,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/nuvoton/nct6776/superio.c b/src/superio/nuvoton/nct6776/superio.c
index 033f646..e399c0a 100644
--- a/src/superio/nuvoton/nct6776/superio.c
+++ b/src/superio/nuvoton/nct6776/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c
index 465ef66..51cb5ed 100644
--- a/src/superio/nuvoton/nct6779d/superio.c
+++ b/src/superio/nuvoton/nct6779d/superio.c
@@ -17,7 +17,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/nuvoton/nct6791d/superio.c b/src/superio/nuvoton/nct6791d/superio.c
index c2d5f2e..3a6d740 100644
--- a/src/superio/nuvoton/nct6791d/superio.c
+++ b/src/superio/nuvoton/nct6791d/superio.c
@@ -18,7 +18,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c
index 05078eb..c89186f 100644
--- a/src/superio/nuvoton/wpcm450/superio.c
+++ b/src/superio/nuvoton/wpcm450/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c
index f85a39d..dd25ca7 100644
--- a/src/superio/renesas/m3885x/superio.c
+++ b/src/superio/renesas/m3885x/superio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/serverengines/pilot/early_init.c b/src/superio/serverengines/pilot/early_init.c
index 82438e4..a28f52c 100644
--- a/src/superio/serverengines/pilot/early_init.c
+++ b/src/superio/serverengines/pilot/early_init.c
@@ -19,7 +19,6 @@
#define BLUBB_DEV PNP_DEV(port, 0x04)
-#include <arch/io.h>
#include <console/console.h>
#include <device/pnp.h>
#include "pilot.h"
diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h
index 3a5683b..917e9bd 100644
--- a/src/superio/smsc/dme1737/dme1737.h
+++ b/src/superio/smsc/dme1737/dme1737.h
@@ -26,7 +26,6 @@
#define DME1737_KBC 7 /* Keyboard & Mouse */
#define DME1737_RT 10 /* Runtime reg*/
-#include <arch/io.h>
#include <stdint.h>
void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c
index 42b9284..74ef5c1 100644
--- a/src/superio/smsc/dme1737/superio.c
+++ b/src/superio/smsc/dme1737/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h
index 41d70e5..1c1118d 100644
--- a/src/superio/smsc/kbc1100/kbc1100.h
+++ b/src/superio/smsc/kbc1100/kbc1100.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_SMSC_KBC1100_H
#define SUPERIO_SMSC_KBC1100_H
-#include <arch/io.h>
#include <stdint.h>
#define KBC1100_PM1 1 /* PM1 */
diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c
index bca4067..435d874 100644
--- a/src/superio/smsc/kbc1100/superio.c
+++ b/src/superio/smsc/kbc1100/superio.c
@@ -15,7 +15,6 @@
/* RAM driver for the SMSC KBC1100 Super I/O chip */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
index d1f5f74..d28c144 100644
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ b/src/superio/smsc/lpc47b272/lpc47b272.h
@@ -26,7 +26,6 @@
#define LPC47B272_MAX_CONFIG_REGISTER 0x5F
-#include <arch/io.h>
#include <stdint.h>
void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
index ded4bb0..ef58467 100644
--- a/src/superio/smsc/lpc47b272/superio.c
+++ b/src/superio/smsc/lpc47b272/superio.c
@@ -19,7 +19,6 @@
/* RAM driver for SMSC LPC47B272 Super I/O chip. */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h
index 43fc624..1fba456 100644
--- a/src/superio/smsc/lpc47b397/lpc47b397.h
+++ b/src/superio/smsc/lpc47b397/lpc47b397.h
@@ -27,7 +27,6 @@
#define LPC47B397_HWM 8 /* HW Monitor */
#define LPC47B397_RT 10 /* Runtime reg*/
-#include <arch/io.h>
#include <stdint.h>
void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
index ab2271a..82e075a 100644
--- a/src/superio/smsc/lpc47b397/superio.c
+++ b/src/superio/smsc/lpc47b397/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h
index 3a3bf96..94bd721 100644
--- a/src/superio/smsc/lpc47m10x/lpc47m10x.h
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h
@@ -30,7 +30,6 @@
#define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F
-#include <arch/io.h>
#include <stdint.h>
void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c
index 18618d3..535d3d6 100644
--- a/src/superio/smsc/lpc47m10x/superio.c
+++ b/src/superio/smsc/lpc47m10x/superio.c
@@ -18,7 +18,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x.h b/src/superio/smsc/lpc47m15x/lpc47m15x.h
index 179b5c0..07e8dd3 100644
--- a/src/superio/smsc/lpc47m15x/lpc47m15x.h
+++ b/src/superio/smsc/lpc47m15x/lpc47m15x.h
@@ -27,7 +27,6 @@
#define LPC47M15X2_MAX_CONFIG_REGISTER 0x5F
-#include <arch/io.h>
#include <stdint.h>
void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c
index 41339c1..db8ae91 100644
--- a/src/superio/smsc/lpc47m15x/superio.c
+++ b/src/superio/smsc/lpc47m15x/superio.c
@@ -15,7 +15,6 @@
/* RAM driver for the SMSC LPC47M15X Super I/O chip */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/lpc47n207/lpc47n207.h b/src/superio/smsc/lpc47n207/lpc47n207.h
index f9f7796..e13d10a 100644
--- a/src/superio/smsc/lpc47n207/lpc47n207.h
+++ b/src/superio/smsc/lpc47n207/lpc47n207.h
@@ -16,7 +16,6 @@
#ifndef SUPERIO_SMSC_LPC47N207_H
#define SUPERIO_SMSC_LPC47N207_H
-#include <arch/io.h>
#include <stdint.h>
void try_enabling_LPC47N207_uart(void);
diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h
index 1cae5a0..051ac83 100644
--- a/src/superio/smsc/lpc47n217/lpc47n217.h
+++ b/src/superio/smsc/lpc47n217/lpc47n217.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_SMSC_LPC47N217_LPC47N217_H
#define SUPERIO_SMSC_LPC47N217_LPC47N217_H
-#include <arch/io.h>
#include <stdint.h>
/*
diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c
index 13eb9f2..3574c5f 100644
--- a/src/superio/smsc/lpc47n227/superio.c
+++ b/src/superio/smsc/lpc47n227/superio.c
@@ -16,7 +16,6 @@
/* RAM-based driver for SMSC LPC47N227 Super I/O chip. */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c
index 2f17deb..2b0dffa 100644
--- a/src/superio/smsc/mec1308/superio.c
+++ b/src/superio/smsc/mec1308/superio.c
@@ -15,7 +15,6 @@
/* RAM driver for the SMSC MEC1308 Super I/O chip */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c
index 5165dd6..14aaaea 100644
--- a/src/superio/smsc/sch4037/superio.c
+++ b/src/superio/smsc/sch4037/superio.c
@@ -15,7 +15,6 @@
/* RAM driver for the SMSC KBC1100 Super I/O chip */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
index 683dcd1..0e6cacf 100644
--- a/src/superio/smsc/sio1036/sio1036.h
+++ b/src/superio/smsc/sio1036/sio1036.h
@@ -22,7 +22,6 @@
#define LPT_POWER_DOWN (1 << 2)
#define IR_OUTPUT_MUX (1 << 6)
-#include <arch/io.h>
#include <stdint.h>
void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c
index 5725a62..b0b444e 100644
--- a/src/superio/smsc/sio1036/superio.c
+++ b/src/superio/smsc/sio1036/superio.c
@@ -15,7 +15,6 @@
/* RAM driver for the SMSC SIO1036 Super I/O chip */
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h
index 9e088b8..7caf79e 100644
--- a/src/superio/smsc/smscsuperio/smscsuperio.h
+++ b/src/superio/smsc/smscsuperio/smscsuperio.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_SMSC_SMSCSUPERIO_H
#define SUPERIO_SMSC_SMSCSUPERIO_H
-#include <arch/io.h>
#include <stdint.h>
/* All known/supported SMSC Super I/Os have the same logical device IDs
diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c
index 6380f88..2ed8233 100644
--- a/src/superio/smsc/smscsuperio/superio.c
+++ b/src/superio/smsc/smscsuperio/superio.c
@@ -30,7 +30,6 @@
* stuff (e.g. HWM, ACPI, SMBus) more work is probably required.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/common/winbond.h b/src/superio/winbond/common/winbond.h
index e472018..d5d6cba 100644
--- a/src/superio/winbond/common/winbond.h
+++ b/src/superio/winbond/common/winbond.h
@@ -17,7 +17,6 @@
#ifndef SUPERIO_WINBOND_COMMON_ROMSTAGE_H
#define SUPERIO_WINBOND_COMMON_ROMSTAGE_H
-#include <arch/io.h>
#include <stdint.h>
void winbond_enable_serial(pnp_devfn_t dev, uint16_t iobase);
diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c
index 23b73a2..88a6e2a 100644
--- a/src/superio/winbond/w83627dhg/superio.c
+++ b/src/superio/winbond/w83627dhg/superio.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 5370437..8572c61 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -18,7 +18,6 @@
#ifndef SUPERIO_WINBOND_W83627DHG_H
#define SUPERIO_WINBOND_W83627DHG_H
-#include <arch/io.h>
#define W83627DHG_FDC 0 /* Floppy */
#define W83627DHG_PP 1 /* Parallel port */
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index db1f98e..88acfeb 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -17,7 +17,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c
index 21c3016..23abc5e 100644
--- a/src/superio/winbond/w83627hf/superio.c
+++ b/src/superio/winbond/w83627hf/superio.c
@@ -17,7 +17,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c
index fb6e54d..6babdbc 100644
--- a/src/superio/winbond/w83627thg/superio.c
+++ b/src/superio/winbond/w83627thg/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h
index acea382..626ef11 100644
--- a/src/superio/winbond/w83627thg/w83627thg.h
+++ b/src/superio/winbond/w83627thg/w83627thg.h
@@ -19,7 +19,6 @@
#ifndef SUPERIO_WINBOND_W83627THG_W83627THG_H
#define SUPERIO_WINBOND_W83627THG_W83627THG_H
-#include <arch/io.h>
#define W83627THG_FDC 0 /* Floppy */
#define W83627THG_PP 1 /* Parallel port */
diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c
index f68aec9..1128224 100644
--- a/src/superio/winbond/w83627uhg/superio.c
+++ b/src/superio/winbond/w83627uhg/superio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c
index ceb783d..8626f5b 100644
--- a/src/superio/winbond/w83667hg-a/superio.c
+++ b/src/superio/winbond/w83667hg-a/superio.c
@@ -17,7 +17,6 @@
*/
#include <console/console.h>
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c
index b0c838e..a833e0a 100644
--- a/src/superio/winbond/w83977tf/superio.c
+++ b/src/superio/winbond/w83977tf/superio.c
@@ -16,7 +16,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
diff --git a/src/superio/winbond/wpcd376i/early_serial.c b/src/superio/winbond/wpcd376i/early_serial.c
index 115e097..a756a9f 100644
--- a/src/superio/winbond/wpcd376i/early_serial.c
+++ b/src/superio/winbond/wpcd376i/early_serial.c
@@ -17,7 +17,6 @@
/* Pre-RAM driver for the Winbond WPCD376I Super I/O chip. */
-#include <arch/io.h>
#include <device/pnp_def.h>
#include "wpcd376i.h"
diff --git a/src/superio/winbond/wpcd376i/superio.c b/src/superio/winbond/wpcd376i/superio.c
index dcfd6423..ae4fce4 100644
--- a/src/superio/winbond/wpcd376i/superio.c
+++ b/src/superio/winbond/wpcd376i/superio.c
@@ -19,7 +19,6 @@
#include <device/pnp.h>
#include <drivers/uart/uart8250reg.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <stdlib.h>
#include "chip.h"
#include "wpcd376i.h"
diff --git a/src/superio/winbond/wpcd376i/wpcd376i.h b/src/superio/winbond/wpcd376i/wpcd376i.h
index 4bb9289..f3adeb8 100644
--- a/src/superio/winbond/wpcd376i/wpcd376i.h
+++ b/src/superio/winbond/wpcd376i/wpcd376i.h
@@ -18,7 +18,6 @@
#ifndef SUPERIO_WINBOND_WPCD376I_WPCD376I_H
#define SUPERIO_WINBOND_WPCD376I_WPCD376I_H
-#include <arch/io.h>
/* Logical Device Numbers (LDN). */
#define WPCD376I_FDC 0x00 /* Floppy */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia18c77876121594a272a07d56acfaa863d0ccb25
Gerrit-Change-Number: 29307
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
1
0
Change in coreboot[master]: soc/intel/*: Make FSP header path user configurable
by Philipp Deppenwiese (Code Review) 28 Oct '18
by Philipp Deppenwiese (Code Review) 28 Oct '18
28 Oct '18
Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/29293 )
Change subject: soc/intel/*: Make FSP header path user configurable
......................................................................
soc/intel/*: Make FSP header path user configurable
Required to compensate for Chrome OS' tree differences
Change-Id: I01fe80b55c69ff57da1c96a76bd1d9b5a2d4a9a8
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-on: https://review.coreboot.org/29293
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/skylake/Kconfig
4 files changed, 4 insertions(+), 4 deletions(-)
Approvals:
build bot (Jenkins): Verified
Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 59cc31f..0c0fca9 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -201,7 +201,7 @@
The base address (in CAR) where verstage should be linked
config FSP_HEADER_PATH
- string
+ string "Location of FSP headers"
default "src/vendorcode/intel/fsp/fsp2_0/glk" if SOC_INTEL_GLK
default "3rdparty/fsp/ApolloLakeFspBinPkg/Include/"
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 161db33..9452b6d 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -264,7 +264,7 @@
endchoice
config FSP_HEADER_PATH
- string
+ string "Location of FSP headers"
default "src/vendorcode/intel/fsp/fsp2_0/cannonlake/" if !SOC_INTEL_COFFEELAKE
default "3rdparty/fsp/CoffeeLakeFspBinPkg/Include/" if SOC_INTEL_COFFEELAKE
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index bc13f4f..664add2 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -200,7 +200,7 @@
endchoice
config FSP_HEADER_PATH
- string
+ string "Location of FSP headers"
default "src/vendorcode/intel/fsp/fsp2_0/icelake/"
config FSP_FD_PATH
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 3f146a0..1449d3d 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -303,7 +303,7 @@
endchoice
config FSP_HEADER_PATH
- string
+ string "Location of FSP headers"
depends on MAINBOARD_USES_FSP2_0
# Use KabylakeFsp for both Skylake and Kabylake as it supports both.
# SkylakeFsp is FSP 1.1 and therefore incompatible.
--
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Gerrit-Project: coreboot
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Gerrit-MessageType: merged
Gerrit-Change-Id: I01fe80b55c69ff57da1c96a76bd1d9b5a2d4a9a8
Gerrit-Change-Number: 29293
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: soc/intel/*: Make FSP header path user configurable
by Philipp Deppenwiese (Code Review) 28 Oct '18
by Philipp Deppenwiese (Code Review) 28 Oct '18
28 Oct '18
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/29293 )
Change subject: soc/intel/*: Make FSP header path user configurable
......................................................................
Patch Set 1: Code-Review+2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I01fe80b55c69ff57da1c96a76bd1d9b5a2d4a9a8
Gerrit-Change-Number: 29293
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Sat, 27 Oct 2018 23:57:48 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: Yes
1
0
Change in coreboot[master]: src: Remove unneeded include <lib.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29304
to look at the new patch set (#5).
Change subject: src: Remove unneeded include <lib.h>
......................................................................
src: Remove unneeded include <lib.h>
Change-Id: I801849fb31fe6958e3d9510da50e2e2dd351a98d
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/x86/mp_init.c
M src/device/hypertransport.c
M src/drivers/intel/fsp1_0/hob.c
M src/drivers/intel/fsp1_1/fsp_gop.c
M src/drivers/intel/fsp1_1/hob.c
M src/drivers/intel/fsp2_0/hand_off_block.c
M src/drivers/intel/fsp2_0/util.c
M src/lib/hardwaremain.c
M src/lib/rmodule.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bimini_fam10/romstage.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/apple/macbook21/romstage.c
M src/mainboard/apple/macbookair4_2/early_southbridge.c
M src/mainboard/asus/kcma-d8/romstage.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/romstage.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/asus/p2b-ds/romstage.c
M src/mainboard/asus/p2b-ls/romstage.c
M src/mainboard/asus/p2b/romstage.c
M src/mainboard/asus/p3b-f/romstage.c
M src/mainboard/asus/p5gc-mx/romstage.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/compulab/intense_pc/romstage.c
M src/mainboard/esd/atom15/acpi_tables.c
M src/mainboard/getac/p470/romstage.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/hp/dl165_g6_fam10/romstage.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/intel/galileo/vboot.c
M src/mainboard/intel/minnowmax/acpi_tables.c
M src/mainboard/intel/saddlebrook/romstage.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/intel/strago/romstage.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/ktqm77/romstage.c
M src/mainboard/lenovo/s230u/romstage.c
M src/mainboard/lenovo/t400/romstage.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t60/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x200/romstage.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/lenovo/x60/romstage.c
M src/mainboard/lenovo/z61t/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/romstage.c
M src/mainboard/roda/rk886ex/romstage.c
M src/mainboard/roda/rk9/romstage.c
M src/mainboard/samsung/lumpy/romstage.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/sapphire/pureplatinumh61/romstage.c
M src/mainboard/siemens/mc_apl1/romstage.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/amdfam10/link_control.c
M src/northbridge/amd/amdfam10/nb_control.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/sandybridge/romstage.c
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/via/vx900/northbridge.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/denverton_ns/bootblock/bootblock.c
M src/soc/intel/fsp_broadwell_de/chip.c
M src/soc/nvidia/tegra124/display.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/dsi.c
M src/soc/nvidia/tegra210/include/soc/mipi_dsi.h
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/mipi.c
M src/soc/nvidia/tegra210/mipi_dsi.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/samsung/exynos5420/dp.c
M src/southbridge/amd/sr5650/ht.c
95 files changed, 4 insertions(+), 96 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/29304/5
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I801849fb31fe6958e3d9510da50e2e2dd351a98d
Gerrit-Change-Number: 29304
Gerrit-PatchSet: 5
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include "{arch, cpu}/cpu.h"
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29300
to look at the new patch set (#9).
Change subject: src: Remove unneeded include "{arch,cpu}/cpu.h"
......................................................................
src: Remove unneeded include "{arch,cpu}/cpu.h"
Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/x86/acpi_s3.c
M src/arch/x86/mpspec.c
M src/arch/x86/tables.c
M src/cpu/allwinner/a10/cpu.c
M src/cpu/amd/car/disable_cache_as_ram.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/cpu/amd/family_10h-family_15h/processor_name.c
M src/cpu/amd/family_10h-family_15h/ram_calc.c
M src/cpu/amd/quadcore/amd_sibling.c
M src/cpu/amd/quadcore/quadcore.c
M src/cpu/amd/smm/smm_init.c
M src/cpu/intel/car/romstage.c
M src/cpu/intel/fsp_model_206ax/finalize.c
M src/cpu/intel/fsp_model_406dx/bootblock.c
M src/cpu/intel/haswell/bootblock.c
M src/cpu/intel/haswell/finalize.c
M src/cpu/intel/haswell/romstage.c
M src/cpu/intel/haswell/smmrelocate.c
M src/cpu/intel/hyperthreading/intel_sibling.c
M src/cpu/intel/microcode/microcode.c
M src/cpu/intel/model_2065x/finalize.c
M src/cpu/intel/model_206ax/finalize.c
M src/cpu/intel/slot_1/l2_cache.c
M src/cpu/intel/smm/gen1/smmrelocate.c
M src/cpu/via/nano/update_ucode.c
M src/cpu/x86/mtrr/mtrr.c
M src/cpu/x86/name/name.c
M src/cpu/x86/pae/pgtbl.c
M src/drivers/amd/agesa/state_machine.c
M src/drivers/gic/gic.c
M src/drivers/i2c/w83793/w83793.c
M src/drivers/intel/fsp1_1/stack.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/upd_display.c
M src/include/cpu/amd/model_10xxx_rev.h
M src/include/cpu/x86/cr.h
M src/lib/selfboot.c
M src/mainboard/adi/rcc-dff/romstage.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bettong/mptable.c
M src/mainboard/amd/bettong/romstage.c
M src/mainboard/amd/bimini_fam10/romstage.c
M src/mainboard/amd/db-ft3b-lc/mptable.c
M src/mainboard/amd/gardenia/mptable.c
M src/mainboard/amd/lamar/mptable.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/olivehill/mptable.c
M src/mainboard/amd/olivehillplus/mptable.c
M src/mainboard/amd/parmer/mptable.c
M src/mainboard/amd/parmer/romstage.c
M src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
M src/mainboard/amd/thatcher/mptable.c
M src/mainboard/amd/thatcher/romstage.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/aopen/dxplplusu/romstage.c
M src/mainboard/asrock/imb-a180/mptable.c
M src/mainboard/asus/am1i-a/mptable.c
M src/mainboard/asus/f2a85-m/mptable.c
M src/mainboard/asus/kcma-d8/resourcemap.c
M src/mainboard/asus/kcma-d8/romstage.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/resourcemap.c
M src/mainboard/asus/kgpe-d16/romstage.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/bap/ode_e20XX/mptable.c
M src/mainboard/bap/ode_e21XX/mptable.c
M src/mainboard/biostar/a68n_5200/mptable.c
M src/mainboard/biostar/am1ml/mptable.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/gizmosphere/gizmo2/mptable.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/kahlee/mptable.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/nyan/romstage.c
M src/mainboard/google/nyan_big/romstage.c
M src/mainboard/google/nyan_blaze/romstage.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/hp/abm/mptable.c
M src/mainboard/hp/dl165_g6_fam10/romstage.c
M src/mainboard/hp/pavilion_m6_1035dx/mptable.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/cougar_canyon2/romstage.c
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/intel/harcuvar/acpi_tables.c
M src/mainboard/intel/littleplains/romstage.c
M src/mainboard/intel/mohonpeak/romstage.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/ktqm77/romstage.c
M src/mainboard/lenovo/g505s/mptable.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/msi/ms7721/mptable.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/samsung/lumpy/romstage.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/scaleway/tagada/acpi_tables.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/amdfam10/raminit_amdmct.c
M src/northbridge/amd/amdht/h3finit.c
M src/northbridge/amd/amdht/h3ncmn.c
M src/northbridge/amd/amdht/ht_wrapper.c
M src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c
M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
M src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
M src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
M src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
M src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
M src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c
M src/northbridge/amd/amdmct/mct_ddr3/mctwl.c
M src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c
M src/northbridge/amd/amdmct/wrappers/mcti_d.c
M src/northbridge/intel/e7505/raminit.c
M src/northbridge/intel/gm45/acpi.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/i945/acpi.c
M src/northbridge/intel/nehalem/raminit.c
M src/northbridge/intel/x4x/acpi.c
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/intel/x4x/raminit_ddr23.c
M src/soc/amd/stoneyridge/bootblock/bootblock.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/mca.c
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/smi.c
M src/soc/cavium/cn81xx/soc.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/bootblock/bootblock.c
M src/soc/intel/apollolake/car.c
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/include/soc/romstage.h
M src/soc/intel/baytrail/acpi.c
M src/soc/intel/baytrail/placeholders.c
M src/soc/intel/baytrail/smm.c
M src/soc/intel/baytrail/southcluster.c
M src/soc/intel/braswell/acpi.c
M src/soc/intel/braswell/include/soc/romstage.h
M src/soc/intel/braswell/placeholders.c
M src/soc/intel/braswell/romstage/romstage.c
M src/soc/intel/braswell/smm.c
M src/soc/intel/broadwell/bootblock/cpu.c
M src/soc/intel/broadwell/cpu_info.c
M src/soc/intel/broadwell/include/soc/cpu.h
M src/soc/intel/broadwell/lpc.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/smi.c
M src/soc/intel/broadwell/smmrelocate.c
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/include/soc/cpu.h
M src/soc/intel/cannonlake/include/soc/romstage.h
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/util.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/bootblock/bootblock.c
M src/soc/intel/denverton_ns/chip.c
M src/soc/intel/denverton_ns/include/soc/romstage.h
M src/soc/intel/denverton_ns/lpc.c
M src/soc/intel/denverton_ns/smm.c
M src/soc/intel/denverton_ns/tsc_freq.c
M src/soc/intel/denverton_ns/upd_display.c
M src/soc/intel/fsp_baytrail/acpi.c
M src/soc/intel/fsp_baytrail/include/soc/romstage.h
M src/soc/intel/fsp_baytrail/placeholders.c
M src/soc/intel/fsp_baytrail/romstage/romstage.c
M src/soc/intel/fsp_baytrail/smm.c
M src/soc/intel/fsp_baytrail/southcluster.c
M src/soc/intel/fsp_broadwell_de/acpi.c
M src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
M src/soc/intel/fsp_broadwell_de/romstage/romstage.c
M src/soc/intel/fsp_broadwell_de/smmrelocate.c
M src/soc/intel/icelake/acpi.c
M src/soc/intel/icelake/include/soc/cpu.h
M src/soc/intel/icelake/include/soc/romstage.h
M src/soc/intel/quark/include/soc/cpu.h
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/include/fsp20/soc/romstage.h
M src/soc/intel/skylake/include/soc/cpu.h
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/smmrelocate.c
M src/soc/mediatek/mt8173/soc.c
M src/soc/nvidia/tegra124/display.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/rockchip/rk3399/soc.c
M src/southbridge/amd/agesa/hudson/early_setup.c
M src/southbridge/amd/agesa/hudson/smi.c
M src/southbridge/amd/pi/hudson/early_setup.c
M src/southbridge/amd/pi/hudson/smi.c
M src/southbridge/amd/rs780/cmn.c
M src/southbridge/amd/sb700/early_setup.c
M src/southbridge/amd/sb800/early_setup.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/common/smi.c
M src/southbridge/intel/fsp_bd82x6x/lpc.c
M src/southbridge/intel/fsp_bd82x6x/smi.c
M src/southbridge/intel/fsp_i89xx/lpc.c
M src/southbridge/intel/fsp_i89xx/romstage.c
M src/southbridge/intel/fsp_i89xx/romstage.h
M src/southbridge/intel/fsp_i89xx/smi.c
M src/southbridge/intel/fsp_rangeley/lpc.c
M src/southbridge/intel/fsp_rangeley/romstage.c
M src/southbridge/intel/fsp_rangeley/romstage.h
M src/southbridge/intel/i82801dx/smi.c
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801gx/smi.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801ix/smi.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/i82801jx/smi.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/ibexpeak/smi.c
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/smi.c
231 files changed, 73 insertions(+), 198 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/29300/9
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4
Gerrit-Change-Number: 29300
Gerrit-PatchSet: 9
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include <cbmem.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29302
to look at the new patch set (#4).
Change subject: src: Remove unneeded include <cbmem.h>
......................................................................
src: Remove unneeded include <cbmem.h>
Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/arm/armv7/mmu.c
M src/arch/arm64/arm_tf.c
M src/arch/arm64/boot.c
M src/cpu/allwinner/a10/cpu.c
M src/cpu/amd/car/post_cache_as_ram.c
M src/drivers/amd/agesa/state_machine.c
M src/drivers/intel/fsp1_1/hob.c
M src/drivers/intel/fsp1_1/ramstage.c
M src/drivers/intel/fsp1_1/stack.c
M src/mainboard/emulation/qemu-i440fx/northbridge.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-q35/romstage.c
M src/mainboard/google/slippy/acpi_tables.c
M src/mainboard/via/epia-m850/romstage.c
M src/northbridge/amd/agesa/family12/northbridge.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/e7505/raminit.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/fsp_sandybridge/raminit.c
M src/northbridge/intel/gm45/acpi.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i945/acpi.c
M src/northbridge/intel/i945/raminit.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/sandybridge/early_init.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/x4x/acpi.c
M src/northbridge/intel/x4x/early_init.c
M src/northbridge/via/vx900/early_vx900.h
M src/northbridge/via/vx900/northbridge.c
M src/security/vboot/vboot_loader.c
M src/soc/amd/common/block/s3/s3_resume.c
M src/soc/intel/braswell/southcluster.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/broadwell/systemagent.c
M src/soc/intel/cannonlake/romstage/power_state.c
M src/soc/intel/denverton_ns/chip.c
M src/soc/intel/denverton_ns/systemagent.c
M src/soc/intel/fsp_baytrail/southcluster.c
M src/soc/intel/icelake/romstage/power_state.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/nvidia/tegra124/display.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/soc.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/rockchip/rk3288/soc.c
M src/soc/samsung/exynos5250/cpu.c
M src/soc/samsung/exynos5420/cpu.c
M src/southbridge/amd/agesa/hudson/early_setup.c
M src/southbridge/amd/agesa/hudson/hudson.c
M src/southbridge/amd/cimx/sb800/cfg.c
M src/southbridge/amd/cimx/sb800/lpc.c
M src/southbridge/amd/pi/hudson/early_setup.c
M src/southbridge/amd/pi/hudson/hudson.c
M src/southbridge/amd/sb700/lpc.c
M src/southbridge/intel/bd82x6x/early_pch.c
M src/southbridge/intel/bd82x6x/madt.c
65 files changed, 3 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/29302/4
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de
Gerrit-Change-Number: 29302
Gerrit-PatchSet: 4
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include <reset.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29301
to look at the new patch set (#5).
Change subject: src: Remove unneeded include <reset.h>
......................................................................
src: Remove unneeded include <reset.h>
Change-Id: I3b852cae4ef84d257bf1e5486447583bdd16b441
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/arch/x86/cf9_reset.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/cpu/intel/fsp_model_406dx/bootblock.c
M src/drivers/intel/fsp2_0/stage_cache.c
M src/ec/google/chromeec/ec.c
M src/lib/hardwaremain.c
M src/mainboard/amd/bimini_fam10/romstage.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/google/foster/pmic.c
M src/mainboard/google/smaug/pmic.c
M src/mainboard/google/veyron/bootblock.c
M src/mainboard/google/veyron_mickey/bootblock.c
M src/mainboard/google/veyron_rialto/bootblock.c
M src/mainboard/hp/dl165_g6_fam10/romstage.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/security/tpm/tspi/tspi.c
M src/security/vboot/common.c
M src/soc/cavium/common/bdk-coreboot.c
M src/soc/intel/braswell/romstage/romstage.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/fsp_baytrail/bootblock/bootblock.c
M src/soc/intel/skylake/romstage/romstage.c
M src/southbridge/amd/agesa/hudson/early_setup.c
M src/southbridge/amd/pi/hudson/early_setup.c
M src/southbridge/amd/sb700/early_setup.c
39 files changed, 19 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/29301/5
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I3b852cae4ef84d257bf1e5486447583bdd16b441
Gerrit-Change-Number: 29301
Gerrit-PatchSet: 5
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0
Change in coreboot[master]: src: Remove unneeded include <lib.h>
by Elyes HAOUAS (Code Review) 28 Oct '18
by Elyes HAOUAS (Code Review) 28 Oct '18
28 Oct '18
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29304
to look at the new patch set (#4).
Change subject: src: Remove unneeded include <lib.h>
......................................................................
src: Remove unneeded include <lib.h>
Change-Id: I801849fb31fe6958e3d9510da50e2e2dd351a98d
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/x86/mp_init.c
M src/device/hypertransport.c
M src/drivers/intel/fsp1_0/hob.c
M src/drivers/intel/fsp1_1/fsp_gop.c
M src/drivers/intel/fsp1_1/hob.c
M src/drivers/intel/fsp2_0/hand_off_block.c
M src/drivers/intel/fsp2_0/util.c
M src/lib/hardwaremain.c
M src/lib/rmodule.c
M src/mainboard/advansus/a785e-i/romstage.c
M src/mainboard/amd/bimini_fam10/romstage.c
M src/mainboard/amd/mahogany_fam10/romstage.c
M src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
M src/mainboard/amd/tilapia_fam10/romstage.c
M src/mainboard/apple/macbook21/romstage.c
M src/mainboard/apple/macbookair4_2/early_southbridge.c
M src/mainboard/asus/kcma-d8/romstage.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/kgpe-d16/romstage.c
M src/mainboard/asus/m4a78-em/romstage.c
M src/mainboard/asus/m4a785-m/romstage.c
M src/mainboard/asus/m5a88-v/romstage.c
M src/mainboard/asus/p2b-ds/romstage.c
M src/mainboard/asus/p2b-ls/romstage.c
M src/mainboard/asus/p2b/romstage.c
M src/mainboard/asus/p3b-f/romstage.c
M src/mainboard/asus/p5gc-mx/romstage.c
M src/mainboard/avalue/eax-785e/romstage.c
M src/mainboard/compulab/intense_pc/romstage.c
M src/mainboard/esd/atom15/acpi_tables.c
M src/mainboard/getac/p470/romstage.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/gigabyte/ma785gm/romstage.c
M src/mainboard/gigabyte/ma785gmt/romstage.c
M src/mainboard/gigabyte/ma78gm/romstage.c
M src/mainboard/google/butterfly/romstage.c
M src/mainboard/google/link/romstage.c
M src/mainboard/google/parrot/romstage.c
M src/mainboard/google/stout/romstage.c
M src/mainboard/hp/dl165_g6_fam10/romstage.c
M src/mainboard/iei/kino-780am2-fam10/romstage.c
M src/mainboard/intel/bayleybay_fsp/romstage.c
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/intel/galileo/vboot.c
M src/mainboard/intel/minnowmax/acpi_tables.c
M src/mainboard/intel/saddlebrook/romstage.c
M src/mainboard/intel/stargo2/romstage.c
M src/mainboard/intel/strago/romstage.c
M src/mainboard/jetway/pa78vm5/romstage.c
M src/mainboard/kontron/ktqm77/romstage.c
M src/mainboard/lenovo/s230u/romstage.c
M src/mainboard/lenovo/t400/romstage.c
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t60/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x200/romstage.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
M src/mainboard/lenovo/x60/romstage.c
M src/mainboard/lenovo/z61t/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/pcengines/alix1c/romstage.c
M src/mainboard/pcengines/alix2d/romstage.c
M src/mainboard/roda/rk886ex/romstage.c
M src/mainboard/roda/rk9/romstage.c
M src/mainboard/samsung/lumpy/romstage.c
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/sapphire/pureplatinumh61/romstage.c
M src/mainboard/siemens/mc_apl1/romstage.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
M src/mainboard/siemens/mc_tcu3/romstage.c
M src/mainboard/supermicro/h8dmr_fam10/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/h8scm_fam10/romstage.c
M src/mainboard/tyan/s2912_fam10/romstage.c
M src/northbridge/amd/amdfam10/link_control.c
M src/northbridge/amd/amdfam10/nb_control.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/sandybridge/romstage.c
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/via/vx900/northbridge.c
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/denverton_ns/bootblock/bootblock.c
M src/soc/intel/fsp_broadwell_de/chip.c
M src/soc/nvidia/tegra124/display.c
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/dsi.c
M src/soc/nvidia/tegra210/include/soc/mipi_dsi.h
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/mipi.c
M src/soc/nvidia/tegra210/mipi_dsi.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/samsung/exynos5420/dp.c
M src/southbridge/amd/sr5650/ht.c
95 files changed, 4 insertions(+), 95 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/29304/4
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I801849fb31fe6958e3d9510da50e2e2dd351a98d
Gerrit-Change-Number: 29304
Gerrit-PatchSet: 4
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
1
0