coreboot-gerrit May 2017

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Change in coreboot[master]: soc/marvell/bg4cd: Get rid of spi.c
by Philippe Mathieu-Daudé (Code Review) 22 May '17

22 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19775 ) Change subject: soc/marvell/bg4cd: Get rid of spi.c ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/19775 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I53f0782fc8bd75ec569b74e4b199df5af481443d Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/asus/kgpe-d16: Add BMC KCS to ACPI
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19822 ) Change subject: mb/asus/kgpe-d16: Add BMC KCS to ACPI ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9884/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54149/ : SUCCESS -- To view, visit https://review.coreboot.org/19822 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac7 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19820 ) Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9882/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54148/ : SUCCESS -- To view, visit https://review.coreboot.org/19820 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/asus/kgpe-d16: Enable IPMI KCS access
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19821 ) Change subject: mb/asus/kgpe-d16: Enable IPMI KCS access ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9883/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54147/ : SUCCESS -- To view, visit https://review.coreboot.org/19821 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mb/asus/kgpe-d16: Add BMC KCS to ACPI
by Timothy Pearson (Code Review) 22 May '17

22 May '17

Timothy Pearson has uploaded a new change for review. ( https://review.coreboot.org/19822 ) Change subject: mb/asus/kgpe-d16: Add BMC KCS to ACPI ...................................................................... mb/asus/kgpe-d16: Add BMC KCS to ACPI The BMC KCS interface must be advertised to the host OS in order for automatic load of the ipmi module to work. Expose the KCS interface via ACPI. Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac7 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- M src/mainboard/asus/kgpe-d16/dsdt.asl 1 file changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/19822/1 diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl index a1eda28..38bcf98 100644 --- a/src/mainboard/asus/kgpe-d16/dsdt.asl +++ b/src/mainboard/asus/kgpe-d16/dsdt.asl @@ -50,6 +50,9 @@ /* HPET enable */ Name (HPTE, 0x1) + /* IPMI KCS enable */ + Name (KCSE, 0x1) + /* Define power states */ Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) /* Normal operation */ Name (\_S1, Package () { 0x01, 0x01, 0x00, 0x00 }) /* Standby */ @@ -490,6 +493,13 @@ Name (_HID, EisaId ("PNP0A05")) Name (_ADR, 0x00140003) + OperationRegion(BMRG, SystemIO, 0xca2, 0x02) /* BMC KCS registers */ + Field(BMRG, AnyAcc, NoLock, Preserve) + { + BMRI, 8, /* Index */ + BMRD, 8, /* Data */ + } + /* Real Time Clock Device */ Device(RTC0) { Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */ @@ -611,6 +621,27 @@ }) } } + + Device(KCS1) { /* IPMI KCS */ + Name(_HID,EISAID("IPI0001")) /* ASpeed BMC */ + Method (_STA, 0, NotSerialized) { + If(KCSE) { /* Detection enabled */ + If(LNotEqual(BMRD, 0xff)) { + Return(0x0f) /* Device present */ + } + Return(Zero) + } + Return(Zero) + } + Method(_CRS, 0) { + Return(ResourceTemplate() { + IO(Decode16, 0x0ca2, 0x0ca2, 0x01, 0x02) + }) + } + Method (_IFT, 0, NotSerialized) { /* Interface type */ + Return(One) /* KCS interface */ + } + } } /* High Precision Event Timer */ -- To view, visit https://review.coreboot.org/19822 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac7 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com>

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Change in coreboot[master]: mb/asus/kgpe-d16: Enable IPMI KCS access
by Timothy Pearson (Code Review) 22 May '17

22 May '17

Timothy Pearson has uploaded a new change for review. ( https://review.coreboot.org/19821 ) Change subject: mb/asus/kgpe-d16: Enable IPMI KCS access ...................................................................... mb/asus/kgpe-d16: Enable IPMI KCS access The on-board BMC contains a hardware KCS interface. Allow access to it over LPC. Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac6 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- M src/mainboard/asus/kgpe-d16/devicetree.cb M src/mainboard/asus/kgpe-d16/mainboard.c 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/19821/1 diff --git a/src/mainboard/asus/kgpe-d16/devicetree.cb b/src/mainboard/asus/kgpe-d16/devicetree.cb index 9039f6d..0ea4216 100644 --- a/src/mainboard/asus/kgpe-d16/devicetree.cb +++ b/src/mainboard/asus/kgpe-d16/devicetree.cb @@ -217,6 +217,9 @@ chip drivers/pc80/tpm device pnp 4e.0 on end # TPM module end + chip drivers/generic/generic # BMC KCS + device pnp ca2.0 on end + end end device pci 14.4 on # Bridge device pci 1.0 on end # VGA diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c index 65029d4..8ee3a5e 100644 --- a/src/mainboard/asus/kgpe-d16/mainboard.c +++ b/src/mainboard/asus/kgpe-d16/mainboard.c @@ -70,6 +70,13 @@ set_pcie_dereset(); /* get_ide_dma66(); */ + + /* Enable access to the BMC IPMI via KCS */ + device_t lpc_sio_dev = dev_find_slot_pnp(0xca2, 0); + struct resource *res = new_resource(lpc_sio_dev, 0xca2); + res->base = 0xca2; + res->size = 1; + res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } /* override the default SATA PHY setup */ -- To view, visit https://review.coreboot.org/19821 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com>

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Change in coreboot[master]: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
by Timothy Pearson (Code Review) 22 May '17

22 May '17

Timothy Pearson has uploaded a new change for review. ( https://review.coreboot.org/19820 ) Change subject: mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot ...................................................................... mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot When the BMC firmware module is installed on the KGPE-D16, the RAM SPD multiplexer lines are disconnected by hardware from the SP5100 GPIOs and attached to BMC GPIO lines instead. Set the BMC GPIOs to match the state of the SP5100 GPIOs during RAM setup. Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> --- M src/mainboard/asus/kgpe-d16/romstage.c 1 file changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/19820/1 diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 9459d6c..a486a10 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -87,6 +87,47 @@ byte &= ~0xc0; /* Enable SPD mux GPIO output drivers */ byte |= (channel << 2) & 0xc; /* Set SPD mux GPIOs */ pci_write_config8(PCI_DEV(0, 0x14, 0), 0x54, byte); + + /* Temporary AST PCI mapping */ + uint32_t base_memory = 0xfc000000; + uint32_t memory_limit = 0xfc800000; + + /* Temporarily enable the SP5100 PCI bridge */ + uint16_t prev_sec_cfg = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x04); + uint8_t prev_sec_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x19); + uint8_t prev_sec_sub_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x1a); + uint16_t prev_sec_mem_base = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x20); + uint16_t prev_sec_mem_limit = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x22); + pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, 0x01); + pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, 0xff); + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, (base_memory >> 20)); + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, (memory_limit >> 20)); + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, 0x2); + + /* Temporarily enable AST BAR1 */ + uint32_t prev_ast_cfg = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x04); + uint32_t prev_ast_bar1 = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x14); + pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, base_memory); + pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, 0x02100002); + + /* Use the P2A bridge to set ASpeed SPD mux GPIOs to the same values as the SP5100 */ + void* ast_bar1 = (void*)base_memory; + write32(ast_bar1 + 0xf004, 0x1e780000); /* Enable access to GPIO controller */ + write32(ast_bar1 + 0xf000, 0x1); + write32(ast_bar1 + 0x10024, read32(ast_bar1 + 0x10024) | 0x3000); /* Enable SPD mux GPIO output drivers */ + write32(ast_bar1 + 0x10020, (read32(ast_bar1 + 0x10020) & ~0x3000) | ((channel & 0x3) << 12)); /* Set SPD mux GPIOs */ + write32(ast_bar1 + 0xf000, 0x0); + + /* Deconfigure AST BAR1 */ + pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, prev_ast_cfg); + pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, prev_ast_bar1); + + /* Deconfigure SP5100 PCI bridge */ + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, prev_sec_cfg); + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, prev_sec_mem_limit); + pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, prev_sec_mem_base); + pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, prev_sec_sub_bus); + pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, prev_sec_bus); } static const uint8_t spd_addr_fam15[] = { -- To view, visit https://review.coreboot.org/19820 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ia251334ae44668c2260d8d2e816f85f1f62faac5 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com>

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Change in coreboot[master]: nb/intel/sandybridge/pcie: Disable unused bridges
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19819 ) Change subject: nb/intel/sandybridge/pcie: Disable unused bridges ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9881/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54146/ : SUCCESS -- To view, visit https://review.coreboot.org/19819 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: If67bafdea6a60986ecca2ecdb93c7f72359c4537 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: device/device_util: Add function to determine bridge state
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19817 ) Change subject: device/device_util: Add function to determine bridge state ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9879/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54144/ : SUCCESS -- To view, visit https://review.coreboot.org/19817 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: sb/intel/bd82x6x: Disable unused bridges
by build bot (Jenkins) (Code Review) 22 May '17

22 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19818 ) Change subject: sb/intel/bd82x6x: Disable unused bridges ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9880/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54145/ : SUCCESS -- To view, visit https://review.coreboot.org/19818 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017