coreboot-gerrit April 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code fro...
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19480 ) Change subject: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code from intelblocks ...................................................................... Patch Set 5: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52963/ : UNSTABLE -- To view, visit https://review.coreboot.org/19480 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/pineview/raminit: Refactor timings selection
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19495 ) Change subject: nb/intel/pineview/raminit: Refactor timings selection ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/52962/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/8809/ : SUCCESS -- To view, visit https://review.coreboot.org/19495 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia374f26e5bbb8b90d90c24ae6c20412ba53bd7b6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: intel/common/block/i2c: Add common block for I2C
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19468 ) Change subject: intel/common/block/i2c: Add common block for I2C ...................................................................... Patch Set 5: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52960/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8807/ : SUCCESS -- To view, visit https://review.coreboot.org/19468 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81 Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake: Use common I2C code from intelblocks
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19469 ) Change subject: soc/intel/skylake: Use common I2C code from intelblocks ...................................................................... Patch Set 6: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52958/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8805/ : SUCCESS -- To view, visit https://review.coreboot.org/19469 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iae7d13303090c72380534618741858502cc9ee33 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: pci_device: Write vendor ID to subsystem vendor ID
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19467 ) Change subject: pci_device: Write vendor ID to subsystem vendor ID ...................................................................... Patch Set 7: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/52956/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/8803/ : SUCCESS -- To view, visit https://review.coreboot.org/19467 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I5027331a6adf9109767415ba22dfcb17b35ef54b Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code fro...
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19480 ) Change subject: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code from intelblocks ...................................................................... Patch Set 4: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/52959/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/8806/ : SUCCESS -- To view, visit https://review.coreboot.org/19480 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code fro...
by Rizwan Qureshi (Code Review) 28 Apr '17

28 Apr '17

Rizwan Qureshi has uploaded a new patch set (#5). ( https://review.coreboot.org/19480 ) Change subject: soc/intel/apollolake: [NOT VERIFIED] Use common I2C code from intelblocks ...................................................................... soc/intel/apollolake: [NOT VERIFIED] Use common I2C code from intelblocks * Stop using code from soc/intel/common/lpss_i2c.c. * Remove early i2c initialization code from bootblock. * Refactor i2c.c file to implement SoC specific methods required by the I2C IP block. Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> --- M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/apollolake/chip.h M src/soc/intel/apollolake/i2c.c D src/soc/intel/apollolake/i2c_early.c D src/soc/intel/apollolake/include/soc/i2c.h 6 files changed, 41 insertions(+), 232 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19480/5 -- To view, visit https://review.coreboot.org/19480 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: intel/common/block/i2c: Add common block for I2C
by build bot (Jenkins) (Code Review) 28 Apr '17

28 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19468 ) Change subject: intel/common/block/i2c: Add common block for I2C ...................................................................... Patch Set 6: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/52957/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/8804/ : SUCCESS -- To view, visit https://review.coreboot.org/19468 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/pineview/raminit: Refactor timings selection
by Arthur Heymans (Code Review) 28 Apr '17

28 Apr '17

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19495 ) Change subject: nb/intel/pineview/raminit: Refactor timings selection ...................................................................... nb/intel/pineview/raminit: Refactor timings selection This does not use loops to compute timings but uses DIV_ROUND_UP. Another thing affected by this patch are minimum timings. Presumably those only need to be guarded against on DDR3. With this change timings are set up like vendor (with tWTR below previous minimum) TESTED on Intel D510MO Change-Id: Ia374f26e5bbb8b90d90c24ae6c20412ba53bd7b6 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/pineview/raminit.c 1 file changed, 22 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/19495/1 diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index cf6cbb9..f4cc446 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -356,7 +356,6 @@ }; u8 i; - u32 tmp; u32 maxtras = 0; u32 maxtrp = 0; u32 maxtrcd = 0; @@ -377,62 +376,28 @@ maxtrrd = max(maxtrrd, (s->dimms[i].spd_data[28] * 1000) >> 2); maxtrtp = max(maxtrtp, (s->dimms[i].spd_data[38] * 1000) >> 2); } - for (i = 9; i < 24; i++) { // 16 - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtras) { - s->selected_timings.tRAS = i; - break; - } - } - for (i = 3; i < 10; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtrp) { - s->selected_timings.tRP = i; - break; - } - } - for (i = 3; i < 10; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtrcd) { - s->selected_timings.tRCD = i; - break; - } - } - for (i = 3; i < 15; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtwr) { - s->selected_timings.tWR = i; - break; - } - } - for (i = 15; i < 78; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtrfc) { - s->selected_timings.tRFC = ((i + 16) & 0xfe) - 15; - break; - } - } - for (i = 4; i < 15; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtwtr) { - s->selected_timings.tWTR = i; - break; - } - } - for (i = 2; i < 15; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtrrd) { - s->selected_timings.tRRD = i; - break; - } - } - for (i = 4; i < 15; i++) { - tmp = mult[s->selected_timings.mem_clock] * i; - if (tmp >= maxtrtp) { - s->selected_timings.tRTP = i; - break; - } - } + /* + * TODO: on ddr3 there might be some minimal required values for some + * Timings: MIN_TRAS = 9, MIN_TRP = 3, MIN_TRCD = 3, MIN_TWR = 3, + * MIN_TWTR = 4, MIN_TRRD = 2, MIN_TRTP = 4 + */ + s->selected_timings.tRAS = MIN(24, DIV_ROUND_UP(maxtras, + mult[s->selected_timings.mem_clock])); + s->selected_timings.tRP = MIN(10, DIV_ROUND_UP(maxtrp, + mult[s->selected_timings.mem_clock])); + s->selected_timings.tRCD = MIN(10, DIV_ROUND_UP(maxtrcd, + mult[s->selected_timings.mem_clock])); + s->selected_timings.tWR = MIN(15, DIV_ROUND_UP(maxtwr, + mult[s->selected_timings.mem_clock])); + /* Needs to be even */ + s->selected_timings.tRFC = 0xfe & (MIN(78, DIV_ROUND_UP(maxtrfc, + mult[s->selected_timings.mem_clock])) + 1); + s->selected_timings.tWTR = MIN(15, DIV_ROUND_UP(maxtwtr, + mult[s->selected_timings.mem_clock])); + s->selected_timings.tRRD = MIN(15, DIV_ROUND_UP(maxtrrd, + mult[s->selected_timings.mem_clock])); + s->selected_timings.tRTP = MIN(15, DIV_ROUND_UP(maxtras, + mult[s->selected_timings.mem_clock])); PRINTK_DEBUG("Selected timings:\n"); PRINTK_DEBUG("\tFSB: %dMHz\n", fsb_reg_to_mhz(s->selected_timings.fsb_clock)); -- To view, visit https://review.coreboot.org/19495 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ia374f26e5bbb8b90d90c24ae6c20412ba53bd7b6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: rockchip/rk3399: Add MIPI driver
by Sean Paul (Code Review) 28 Apr '17

28 Apr '17

Sean Paul has posted comments on this change. ( https://review.coreboot.org/19477 ) Change subject: rockchip/rk3399: Add MIPI driver ...................................................................... Patch Set 3: (5 comments) Looks very solid, just a couple small nits https://review.coreboot.org/#/c/19477/3/src/soc/rockchip/rk3399/display.c File src/soc/rockchip/rk3399/display.c: PS3, Line 63: : If you're going to remove this (and HDMI down below), you should delete their entries in the header as well. PS3, Line 120: detected_mode = VOP_MODE_MIPI; You're not doing detection any longer, so just remove detected_mode and use conf->vop_mode directly https://review.coreboot.org/#/c/19477/3/src/soc/rockchip/rk3399/mipi.c File src/soc/rockchip/rk3399/mipi.c: PS3, Line 193: big *bigger PS3, Line 429: rk_mipi_dsi_dcs_transfer(&rk_mipi, MIPI_DCS_EXIT_SLEEP_MODE); Check return value? PS3, Line 431: rk_mipi_dsi_dcs_transfer(&rk_mipi, MIPI_DCS_SET_DISPLAY_ON); here too -- To view, visit https://review.coreboot.org/19477 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I02475eefb187c619c614b1cd20e97074bc8d917f Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: nickey.yang(a)rock-chips.com Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sean Paul <seanpaul(a)chromium.org> Gerrit-Reviewer: Shunqian Zheng <zhengsq(a)rock-chips.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: nickey.yang(a)rock-chips.com Gerrit-HasComments: Yes

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coreboot-gerrit April 2017