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Change in libgfxinit[master]: gfx_test: Add corner markers to test screen
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22712 Change subject: gfx_test: Add corner markers to test screen ...................................................................... gfx_test: Add corner markers to test screen Show a white-framed square with rotating colors in each corner. Change-Id: Ifcd20a3f531c9cebcaf0e7502a76ffb7ff6ca4f8 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M gfxtest/hw-gfx-gma-gfx_test.adb 1 file changed, 38 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/12/22712/1 diff --git a/gfxtest/hw-gfx-gma-gfx_test.adb b/gfxtest/hw-gfx-gma-gfx_test.adb index 9a5ce0a..4016664 100644 --- a/gfxtest/hw-gfx-gma-gfx_test.adb +++ b/gfxtest/hw-gfx-gma-gfx_test.adb @@ -56,6 +56,12 @@ Alpha at 3 range 0 .. 7; end record; + White : constant Pixel_Type := (255, 255, 255, 255); + Black : constant Pixel_Type := ( 0, 0, 0, 255); + Red : constant Pixel_Type := (255, 0, 0, 255); + Green : constant Pixel_Type := ( 0, 255, 0, 255); + Blue : constant Pixel_Type := ( 0, 0, 255, 255); + function Pixel_To_Word (P : Pixel_Type) return Word32 with SPARK_Mode => Off @@ -96,10 +102,35 @@ end loop; end Restore_Screen; + function Corner_Fill + (X, Y : Natural; + FB : Framebuffer_Type; + Pipe : Pipe_Index) + return Pixel_Type + is + Xrel : constant Integer := + (if X < 32 then X else X - (Natural (FB.Width) - 32)); + Yrel : constant Integer := + (if Y < 32 then Y else Y - (Natural (FB.Height) - 32)); + + function Color (Idx : Natural) return Pixel_Type is + (case (Idx + Pipe_Index'Pos (Pipe)) mod 4 is + when 0 => Blue, when 1 => Black, + when 3 => Green, when others => Red); + begin + return + (if Xrel mod 16 = 0 or Xrel = 31 or Yrel mod 16 = 0 or Yrel = 31 then + White + elsif Yrel < 16 then + (if Xrel < 16 then Color (0) else Color (1)) + else + (if Xrel < 16 then Color (3) else Color (2))); + end Corner_Fill; + function Fill (X, Y : Natural; Framebuffer : Framebuffer_Type; - Pipe : GMA.Pipe_Index) + Pipe : Pipe_Index) return Pixel_Type is use type HW.Byte; @@ -133,8 +164,12 @@ for Y in 0 .. Natural (Framebuffer.Height) - 1 loop Offset := Offset_Y; for X in 0 .. Natural (Framebuffer.Width) - 1 loop - if Y mod 16 = 0 or X mod 16 = 0 then - P := (0, 0, 0, 0); + if (X < 32 or X >= Natural (Framebuffer.Width) - 32) and + (Y < 32 or Y >= Natural (Framebuffer.Height) - 32) + then + P := Corner_Fill (X, Y, Framebuffer, Pipe); + elsif Y mod 16 = 0 or X mod 16 = 0 then + P := Black; else P := Fill (X, Y, Framebuffer, Pipe); end if; -- To view, visit https://review.coreboot.org/22712 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ifcd20a3f531c9cebcaf0e7502a76ffb7ff6ca4f8 Gerrit-Change-Number: 22712 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: gma: Add support for rotated framebuffers
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22711 Change subject: gma: Add support for rotated framebuffers ...................................................................... gma: Add support for rotated framebuffers As for the tiling, we enable support for rotated framebuffers on platforms with Plane_Control. On every path where a rotated frame- buffer may be expected, we have to exchange width and height in case of 90 degree rotations. Beside the rotation setting itself, the hardware needs to know the vertical stride instead of the hori- zontal and a delicate page mapping in case of 90 degree rotations. For that we divide the GTT space into two, the lower half contains the linear mappings, the upper half mappings for a rotated scanout. Change-Id: I1c901b7abc0fe7764bee87f6fda58ba9fa3f340d Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma-config_helpers.ads M common/hw-gfx-gma-pipe_setup.adb M common/hw-gfx-gma-pipe_setup.ads M common/hw-gfx-gma.adb M common/hw-gfx-gma.ads M common/hw-gfx.ads 8 files changed, 132 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/11/22711/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 252b023..31fa7ba 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -252,7 +252,7 @@ -- Maximum source width with enabled scaler. This only accounts -- for simple 1:1 pipe:scaler mappings. - type Width_Per_Pipe is array (Pipe_Index) of Width_Type; + type Width_Per_Pipe is array (Pipe_Index) of Pos16; Maximum_Scalable_Width : constant Width_Per_Pipe := (case CPU is diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 6eff5d2..f2b4ef6 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -181,9 +181,9 @@ -- Validates that a given configuration should work with -- a given framebuffer. function Validate_Config - (Framebuffer : Framebuffer_Type; - Port_Cfg : Port_Config; - Pipe : Pipe_Index) + (FB : Framebuffer_Type; + Port_Cfg : Port_Config; + Pipe : Pipe_Index) return Boolean is begin @@ -193,18 +193,21 @@ -- Only 32bpp RGB (ignored for VGA plane) -- Stride must be big enough and a multiple of 64 bytes or the tile size -- (ignored for VGA plane) - -- Tiling is only supported on newer generations (with Plane_Control) + -- Tiling and rotation is only supported on newer generations (with + -- Plane_Control) + -- 90 degree rotations are only supported with Y-tiling return - ((Framebuffer.Width = Pos32 (Port_Cfg.Mode.H_Visible) and - Framebuffer.Height = Pos32 (Port_Cfg.Mode.V_Visible)) or - (Framebuffer.Width <= Config.Maximum_Scalable_Width (Pipe) and - Framebuffer.Width <= Pos32 (Port_Cfg.Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Port_Cfg.Mode.V_Visible))) and - (Framebuffer.Offset /= VGA_PLANE_FRAMEBUFFER_OFFSET or Pipe = Primary) - and - (Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or - (Framebuffer.BPC = 8 and Valid_Stride (Framebuffer) and - (Config.Has_Plane_Control or Framebuffer.Tiling = Linear))); + ((Rotated_Width (FB) = Port_Cfg.Mode.H_Visible and + Rotated_Height (FB) = Port_Cfg.Mode.V_Visible) or + (Rotated_Width (FB) <= Config.Maximum_Scalable_Width (Pipe) and + Rotated_Width (FB) <= Port_Cfg.Mode.H_Visible and + Rotated_Height (FB) <= Port_Cfg.Mode.V_Visible)) and + (FB.Offset /= VGA_PLANE_FRAMEBUFFER_OFFSET or Pipe = Primary) and + (FB.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or + (FB.BPC = 8 and Valid_Stride (FB) and + (Config.Has_Plane_Control or + (FB.Tiling = Linear and FB.Rotation = No_Rotation)) and + (FB.Tiling = Y_Tiled or not Rotation_90 (FB)))); end Validate_Config; end HW.GFX.GMA.Config_Helpers; diff --git a/common/hw-gfx-gma-config_helpers.ads b/common/hw-gfx-gma-config_helpers.ads index a9cde2b..e684f22 100644 --- a/common/hw-gfx-gma-config_helpers.ads +++ b/common/hw-gfx-gma-config_helpers.ads @@ -40,14 +40,16 @@ use type HW.Pos32; pragma Warnings (GNAT, On, """Integer_32"" is already use-visible *"); function Validate_Config - (Framebuffer : Framebuffer_Type; - Port_Cfg : Port_Config; - Pipe : Pipe_Index) + (FB : Framebuffer_Type; + Port_Cfg : Port_Config; + Pipe : Pipe_Index) return Boolean with Post => (if Validate_Config'Result then - Framebuffer.Width <= Pos32 (Port_Cfg.Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Port_Cfg.Mode.V_Visible)); + Rotated_Width (FB) <= Port_Cfg.Mode.H_Visible and + Rotated_Height (FB) <= Port_Cfg.Mode.V_Visible and + (FB.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or + FB.Height <= FB.V_Stride)); end HW.GFX.GMA.Config_Helpers; diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index 215b4de..e1ff835 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -50,6 +50,13 @@ X_Tiled => PLANE_CTL_TILED_SURFACE_X_TILED, Y_Tiled => PLANE_CTL_TILED_SURFACE_Y_TILED); + PLANE_CTL_PLANE_ROTATION_MASK : constant := 3 * 2 ** 0; + PLANE_CTL_PLANE_ROTATION : constant array (Rotation_Type) of Word32 := + (No_Rotation => 0 * 2 ** 0, + Rotated_90 => 1 * 2 ** 0, + Rotated_180 => 2 * 2 ** 0, + Rotated_270 => 3 * 2 ** 0); + PLANE_WM_ENABLE : constant := 1 * 2 ** 31; PLANE_WM_LINES_SHIFT : constant := 14; PLANE_WM_LINES_MASK : constant := 16#001f# * 2 ** 14; @@ -149,7 +156,8 @@ =>+ (Registers.Register_State, Controller, - FB)) + FB)), + Pre => FB.Height <= FB.V_Stride is -- FIXME: setup correct format, based on framebuffer RGB format Format : constant Word32 := 6 * 2 ** 26; @@ -158,20 +166,34 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); if Config.Has_Plane_Control then - Registers.Write - (Register => Controller.PLANE_CTL, - Value => PLANE_CTL_PLANE_ENABLE or - PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 or - PLANE_CTL_PLANE_GAMMA_DISABLE or - PLANE_CTL_TILED_SURFACE (FB.Tiling)); - Registers.Write (Controller.PLANE_OFFSET, 16#0000_0000#); - Registers.Write - (Controller.PLANE_SIZE, - Encode (Pos16 (FB.Width), Pos16 (FB.Height))); - Registers.Write - (Controller.PLANE_STRIDE, Word32 (FB_Pitch (FB.Stride, FB))); - Registers.Write (Controller.PLANE_POS, 16#0000_0000#); - Registers.Write (Controller.PLANE_SURF, FB.Offset and 16#ffff_f000#); + declare + Stride, Offset, GTT_Addr : Word32; + Width : constant Pos16 := Rotated_Width (FB); + Height : constant Pos16 := Rotated_Height (FB); + begin + if Rotation_90 (FB) then + Stride := Word32 (FB_Pitch (FB.V_Stride, FB)); + Offset := Word32 (FB.V_Stride - FB.Height); + GTT_Addr := + FB.Offset + Word32 (GTT_Rotation_Offset) * GTT_Page_Size; + else + Stride := Word32 (FB_Pitch (FB.Stride, FB)); + Offset := 0; + GTT_Addr := FB.Offset; + end if; + Registers.Write + (Register => Controller.PLANE_CTL, + Value => PLANE_CTL_PLANE_ENABLE or + PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 or + PLANE_CTL_PLANE_GAMMA_DISABLE or + PLANE_CTL_TILED_SURFACE (FB.Tiling) or + PLANE_CTL_PLANE_ROTATION (FB.Rotation)); + Registers.Write (Controller.PLANE_OFFSET, Offset); + Registers.Write (Controller.PLANE_SIZE, Encode (Width, Height)); + Registers.Write (Controller.PLANE_STRIDE, Stride); + Registers.Write (Controller.PLANE_POS, 16#0000_0000#); + Registers.Write (Controller.PLANE_SURF, GTT_Addr and 16#ffff_f000#); + end; else if Config.Disable_Trickle_Feed then PRI := PRI or DSPCNTR_DISABLE_TRICKLE_FEED; @@ -210,7 +232,10 @@ Dither), Port_IO.State =>+ - (Framebuffer)) + (Framebuffer)), + Pre => + Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or + Framebuffer.Height <= Framebuffer.V_Stride is use type Word8; @@ -252,7 +277,7 @@ Registers.Write (Register => Controller.PIPESRC, Value => Encode - (Pos16 (Framebuffer.Height), Pos16 (Framebuffer.Width))); + (Rotated_Height (Framebuffer), Rotated_Width (Framebuffer))); if Config.Has_Pipeconf_Misc then Registers.Write @@ -273,19 +298,21 @@ Pre => Max_Width <= Pos32 (Pos16'Last) and Max_Height <= Pos32 (Pos16'Last) and - Framebuffer.Width <= Max_Width and - Framebuffer.Height <= Max_Height, + Pos32 (Rotated_Width (Framebuffer)) <= Max_Width and + Pos32 (Rotated_Height (Framebuffer)) <= Max_Height, Post => Width <= Max_Width and Height <= Max_Height is + Src_Width : constant Pos32 := Pos32 (Rotated_Width (Framebuffer)); + Src_Height : constant Pos32 := Pos32 (Rotated_Height (Framebuffer)); begin - if (Max_Width * Framebuffer.Height) / Framebuffer.Width <= Max_Height then + if (Max_Width * Src_Height) / Src_Width <= Max_Height then Width := Max_Width; - Height := (Max_Width * Framebuffer.Height) / Framebuffer.Width; + Height := (Max_Width * Src_Height) / Src_Width; else Height := Max_Height; Width := Pos32'Min (Max_Width, -- could prove, it's <= Max_Width - (Max_Height * Framebuffer.Width) / Framebuffer.Height); + (Max_Height * Src_Width) / Src_Height); end if; end Scale_Keep_Aspect; @@ -295,8 +322,8 @@ Framebuffer : in HW.GFX.Framebuffer_Type) with Pre => - Framebuffer.Width <= Pos32 (Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Mode.V_Visible) + Rotated_Width (Framebuffer) <= Mode.H_Visible and + Rotated_Height (Framebuffer) <= Mode.V_Visible is use type Registers.Registers_Invalid_Index; @@ -305,14 +332,17 @@ (if Controller.PS_CTRL_2 /= Registers.Invalid_Register then PS_CTRL_SCALER_MODE_7X5_EXTENDED else 0); + Width_In : constant Pos32 := Pos32 (Rotated_Width (Framebuffer)); + Height_In : constant Pos32 := Pos32 (Rotated_Height (Framebuffer)); + -- We can scale up to 2.99x horizontally: - Horizontal_Limit : constant Pos32 := ((Framebuffer.Width * 299) / 100); + Horizontal_Limit : constant Pos32 := (Width_In * 299) / 100; -- The third scaler is limited to 1.99x -- vertical scaling for source widths > 2048: Vertical_Limit : constant Pos32 := - (Framebuffer.Height * + (Height_In * (if Controller.PS_CTRL_2 = Registers.Invalid_Register and - Framebuffer.Width > 2048 + Width_In > 2048 then 199 else @@ -348,8 +378,8 @@ Framebuffer : in HW.GFX.Framebuffer_Type) with Pre => - Framebuffer.Width <= Pos32 (Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Mode.V_Visible) + Rotated_Width (Framebuffer) <= Mode.H_Visible and + Rotated_Height (Framebuffer) <= Mode.V_Visible is -- Force 1:1 mapping of panel fitter:pipe PF_Ctrl_Pipe_Sel : constant Word32 := @@ -390,12 +420,12 @@ Framebuffer : in HW.GFX.Framebuffer_Type) with Pre => - Framebuffer.Width <= Pos32 (Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Mode.V_Visible) + Rotated_Width (Framebuffer) <= Mode.H_Visible and + Rotated_Height (Framebuffer) <= Mode.V_Visible is begin - if Framebuffer.Width /= Pos32 (Mode.H_Visible) or - Framebuffer.Height /= Pos32 (Mode.V_Visible) + if Rotated_Width (Framebuffer) /= Mode.H_Visible or + Rotated_Height (Framebuffer) /= Mode.V_Visible then if Config.Has_Plane_Control then Setup_Skylake_Pipe_Scaler (Controller, Mode, Framebuffer); diff --git a/common/hw-gfx-gma-pipe_setup.ads b/common/hw-gfx-gma-pipe_setup.ads index 725bc08..35d9e87 100644 --- a/common/hw-gfx-gma-pipe_setup.ads +++ b/common/hw-gfx-gma-pipe_setup.ads @@ -25,8 +25,10 @@ Framebuffer : Framebuffer_Type) with Pre => - Framebuffer.Width <= Pos32 (Port_Cfg.Mode.H_Visible) and - Framebuffer.Height <= Pos32 (Port_Cfg.Mode.V_Visible); + Rotated_Width (Framebuffer) <= Port_Cfg.Mode.H_Visible and + Rotated_Height (Framebuffer) <= Port_Cfg.Mode.V_Visible and + (Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or + Framebuffer.Height <= Framebuffer.V_Stride); procedure Off (Pipe : Pipe_Index); diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index 76b271d..d6cd2c0 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -464,7 +464,7 @@ -- Check basics and that it fits in GTT function Valid_FB (FB : Framebuffer_Type) return Boolean is - (Valid_Stride (FB) and FB_Last_Page (FB) <= GTT_Range'Last); + (Valid_Stride (FB) and FB_Last_Page (FB) < GTT_Rotation_Offset); -- Also check that we don't overflow the GTT's 39-bit space -- (always true with a 32-bit base) @@ -499,6 +499,30 @@ Valid => True); Phys_Addr := Phys_Addr + GTT_Page_Size; end loop; + + if Rotation_90 (FB) and FB.Tiling = Y_Tiled and FB.V_Stride >= 32 then + declare + V_Pages : constant Natural := Natural (FB.V_Stride) / 32; + Bytes_Per_Row : constant GTT_Address_Type := + GTT_Address_Type (Pixel_To_Bytes (32 * FB.Stride, FB)); + begin + Phys_Addr := GTT_Address_Type (Phys_Base) + + GTT_Address_Type (FB.Offset) + + GTT_Address_Type (FB_Size (FB)); + for Page in FB_First_Page (FB) .. FB_Last_Page (FB) loop + Phys_Addr := Phys_Addr - Bytes_Per_Row; + Registers.Write_GTT + (GTT_Page => GTT_Rotation_Offset + Page, + Device_Address => Phys_Addr, + Valid => True); + + if (Page - FB_First_Page (FB) + 1) mod V_Pages = 0 then + Phys_Addr := Phys_Addr + GTT_Page_Size + + GTT_Address_Type (V_Pages) * Bytes_Per_Row; + end if; + end loop; + end; + end if; end Setup_Default_GTT; ---------------------------------------------------------------------------- diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index 9943e44..50a76a0 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -95,6 +95,8 @@ GTT_Page_Size : constant := 4096; type GTT_Address_Type is mod 2 ** 39; subtype GTT_Range is Natural range 0 .. 16#8_0000# - 1; + GTT_Rotation_Offset : constant GTT_Range := GTT_Range'Last / 2 + 1; + procedure Write_GTT (GTT_Page : GTT_Range; Device_Address : GTT_Address_Type; @@ -161,6 +163,8 @@ Tile_Width : constant array (Tiling_Type) of Pos32 := (Linear => 16, X_Tiled => 128, Y_Tiled => 32); + Tile_Rows : constant array (Tiling_Type) of Pos32 := + (Linear => 1, X_Tiled => 8, Y_Tiled => 32); function FB_Pitch (Px : Pixel_Type; FB : Framebuffer_Type) return Natural is (Natural (Div_Round_Up @@ -168,6 +172,8 @@ function Valid_Stride (FB : Framebuffer_Type) return Boolean is (FB.Width <= FB.Stride and - Pixel_To_Bytes (FB.Stride, FB) mod (Tile_Width (FB.Tiling) * 4) = 0); + Pixel_To_Bytes (FB.Stride, FB) mod (Tile_Width (FB.Tiling) * 4) = 0 and + FB.Height <= FB.V_Stride and + FB.V_Stride mod Tile_Rows (FB.Tiling) = 0); end HW.GFX.GMA; diff --git a/common/hw-gfx.ads b/common/hw-gfx.ads index 5594b18..5d8ae59 100644 --- a/common/hw-gfx.ads +++ b/common/hw-gfx.ads @@ -47,6 +47,14 @@ Offset : Word32; end record; + function Rotation_90 (FB : Framebuffer_Type) return Boolean is + (FB.Rotation = Rotated_90 or FB.Rotation = Rotated_270); + + function Rotated_Width (FB : Framebuffer_Type) return Pos16 is + (if Rotation_90 (FB) then Pos16 (FB.Height) else Pos16 (FB.Width)); + function Rotated_Height (FB : Framebuffer_Type) return Pos16 is + (if Rotation_90 (FB) then Pos16 (FB.Width) else Pos16 (FB.Height)); + function Pixel_To_Bytes (Pixel : Pixel_Type; FB : Framebuffer_Type) return Pos32 is (Pixel * Pos32 (FB.BPC) / (8 / 4)); function FB_Size (FB : Framebuffer_Type) return Pos32 is -- To view, visit https://review.coreboot.org/22711 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1c901b7abc0fe7764bee87f6fda58ba9fa3f340d Gerrit-Change-Number: 22711 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: Add Rotation setting to Framebuffer
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22710 Change subject: Add Rotation setting to Framebuffer ...................................................................... Add Rotation setting to Framebuffer Add a Rotation setting to the Framebuffer type that tells us if the framebuffer is rotated by 90, 180 or 270 degrees. The hardware should rotate the picture in the opposite direction before display. To support more complex memory layouts, we also add a V_Stride (ver- tical stride) setting. Change-Id: I6430fb44b5c9cfcf9fa58684a425e8c2e4647ac3 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/hw-gfx.ads M gfxtest/hw-gfx-gma-gfx_test.adb 2 files changed, 13 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/10/22710/1 diff --git a/common/hw-gfx.ads b/common/hw-gfx.ads index 67662ed..5594b18 100644 --- a/common/hw-gfx.ads +++ b/common/hw-gfx.ads @@ -23,9 +23,9 @@ -- such that the count of pixels in any framebuffer may fit subtype Pixel_Type is Pos32 range 1 .. 8192 * 8192; - -- implementation only supports 4800p for now ;-) - subtype Width_Type is Pos32 range 1 .. 4800; - subtype Height_Type is Pos32 range 1 .. 7680; + -- Allow same range for width and height (for rotated framebuffers) + subtype Width_Type is Pos32 range 1 .. 8192; + subtype Height_Type is Pos32 range 1 .. 8192; Auto_BPC : constant := 5; subtype BPC_Type is Int64 range Auto_BPC .. 16; @@ -33,27 +33,33 @@ type Tiling_Type is (Linear, X_Tiled, Y_Tiled); subtype XY_Tiling is Tiling_Type range X_Tiled .. Y_Tiled; + type Rotation_Type is (No_Rotation, Rotated_90, Rotated_180, Rotated_270); + type Framebuffer_Type is record Width : Width_Type; Height : Height_Type; BPC : BPC_Type; Stride : Width_Type; + V_Stride : Height_Type; Tiling : Tiling_Type; + Rotation : Rotation_Type; Offset : Word32; end record; function Pixel_To_Bytes (Pixel : Pixel_Type; FB : Framebuffer_Type) return Pos32 is (Pixel * Pos32 (FB.BPC) / (8 / 4)); function FB_Size (FB : Framebuffer_Type) return Pos32 is - (Pixel_To_Bytes (FB.Stride * FB.Height, FB)); + (Pixel_To_Bytes (FB.Stride * FB.V_Stride, FB)); Default_FB : constant Framebuffer_Type := Framebuffer_Type' (Width => 1, Height => 1, BPC => 8, Stride => 1, + V_Stride => 1, Tiling => Linear, + Rotation => No_Rotation, Offset => 0); subtype Frequency_Type is Pos64 range 24_000_000 .. 600_000_000; diff --git a/gfxtest/hw-gfx-gma-gfx_test.adb b/gfxtest/hw-gfx-gma-gfx_test.adb index ef6c91d..9a5ce0a 100644 --- a/gfxtest/hw-gfx-gma-gfx_test.adb +++ b/gfxtest/hw-gfx-gma-gfx_test.adb @@ -157,9 +157,11 @@ Height => Height_Type (Mode.V_Visible), BPC => 8, Stride => Width_Type ((Word32 (Mode.H_Visible) + 15) and not 15), + V_Stride => Height_Type (Mode.V_Visible), Tiling => Linear, + Rotation => No_Rotation, Offset => Offset); - Offset := Offset + Word32 (FB.Stride * FB.Height * 4); + Offset := Offset + Word32 (FB_Size (FB)); end Calc_Framebuffer; Pipes : GMA.Pipe_Configs; -- To view, visit https://review.coreboot.org/22710 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6430fb44b5c9cfcf9fa58684a425e8c2e4647ac3 Gerrit-Change-Number: 22710 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: gma: Set tiled framebuffers up through Plane_Control
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22709 Change subject: gma: Set tiled framebuffers up through Plane_Control ...................................................................... gma: Set tiled framebuffers up through Plane_Control On platforms with Plane_Control registers (Broxton/Skylake+) we can use X and Y tiled framebuffers for scanout (older platforms support X tiling only). As our main use case is 90° rotation with Y tiled framebuffers, we implement it for the newer platforms only for now. We also set up a fence register for linear access to the tiled frame- buffer through the aperture. Change-Id: I913c82f62fd28b681a06ce13f41160a07e559799 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma-pipe_setup.adb M common/hw-gfx-gma.adb M common/hw-gfx-gma.ads M common/hw-gfx.ads 5 files changed, 60 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/09/22709/1 diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 0f60375..6eff5d2 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -186,16 +186,14 @@ Pipe : Pipe_Index) return Boolean is - function To_Bytes (Pixels : Width_Type) return Pos32 is - begin - return Pos32 (Pixels) * 4 * Pos32 (Framebuffer.BPC) / 8; - end To_Bytes; begin -- No downscaling -- Respect maximum scalable width -- VGA plane is only allowed on the primary pipe -- Only 32bpp RGB (ignored for VGA plane) - -- Stride must be a multiple of 64 bytes (ignored for VGA plane) + -- Stride must be big enough and a multiple of 64 bytes or the tile size + -- (ignored for VGA plane) + -- Tiling is only supported on newer generations (with Plane_Control) return ((Framebuffer.Width = Pos32 (Port_Cfg.Mode.H_Visible) and Framebuffer.Height = Pos32 (Port_Cfg.Mode.V_Visible)) or @@ -205,8 +203,8 @@ (Framebuffer.Offset /= VGA_PLANE_FRAMEBUFFER_OFFSET or Pipe = Primary) and (Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or - (Framebuffer.BPC = 8 and - To_Bytes (Framebuffer.Stride) mod 64 = 0)); + (Framebuffer.BPC = 8 and Valid_Stride (Framebuffer) and + (Config.Has_Plane_Control or Framebuffer.Tiling = Linear))); end Validate_Config; end HW.GFX.GMA.Config_Helpers; diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index 256c7f5..215b4de 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -39,6 +39,16 @@ PLANE_CTL_PLANE_ENABLE : constant := 1 * 2 ** 31; PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 : constant := 4 * 2 ** 24; PLANE_CTL_PLANE_GAMMA_DISABLE : constant := 1 * 2 ** 13; + PLANE_CTL_TILED_SURFACE_MASK : constant := 7 * 2 ** 10; + PLANE_CTL_TILED_SURFACE_LINEAR : constant := 0 * 2 ** 10; + PLANE_CTL_TILED_SURFACE_X_TILED : constant := 1 * 2 ** 10; + PLANE_CTL_TILED_SURFACE_Y_TILED : constant := 4 * 2 ** 10; + PLANE_CTL_TILED_SURFACE_YF_TILED : constant := 5 * 2 ** 10; + + PLANE_CTL_TILED_SURFACE : constant array (Tiling_Type) of Word32 := + (Linear => PLANE_CTL_TILED_SURFACE_LINEAR, + X_Tiled => PLANE_CTL_TILED_SURFACE_X_TILED, + Y_Tiled => PLANE_CTL_TILED_SURFACE_Y_TILED); PLANE_WM_ENABLE : constant := 1 * 2 ** 31; PLANE_WM_LINES_SHIFT : constant := 14; @@ -131,7 +141,7 @@ procedure Setup_Hires_Plane (Controller : Controller_Type; - Framebuffer : HW.GFX.Framebuffer_Type) + FB : HW.GFX.Framebuffer_Type) with Global => (In_Out => Registers.Register_State), Depends => @@ -139,19 +149,11 @@ =>+ (Registers.Register_State, Controller, - Framebuffer)) + FB)) is -- FIXME: setup correct format, based on framebuffer RGB format Format : constant Word32 := 6 * 2 ** 26; PRI : Word32 := DSPCNTR_ENABLE or Format; - - function To_Bytes (Pixels : Width_Type) return Word32 - with - Pre => (Pos64 (Pixels) <= Pos64 (Word32'Last) / 4 / BPC_Type'Last * 8) - is - begin - return Word32 (Pos64 (Pixels) * 4 * Framebuffer.BPC / 8); - end To_Bytes; begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); @@ -160,14 +162,16 @@ (Register => Controller.PLANE_CTL, Value => PLANE_CTL_PLANE_ENABLE or PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 or - PLANE_CTL_PLANE_GAMMA_DISABLE); + PLANE_CTL_PLANE_GAMMA_DISABLE or + PLANE_CTL_TILED_SURFACE (FB.Tiling)); Registers.Write (Controller.PLANE_OFFSET, 16#0000_0000#); Registers.Write (Controller.PLANE_SIZE, - Encode (Pos16 (Framebuffer.Width), Pos16 (Framebuffer.Height))); - Registers.Write (Controller.PLANE_STRIDE, To_Bytes (Framebuffer.Stride) / 64); + Encode (Pos16 (FB.Width), Pos16 (FB.Height))); + Registers.Write + (Controller.PLANE_STRIDE, Word32 (FB_Pitch (FB.Stride, FB))); Registers.Write (Controller.PLANE_POS, 16#0000_0000#); - Registers.Write (Controller.PLANE_SURF, Framebuffer.Offset and 16#ffff_f000#); + Registers.Write (Controller.PLANE_SURF, FB.Offset and 16#ffff_f000#); else if Config.Disable_Trickle_Feed then PRI := PRI or DSPCNTR_DISABLE_TRICKLE_FEED; @@ -179,8 +183,9 @@ Mask_Unset => DSPCNTR_MASK, Mask_Set => PRI); - Registers.Write (Controller.DSPSTRIDE, To_Bytes (Framebuffer.Stride)); - Registers.Write (Controller.DSPSURF, Framebuffer.Offset and 16#ffff_f000#); + Registers.Write + (Controller.DSPSTRIDE, Word32 (Pixel_To_Bytes (FB.Stride, FB))); + Registers.Write (Controller.DSPSURF, FB.Offset and 16#ffff_f000#); if Config.Has_DSP_Linoff then Registers.Write (Controller.DSPLINOFF, 0); end if; diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index 9f835d2..76b271d 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -464,7 +464,7 @@ -- Check basics and that it fits in GTT function Valid_FB (FB : Framebuffer_Type) return Boolean is - (FB.Width <= FB.Stride and FB_Last_Page (FB) <= GTT_Range'Last); + (Valid_Stride (FB) and FB_Last_Page (FB) <= GTT_Range'Last); -- Also check that we don't overflow the GTT's 39-bit space -- (always true with a 32-bit base) @@ -611,6 +611,20 @@ Success := Phys_Base /= GMA_Phys_Base_Mask and Phys_Base /= 0; pragma Debug (not Success, Debug.Put_Line ("Failed to read stolen memory base.")); + + if Success then + if FB.Tiling in XY_Tiling then + Registers.Add_Fence + (First_Page => FB_First_Page (FB), + Last_Page => FB_Last_Page (FB), + Tiling => FB.Tiling, + Pitch => FB_Pitch (FB.Stride, FB), + Success => Success); + end if; + pragma Debug (not Success, Debug.Put_Line + ("Tiled framebuffer but no fence regs available.")); + end if; + if Success then Setup_Default_GTT (FB, Phys_Base); end if; diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index cd992b8..9943e44 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -157,4 +157,17 @@ subtype DDI_HDMI_Buf_Trans_Range is Integer range 0 .. 11; + ---------------------------------------------------------------------------- + + Tile_Width : constant array (Tiling_Type) of Pos32 := + (Linear => 16, X_Tiled => 128, Y_Tiled => 32); + + function FB_Pitch (Px : Pixel_Type; FB : Framebuffer_Type) return Natural is + (Natural (Div_Round_Up + (Pixel_To_Bytes (Px, FB), Tile_Width (FB.Tiling) * 4))); + + function Valid_Stride (FB : Framebuffer_Type) return Boolean is + (FB.Width <= FB.Stride and + Pixel_To_Bytes (FB.Stride, FB) mod (Tile_Width (FB.Tiling) * 4) = 0); + end HW.GFX.GMA; diff --git a/common/hw-gfx.ads b/common/hw-gfx.ads index c5d9631..67662ed 100644 --- a/common/hw-gfx.ads +++ b/common/hw-gfx.ads @@ -20,6 +20,9 @@ package HW.GFX is + -- such that the count of pixels in any framebuffer may fit + subtype Pixel_Type is Pos32 range 1 .. 8192 * 8192; + -- implementation only supports 4800p for now ;-) subtype Width_Type is Pos32 range 1 .. 4800; subtype Height_Type is Pos32 range 1 .. 7680; @@ -40,8 +43,10 @@ Offset : Word32; end record; + function Pixel_To_Bytes (Pixel : Pixel_Type; FB : Framebuffer_Type) + return Pos32 is (Pixel * Pos32 (FB.BPC) / (8 / 4)); function FB_Size (FB : Framebuffer_Type) return Pos32 is - (FB.Stride * FB.Height * Pos32 (FB.BPC) / (8 / 4)); + (Pixel_To_Bytes (FB.Stride * FB.Height, FB)); Default_FB : constant Framebuffer_Type := Framebuffer_Type' (Width => 1, -- To view, visit https://review.coreboot.org/22709 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I913c82f62fd28b681a06ce13f41160a07e559799 Gerrit-Change-Number: 22709 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: gma registers: Add procedures to set fence registers
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22708 Change subject: gma registers: Add procedures to set fence registers ...................................................................... gma registers: Add procedures to set fence registers Through fence registers, we can tell the hardware which parts of the aperture cover tiled framebuffers. Only legacy X and Y tiling is sup- ported. According to `i915_reg.h` there are 16 fence registers from G4x on and 32 from Ivy Bridge on (this only partially matches docu- mentation: Haswell has 16 regs documented and the fence registers were not documented at all before). Change-Id: I02edc99b315e24dc175c6f93aff627e59cb1ff0b Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-registers.adb M common/hw-gfx-gma-registers.ads M common/hw-gfx.ads 4 files changed, 90 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/08/22708/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index e82b133..252b023 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -287,4 +287,12 @@ when Ironlake .. Haswell => 4, when Broadwell .. Skylake => 8); + Fence_Base : constant := (case CPU is + when Ironlake => 16#0000_3000#, + when Sandybridge .. Skylake => 16#0010_0000#); + + Fence_Count : constant := (case CPU is + when Ironlake .. Sandybridge => 16, + when Ivybridge .. Skylake => 32); + end HW.GFX.GMA.Config; diff --git a/common/hw-gfx-gma-registers.adb b/common/hw-gfx-gma-registers.adb index 4a22564..94965d5 100644 --- a/common/hw-gfx-gma-registers.adb +++ b/common/hw-gfx-gma-registers.adb @@ -61,19 +61,84 @@ ---------------------------------------------------------------------------- + subtype Fence_Range is Registers_Range range 0 .. Config.Fence_Count - 1; + + FENCE_PAGE_SHIFT : constant := 12; + FENCE_PAGE_MASK : constant := 16#ffff_f000#; + FENCE_TILE_WALK_YMAJOR : constant := 1 * 2 ** 1; + FENCE_VALID : constant := 1 * 2 ** 0; + + function Fence_Lower_Idx (Fence : Fence_Range) return Registers_Range is + (Config.Fence_Base / Register_Width + 2 * Fence); + function Fence_Upper_Idx (Fence : Fence_Range) return Registers_Range is + (Fence_Lower_Idx (Fence) + 1); + procedure Clear_Fences is - Fence_Regs_Base : constant := - (case Config.CPU is - when Ironlake => 16#00_3000#, - when Sandybridge .. Skylake => 16#10_0000#); - subtype Fence_Range is Registers_Range range 0 .. 63; begin - for Idx in Fence_Range loop - Regs.Write (Fence_Regs_Base / Register_Width + Idx, 0); + for Fence in Fence_Range loop + Regs.Write (Fence_Lower_Idx (Fence), 0); end loop; end Clear_Fences; + procedure Add_Fence + (First_Page : in GTT_Range; + Last_Page : in GTT_Range; + Tiling : in XY_Tiling; + Pitch : in Natural; + Success : out Boolean) + is + Y_Tiles : constant Boolean := Tiling = Y_Tiled; + Reg32 : Word32; + begin + pragma Debug (Debug.Put (GNAT.Source_Info.Enclosing_Entity & ": ")); + pragma Debug (Debug.Put_Word32 (Shift_Left (Word32 (First_Page), 12))); + pragma Debug (Debug.Put (":")); + pragma Debug (Debug.Put_Word32 (Shift_Left (Word32 (Last_Page), 12))); + pragma Debug (not Y_Tiles, Debug.Put (" X tiled in ")); + pragma Debug ( Y_Tiles, Debug.Put (" Y tiled in ")); + pragma Debug (Debug.Put_Int32 (Int32 (Pitch))); + pragma Debug (Debug.Put_Line (" tiles per row.")); + + Success := False; + for Fence in Fence_Range loop + Regs.Read (Reg32, Fence_Lower_Idx (Fence)); + if (Reg32 and FENCE_VALID) = 0 then + Regs.Write + (Index => Fence_Lower_Idx (Fence), + Value => Shift_Left (Word32 (First_Page), FENCE_PAGE_SHIFT) or + (if Y_Tiles then FENCE_TILE_WALK_YMAJOR else 0) or + FENCE_VALID); + Regs.Write + (Index => Fence_Upper_Idx (Fence), + Value => Shift_Left (Word32 (Last_Page), FENCE_PAGE_SHIFT) or + Word32 (Pitch) * (if Y_Tiles then 1 else 4) - 1); + Success := True; + exit; + end if; + end loop; + end Add_Fence; + + procedure Remove_Fence (First_Page, Last_Page : GTT_Range) + is + Page_Lower : constant Word32 := + Shift_Left (Word32 (First_Page), FENCE_PAGE_SHIFT); + Page_Upper : constant Word32 := + Shift_Left (Word32 (Last_Page), FENCE_PAGE_SHIFT); + Fence_Upper, Fence_Lower : Word32; + begin + for Fence in Fence_Range loop + Regs.Read (Fence_Lower, Fence_Lower_Idx (Fence)); + Regs.Read (Fence_Upper, Fence_Upper_Idx (Fence)); + if (Fence_Lower and FENCE_PAGE_MASK) = Page_Lower and + (Fence_Upper and FENCE_PAGE_MASK) = Page_Upper + then + Regs.Write (Fence_Lower_Idx (Fence), 0); + exit; + end if; + end loop; + end Remove_Fence; + ---------------------------------------------------------------------------- procedure Write_GTT diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 2a01aab..87c8069 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -1531,6 +1531,15 @@ procedure Clear_Fences; + procedure Add_Fence + (First_Page : in GTT_Range; + Last_Page : in GTT_Range; + Tiling : in XY_Tiling; + Pitch : in Natural; + Success : out Boolean); + + procedure Remove_Fence (First_Page, Last_Page : GTT_Range); + pragma Warnings (Off, "declaration of ""Write_GTT"" hides one at *"); procedure Write_GTT (GTT_Page : GTT_Range; diff --git a/common/hw-gfx.ads b/common/hw-gfx.ads index ae19235..c5d9631 100644 --- a/common/hw-gfx.ads +++ b/common/hw-gfx.ads @@ -28,6 +28,7 @@ subtype BPC_Type is Int64 range Auto_BPC .. 16; type Tiling_Type is (Linear, X_Tiled, Y_Tiled); + subtype XY_Tiling is Tiling_Type range X_Tiled .. Y_Tiled; type Framebuffer_Type is record -- To view, visit https://review.coreboot.org/22708 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I02edc99b315e24dc175c6f93aff627e59cb1ff0b Gerrit-Change-Number: 22708 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: Add Tiling setting to Framebuffer
by Nico Huber (Code Review) 05 Dec '17

05 Dec '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22707 Change subject: Add Tiling setting to Framebuffer ...................................................................... Add Tiling setting to Framebuffer Beside linear framebuffers, we can, on Intel hardware, easily support X and Y tiled framebuffers too. If we access the framebuffer through the aperture window, we can let the hardware handle the tiling. Tiling generally divides the framebuffer into rectangular pieces of fixed size where each piece, or tile, is represented by one page of memory. Even inside one tile, the pixels are not always ordered linearly but either in a row-major (aka. X tiled) or column-major (aka. Y tiled) manner. Change-Id: I3e6f93caa8f2485a5792d72cfe2e8b3902add7a3 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M common/hw-gfx.ads M gfxtest/hw-gfx-gma-gfx_test.adb 2 files changed, 15 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/07/22707/1 diff --git a/common/hw-gfx.ads b/common/hw-gfx.ads index daf648d..ae19235 100644 --- a/common/hw-gfx.ads +++ b/common/hw-gfx.ads @@ -27,24 +27,28 @@ Auto_BPC : constant := 5; subtype BPC_Type is Int64 range Auto_BPC .. 16; + type Tiling_Type is (Linear, X_Tiled, Y_Tiled); + type Framebuffer_Type is record - Width : Width_Type; - Height : Height_Type; - BPC : BPC_Type; - Stride : Width_Type; - Offset : Word32; + Width : Width_Type; + Height : Height_Type; + BPC : BPC_Type; + Stride : Width_Type; + Tiling : Tiling_Type; + Offset : Word32; end record; function FB_Size (FB : Framebuffer_Type) return Pos32 is (FB.Stride * FB.Height * Pos32 (FB.BPC) / (8 / 4)); Default_FB : constant Framebuffer_Type := Framebuffer_Type' - (Width => 1, - Height => 1, - BPC => 8, - Stride => 1, - Offset => 0); + (Width => 1, + Height => 1, + BPC => 8, + Stride => 1, + Tiling => Linear, + Offset => 0); subtype Frequency_Type is Pos64 range 24_000_000 .. 600_000_000; diff --git a/gfxtest/hw-gfx-gma-gfx_test.adb b/gfxtest/hw-gfx-gma-gfx_test.adb index d870401..ef6c91d 100644 --- a/gfxtest/hw-gfx-gma-gfx_test.adb +++ b/gfxtest/hw-gfx-gma-gfx_test.adb @@ -157,6 +157,7 @@ Height => Height_Type (Mode.V_Visible), BPC => 8, Stride => Width_Type ((Word32 (Mode.H_Visible) + 15) and not 15), + Tiling => Linear, Offset => Offset); Offset := Offset + Word32 (FB.Stride * FB.Height * 4); end Calc_Framebuffer; -- To view, visit https://review.coreboot.org/22707 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3e6f93caa8f2485a5792d72cfe2e8b3902add7a3 Gerrit-Change-Number: 22707 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: security/vboot: Guard google_chromeec_reboot by if clause
by build bot (Jenkins) (Code Review) 04 Dec '17

04 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22668 ) Change subject: security/vboot: Guard google_chromeec_reboot by if clause ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64055/ : SUCCESS -- To view, visit https://review.coreboot.org/22668 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I058e929e2acd883d2265b2ab019743e3849cb3af Gerrit-Change-Number: 22668 Gerrit-PatchSet: 2 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Dec 2017 22:25:34 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amd/stoneyridge/southbridge.c: Fix table intr_types[]
by build bot (Jenkins) (Code Review) 04 Dec '17

04 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22548 ) Change subject: amd/stoneyridge/southbridge.c: Fix table intr_types[] ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64054/ : SUCCESS -- To view, visit https://review.coreboot.org/22548 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0f0921e0a540a31b1fb7ec3940006d632cb25f55 Gerrit-Change-Number: 22548 Gerrit-PatchSet: 4 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Dec 2017 22:16:03 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Move intr_types[] table
by build bot (Jenkins) (Code Review) 04 Dec '17

04 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22476 ) Change subject: soc/amd/stoneyridge: Move intr_types[] table ...................................................................... Patch Set 14: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64053/ : SUCCESS -- To view, visit https://review.coreboot.org/22476 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I18907c93e1eec341d56cea13bb73a336d8e7b05b Gerrit-Change-Number: 22476 Gerrit-PatchSet: 14 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Dec 2017 22:13:01 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amd/stoneyridge: Delete early_setup.c
by build bot (Jenkins) (Code Review) 04 Dec '17

04 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22569 ) Change subject: amd/stoneyridge: Delete early_setup.c ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64051/ : SUCCESS -- To view, visit https://review.coreboot.org/22569 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibe75a2d5cc46641e9d0af462a8a0ba5bb7a0f9c3 Gerrit-Change-Number: 22569 Gerrit-PatchSet: 5 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 04 Dec 2017 22:10:10 +0000 Gerrit-HasComments: No

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