coreboot-gerrit October 2017

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Change in coreboot[master]: soc/amd/stoneyridge: Remove direct AGESA header includes
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21716 ) Change subject: soc/amd/stoneyridge: Remove direct AGESA header includes ...................................................................... Patch Set 5: Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/61437/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/16570/ : SUCCESS -- To view, visit https://review.coreboot.org/21716 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iadc516e11148048ed9bf43c7a46827793245027a Gerrit-Change-Number: 21716 Gerrit-PatchSet: 5 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:44:22 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: AMD Stoney Ridge: Add agesa_headers.h
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21713 ) Change subject: AMD Stoney Ridge: Add agesa_headers.h ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61435/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16569/ : SUCCESS -- To view, visit https://review.coreboot.org/21713 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib7d76811c1270ec7ef71266d84f3960919b792d4 Gerrit-Change-Number: 21713 Gerrit-PatchSet: 5 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:43:25 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/kahlee: Remove direct AGESA header includes
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21714 ) Change subject: mb/google/kahlee: Remove direct AGESA header includes ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61434/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16568/ : SUCCESS -- To view, visit https://review.coreboot.org/21714 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I642f5caf8a37ae4042c32fec3a92e0995193cb7a Gerrit-Change-Number: 21714 Gerrit-PatchSet: 5 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:41:05 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/common: Remove direct AGESA header includes
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21715 ) Change subject: soc/amd/common: Remove direct AGESA header includes ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61436/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16567/ : SUCCESS -- To view, visit https://review.coreboot.org/21715 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I94140235f46a627dda99540af8619aeca3f4f157 Gerrit-Change-Number: 21715 Gerrit-PatchSet: 5 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:40:50 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/gm45: Remove UMA alignment optimization
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21847 ) Change subject: nb/intel/gm45: Remove UMA alignment optimization ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61433/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16566/ : SUCCESS -- To view, visit https://review.coreboot.org/21847 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d Gerrit-Change-Number: 21847 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:35:36 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: vc/amd/pi/00670F00: Remove HeapXXBuffer functions
by Martin Roth (Code Review) 02 Oct '17

02 Oct '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21848 Change subject: vc/amd/pi/00670F00: Remove HeapXXBuffer functions ...................................................................... vc/amd/pi/00670F00: Remove HeapXXBuffer functions The HeapAllocateBuffer and HEAPDeallocateBuffer functions are not used in Stoney Ridge, so get rid of them. Change-Id: I716d5c8957ced52c25fd501697111b1b0b263467 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/vendorcode/amd/pi/00670F00/binaryPI/AGESA.c 1 file changed, 0 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/21848/1 diff --git a/src/vendorcode/amd/pi/00670F00/binaryPI/AGESA.c b/src/vendorcode/amd/pi/00670F00/binaryPI/AGESA.c index 046dcb4..a4eef5a 100644 --- a/src/vendorcode/amd/pi/00670F00/binaryPI/AGESA.c +++ b/src/vendorcode/amd/pi/00670F00/binaryPI/AGESA.c @@ -51,19 +51,6 @@ #include <console/console.h> #include <commonlib/loglevel.h> -// TODO These need to be replaced with calls to CreateStruct() -AGESA_STATUS -HeapAllocateBuffer ( - IN OUT VOID *AllocateHeapParams, - IN OUT VOID *StdHeader - ); - -AGESA_STATUS -HeapDeallocateBuffer ( - IN UINT32 BufferHandle, - IN VOID *StdHeader - ); - CONST UINT32 ImageSignature = IMAGE_SIGNATURE; CONST UINT32 ModuleSignature = MODULE_SIGNATURE; CONST CHAR8 ModuleIdentifier[] = AGESA_ID; @@ -412,51 +399,4 @@ if (!module) return; Dispatcher = module->ModuleDispatcher; Dispatcher(FchDataPtr); -} - -// TODO This has to be removed -AGESA_STATUS -HeapAllocateBuffer ( - IN OUT VOID *AllocateHeapParams, - IN OUT VOID *StdHeader - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - - AMD_INTERFACE_PARAMS InterfaceParams = {}; - - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - - InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader; - InterfaceParams.StdHeader.Func = AMD_HEAP_ALLOCATE_BUFFER; - - InterfaceParams.AllocationMethod = PreMemHeap; - InterfaceParams.NewStructPtr = AllocateHeapParams; - - return Dispatcher(&InterfaceParams); -} - -// TODO This has to be removed -AGESA_STATUS -HeapDeallocateBuffer ( - IN UINT32 BufferHandle, - IN VOID *StdHeader - ) -{ - MODULE_ENTRY Dispatcher = NULL; - const AMD_MODULE_HEADER* module = agesawrapper_locate_module(ModuleIdentifier); - - AMD_INTERFACE_PARAMS InterfaceParams = {}; - - if (!module) return AGESA_UNSUPPORTED; - Dispatcher = module->ModuleDispatcher; - - InterfaceParams.StdHeader = *(AMD_CONFIG_PARAMS*)StdHeader; - InterfaceParams.StdHeader.Func = AMD_HEAP_DEALLOCATE_BUFFER; - - InterfaceParams.NewStructPtr = &BufferHandle; - - return Dispatcher(&InterfaceParams); } -- To view, visit https://review.coreboot.org/21848 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I716d5c8957ced52c25fd501697111b1b0b263467 Gerrit-Change-Number: 21848 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: google/gru: Fix pmu1833_volsel handling
by Julius Werner (Code Review) 02 Oct '17

02 Oct '17

Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/21727 ) Change subject: google/gru: Fix pmu1833_volsel handling ...................................................................... google/gru: Fix pmu1833_volsel handling RK3399 has a pin that can decide whether GPIO port 1 is driven with 1.8V or 3.0V. We thought this mechanism was disabled by default, but it turns out it wasn't. We want to use that pin as an output GPIO on Scarlet so we need to reconfigure the respective SoC controls before we do that. It seems that we also need to explicitly pinmux the pin away from that special function (to normal GPIO) or weird things happen on some boards. BUG=b:66534913 TEST=Sprinkled several long udelays, poked test points with a multi-meter on Scarlet. Change-Id: Ia02cbb4f3b2f14b0d958b84adcddb0c5f4259efa Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/21727 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/gru/bootblock.c 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index a3d3121..162a7e5 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -48,6 +48,12 @@ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 3)); + /* Reconfigure GPIO1 from dynamic voltage selection through GPIO0_B1 to + hardcoded 1.8V, and change that pin to a normal GPIO. The TRM says + this is already the power-on reset, but we all know that TRMs lie. */ + write32(&rk3399_pmugrf->soc_con0, RK_SETBITS(1 << 9 | 1 << 8)); + write32(&rk3399_pmugrf->gpio0b_iomux, RK_CLRBITS(3 << 2)); + /* Enable rails powering GPIO blocks, among other things. */ gpio_output(GPIO_P30V_EN, 1); if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) -- To view, visit https://review.coreboot.org/21727 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ia02cbb4f3b2f14b0d958b84adcddb0c5f4259efa Gerrit-Change-Number: 21727 Gerrit-PatchSet: 3 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/gm45: Remove UMA alignment optimization
by Nico Huber (Code Review) 02 Oct '17

02 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/21847 Change subject: nb/intel/gm45: Remove UMA alignment optimization ...................................................................... nb/intel/gm45: Remove UMA alignment optimization This code path was only triggered in one corner case: GFX UMA set to 48MiB. It created a hole below UMA to save MTRRs. But, this hole was never accounted for when calculating cbmem_top(). Instead of trying to fix it, remove it, it's not worth the trouble. Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/gm45/raminit.c 2 files changed, 3 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/21847/1 diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 3cb7d11..8215979 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -71,7 +71,7 @@ static void mch_domain_read_resources(device_t dev) { u64 tom, touud; - u32 tomk, tolud, uma_sizek = 0, usable_tomk; + u32 tomk, tolud, uma_sizek = 0; u32 pcie_config_base, pcie_config_size; /* Total Memory 2GB example: @@ -130,16 +130,12 @@ uma_sizek = gms_sizek + gsm_sizek; } - usable_tomk = ALIGN_DOWN(tomk, 64 << 10); - if (tomk - usable_tomk > (16 << 10)) - usable_tomk = tomk; - - printk(BIOS_INFO, "Available memory below 4GB: %uM\n", usable_tomk >> 10); + printk(BIOS_INFO, "Available memory below 4GB: %uM\n", tomk >> 10); /* Report the memory regions */ ram_resource(dev, 3, 0, legacy_hole_base_k); ram_resource(dev, 4, legacy_hole_base_k + legacy_hole_size_k, - (usable_tomk - (legacy_hole_base_k + legacy_hole_size_k))); + (tomk - (legacy_hole_base_k + legacy_hole_size_k))); /* * If >= 4GB installed then memory from TOLUD to 4GB diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index d2da3b0..a44e397 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1241,10 +1241,6 @@ printk(BIOS_DEBUG, " and %uM GTT\n", gsm_sizek >> 10); uma_sizem = (gms_sizek + gsm_sizek) >> 10; - /* Further reduce MTRR usage if it costs use less than - 16 MiB. */ - if (ALIGN_UP(uma_sizem, 64) - uma_sizem <= 16) - uma_sizem = ALIGN_UP(uma_sizem, 64); } } -- To view, visit https://review.coreboot.org/21847 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d Gerrit-Change-Number: 21847 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: mb/amd/gardenia: Remove direct AGESA header includes
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21717 ) Change subject: mb/amd/gardenia: Remove direct AGESA header includes ...................................................................... Patch Set 4: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/61432/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/16565/ : SUCCESS -- To view, visit https://review.coreboot.org/21717 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3c9ae7a435fadabf577f1f65ad4a6aa6234e9a29 Gerrit-Change-Number: 21717 Gerrit-PatchSet: 4 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:02:06 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/amd/stoneyridge: Remove direct AGESA header includes
by build bot (Jenkins) (Code Review) 02 Oct '17

02 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21716 ) Change subject: soc/amd/stoneyridge: Remove direct AGESA header includes ...................................................................... Patch Set 4: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/61431/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/16564/ : SUCCESS -- To view, visit https://review.coreboot.org/21716 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iadc516e11148048ed9bf43c7a46827793245027a Gerrit-Change-Number: 21716 Gerrit-PatchSet: 4 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 Oct 2017 18:00:31 +0000 Gerrit-HasComments: No

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coreboot-gerrit October 2017