the following patch was just integrated into master:
commit 1241e7db55aff313e56bf4546d969c11368b08a2
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:19:10 2016 -0700
drivers/i2c/tpm/cr50: Improve data handling and function names
Unify the function names to be consistent throughout the driver
and improve the handling while waiting for data available and
data expected flags from the TPM.
BUG=chrome-os-partner:53336
Change-Id: I7e3912fb8d8c6ad17d1af2d2a7189bf7c0c52c8e
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/16656 for details.
-gerrit
the following patch was just integrated into master:
commit 884dfe632940b940df68d09f997fa5cd25121def
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:04:19 2016 -0700
x86: acpi: Add function for querying GPE status
Add a function that can be implemented by the SOC to read
and clear the status of a single GPE. This can be used
during firmware to poll for interrupt status.
BUG=chrome-os-partner:53336
Change-Id: I536c2176320fefa4c186dabcdddb55880c47fbad
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/16657 for details.
-gerrit
Duncan Laurie (dlaurie(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16657
-gerrit
commit 884dfe632940b940df68d09f997fa5cd25121def
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:04:19 2016 -0700
x86: acpi: Add function for querying GPE status
Add a function that can be implemented by the SOC to read
and clear the status of a single GPE. This can be used
during firmware to poll for interrupt status.
BUG=chrome-os-partner:53336
Change-Id: I536c2176320fefa4c186dabcdddb55880c47fbad
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
---
src/arch/x86/acpi.c | 5 +++++
src/arch/x86/include/arch/acpi.h | 3 +++
2 files changed, 8 insertions(+)
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index bbeb92f..edb6835 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -1093,3 +1093,8 @@ void acpi_save_gnvs(u32 gnvs_address)
if (gnvs)
*gnvs = gnvs_address;
}
+
+__attribute__ ((weak)) int acpi_get_gpe(int gpe)
+{
+ return -1; /* implemented by SOC */
+}
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index e81ddbf..7d29931 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -677,6 +677,9 @@ static inline int acpi_sleep_from_pm1(uint32_t pm1_cnt)
/* Returns ACPI_Sx values. */
int acpi_get_sleep_type(void);
+/* Read and clear GPE status */
+int acpi_get_gpe(int gpe);
+
static inline int acpi_s3_resume_allowed(void)
{
return IS_ENABLED(CONFIG_HAVE_ACPI_RESUME);
the following patch was just integrated into master:
commit 5e3dad66227bba4be9365ee76d00231bb5577b56
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:02:54 2016 -0700
soc/intel/apollolake: Initialize GPEs in bootblock
Initialize the GPEs from mainboard config in bootblock, so they
can be used in verstage to query latched interrupt status.
I still left it called in ramstage just to be sure that the
configuration was not overwritten in FSP stages.
Tested by reading and reporting GPE status in a loop in verstage
and manually triggering an interrupt on EC console.
BUG=chrome-os-partner:53336
Change-Id: I1af3e9ac1e5c59b9ebb5c6dd1599309c1f036581
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/16658 for details.
-gerrit
the following patch was just integrated into master:
commit 3d43a7c111d00be246160a04023fe438ae0cac57
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 12:05:49 2016 -0700
soc/intel/apollolake: Add function to read and clear GPE status
Implement the generic acpi_get_gpe() function to read and clear
the GPE status for a specific GPE.
Tested by watching GPE status in a loop while generating interrupts
manually from the EC console.
BUG=chrome-os-partner:53336
Change-Id: Id885e98d48c2133a868da19eca3360e2dfb82e84
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/16659 for details.
-gerrit
the following patch was just integrated into master:
commit a5e419c51187d24818f056327746a18676fe3a20
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 19 17:22:10 2016 -0700
drivers/i2c/tpm/cr50: Support interrupts for status
Support reading the ACPI GPE status (on x86) to determine when
the cr50 is ready to return response data or is done processing
written data. If the interrupt is not defined by Kconfig then
it will continue to use the safe delay.
This was tested with reef hardware and a modified cr50 image
that generates interrupts at the intended points.
BUG=chrome-os-partner:53336
Change-Id: I9f78f520fd089cb4471d8826a8cfecff67398bf8
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
See https://review.coreboot.org/16660 for details.
-gerrit