coreboot-gerrit January 2016

coreboot-gerrit@coreboot.org

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2471 discussions

New patch to review for coreboot: intel/braswell: Disable IFD & ME by default so abuild can build
by Martin Roth 04 Jan '16

04 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12828 -gerrit commit 60a5567d7e9bfff4015c115baa7be6fbadf977cf Author: Martin Roth <martinroth(a)google.com> Date: Mon Jan 4 14:23:53 2016 -0700 intel/braswell: Disable IFD & ME by default so abuild can build The Braswell IFD & ME blobs aren't published in the 3rdparty repo, so disable them by default for now. Change-Id: If68ff1f37fbf7afb2f9eb1e5d9942afcf40ab1e3 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/soc/intel/braswell/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 11d946a..c546e40 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -124,13 +124,13 @@ config ENABLE_BUILTIN_COM1 the debug console. config HAVE_IFD_BIN - def_bool y + def_bool n config BUILD_WITH_FAKE_IFD def_bool !HAVE_IFD_BIN config HAVE_ME_BIN - def_bool y + def_bool n config IED_REGION_SIZE hex

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New patch to review for coreboot: google/cyan, intel/strago Kconfig: Only ask to display SPD once
by Martin Roth 04 Jan '16

04 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12827 -gerrit commit 56c99b3cfa7764a3c3520ca7969f0e09faf107cc Author: Martin Roth <martinroth(a)google.com> Date: Mon Jan 4 14:07:35 2016 -0700 google/cyan, intel/strago Kconfig: Only ask to display SPD once Change-Id: Ic3df9bf7d7f3c4c39789f3f496bcb7fc2ee50931 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/google/cyan/Kconfig | 6 ------ src/mainboard/intel/strago/Kconfig | 5 ----- 2 files changed, 11 deletions(-) diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig index 7a3a11a..ba6116f 100644 --- a/src/mainboard/google/cyan/Kconfig +++ b/src/mainboard/google/cyan/Kconfig @@ -27,12 +27,6 @@ config DISPLAY_SPD_DATA help When enabled displays the memory configuration data. -config DISPLAY_SPD_DATA - bool "Display Memory Serial Presence Detect Data" - default n - help - When enabled displays the memory SPD data. - config DYNAMIC_VNN_SUPPORT bool "Enables support for Dynamic VNN" default n diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig index facd97f..e17e012 100755 --- a/src/mainboard/intel/strago/Kconfig +++ b/src/mainboard/intel/strago/Kconfig @@ -27,11 +27,6 @@ config DISPLAY_SPD_DATA help When enabled displays the memory configuration data. -config DISPLAY_SPD_DATA - bool "Display Memory Serial Presence Detect Data" - default n - help - When enabled displays the memory SPD data. config DYNAMIC_VNN_SUPPORT bool "Enables support for Dynamic VNN" default n

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New patch to review for coreboot: intel/braswell: Build in both C0 and 'other' vbios
by Martin Roth 04 Jan '16

04 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12826 -gerrit commit b6de0837a990e7d0686eb3badc86ca5a16513641 Author: Martin Roth <martinroth(a)google.com> Date: Mon Jan 4 12:43:22 2016 -0700 intel/braswell: Build in both C0 and 'other' vbios The Braswell CPU seems to have two different Video BIOS roms, one for the C0 revision, and one for other revisions. Build them both into the coreboot image, and let coreboot sort out which one should be used at runtime. This should allow one rom to be used for all revisions. The initial reason for this patch was that the Kconfig symbol C0_DISP_SUPPORT didn't exist, and was causing issues. This seems like the best way to eliminate the need for that symbol. Change-Id: I5b9f225c0daf4e02fda75daf9cd07bb160bf0e0f Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/google/cyan/Kconfig | 15 ++++++++++----- src/mainboard/intel/strago/Kconfig | 17 ++++++++++++----- src/soc/intel/braswell/Makefile.inc | 15 +++++++++++++-- 3 files changed, 35 insertions(+), 12 deletions(-) diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig index 7a3a11a..593548d 100644 --- a/src/mainboard/google/cyan/Kconfig +++ b/src/mainboard/google/cyan/Kconfig @@ -60,13 +60,18 @@ config VBOOT_REFCODE_INDEX if !GOP_SUPPORT config VGA_BIOS_FILE string - default "3rdparty/blobs/mainboard/intel/strago/vgabios_c0.bin" if C0_DISP_SUPPORT - default "3rdparty/blobs/mainboard/intel/strago/vgabios.bin" if !C0_DISP_SUPPORT + default "3rdparty/blobs/mainboard/intel/strago/vgabios.bin" + help + The C0 version of the video bios gets computed from this name + so that they can both be added. Only the correct one for the + system will be run. config VGA_BIOS_ID string - default "8086,22b1" if C0_DISP_SUPPORT - default "8086,22b0" if !C0_DISP_SUPPORT -endif + default "8086,22b0" + help + The VGA_BIOS_ID for the C0 version of the video bios is hardcoded + in soc/intel/braswell/Makefile.inc as 8086,22b1 +endif #GOP_SUPPORT endif # BOARD_GOOGLE_CYAN diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig index facd97f..3c12ece 100755 --- a/src/mainboard/intel/strago/Kconfig +++ b/src/mainboard/intel/strago/Kconfig @@ -50,11 +50,18 @@ config MAINBOARD_VENDOR if !GOP_SUPPORT config VGA_BIOS_FILE string - default "3rdparty/blobs/mainboard/intel/strago/vgabios_c0.bin" if C0_DISP_SUPPORT - default "3rdparty/blobs/mainboard/intel/strago/vgabios.bin" if !C0_DISP_SUPPORT + default "3rdparty/blobs/mainboard/intel/strago/vgabios.bin" + help + The C0 version of the video bios gets computed from this name + so that they can both be added. Only the correct one for the + system will be run. + config VGA_BIOS_ID string - default "8086,22b1" if C0_DISP_SUPPORT - default "8086,22b0" if !C0_DISP_SUPPORT -endif # GOP_SUPPORT + default "8086,22b0" + help + The VGA_BIOS_ID for the C0 version of the video bios is hardcoded + in soc/intel/braswell/Makefile.inc as 8086,22b1 + +endif #GOP_SUPPORT endif # BOARD_INTEL_STRAGO diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 54b9c6a..b61323d 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -43,7 +43,6 @@ ramstage-y += tsc_freq.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c - smm-y += lpc_init.c smm-y += pmutil.c smm-y += smihandler.c @@ -58,4 +57,16 @@ CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR) -endif +ifneq ($(CONFIG_GOP_SUPPORT),y) +ifneq ($(CONFIG_VGA_BIOS_FILE),) +#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin +BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))) + +cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom +pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS) +pci8086,22b1.rom-type := optionrom + +endif # ifneq ($(CONFIG_GOP_SUPPORT),y) +endif # ifneq ($(CONFIG_VGA_BIOS_FILE),) + +endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)

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Patch merged into coreboot/master: util/crossgcc: Add ppc64el support
by gerrit＠coreboot.org 04 Jan '16

04 Jan '16

the following patch was just integrated into master: commit a9f62359e2cf676104c64e9119ca82bd589305d9 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Dec 30 18:59:00 2015 -0600 util/crossgcc: Add ppc64el support Change-Id: I619f7c3cef7f0aaa6fccb3d52f2ac1f6ace6d0d6 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12818 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/12818 for details. -gerrit

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Patch merged into coreboot/master: util/crossgcc: Regenerate MPFR autotools files before build
by gerrit＠coreboot.org 04 Jan '16

04 Jan '16

the following patch was just integrated into master: commit 68d0e4a5a1e7028227f6fbe086c891955cb7854e Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Dec 30 14:52:19 2015 -0600 util/crossgcc: Regenerate MPFR autotools files before build The config.guess file included with MPFR is completely obsolete, leading to build failures on ppc64el due to the system architecture not being detected. Regenerate the files from the host system via automake before attempting to build MPFR. Change-Id: I00fc16003906e373d112c25978197ac907adccfd Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12816 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/12816 for details. -gerrit

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Patch merged into coreboot/master: util/crossgcc: Bump GMP version to 6.1.0
by gerrit＠coreboot.org 04 Jan '16

04 Jan '16

the following patch was just integrated into master: commit 9631016660423d0585a145400232fd68b7e3da8f Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Mon Dec 28 22:53:29 2015 -0600 util/crossgcc: Bump GMP version to 6.1.0 The previous official GMP release (6.0.0) contains a bug that prevents compilation on ppc64el systems. Increase version to the latest version (6.1.0). Bug details: gcc build on ppc64el fails with: (.text+0x4c): undefined reference to `BMOD_1_TO_MOD_1_THRESHOLD' While I don't have an exact commit hash due to Hg use upstream, a missing BMOD_1_TO_MOD_1_THRESHOLD define on ppc64el was quietly fixed in Hg before the 6.1.0 release. Change-Id: I1c05a1c194141db5f8522148c2e20e7558d34714 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12811 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/12811 for details. -gerrit

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New patch to review for coreboot: cbfstool: correct add-master-header logic to match runtime expectations
by Aaron Durbin 04 Jan '16

04 Jan '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12825 -gerrit commit 80d3a4f555dd2a6dd1e64ee10512fc19d5f82293 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Jan 4 13:56:00 2016 -0600 cbfstool: correct add-master-header logic to match runtime expectations The cbfs master header's offset and romsize fields are absolute values within the boot media proper. Therefore, when adding a master header provide the offset of the CBFS region one is operating on as well as the absolute end offset (romsize) to match expectations. Built with and without CBFS_SIZE != ROM_SIZE on x86 and ARM device. Manually inspected the master headers within the images to confirm proper caclulations. Change-Id: Id0623fd713ee7a481ce3326f4770c81beda20f64 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- util/cbfstool/cbfstool.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 2529296..4868956 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -225,6 +225,8 @@ static int cbfs_add_master_header(void) struct cbfs_file *header = NULL; struct buffer buffer; int ret = 1; + size_t offset; + size_t size; if (cbfs_image_from_buffer(&image, param.image_region, param.headeroffset)) { @@ -243,7 +245,6 @@ static int cbfs_add_master_header(void) struct cbfs_header *h = (struct cbfs_header *)buffer.data; h->magic = htonl(CBFS_HEADER_MAGIC); h->version = htonl(CBFS_HEADER_VERSION); - h->romsize = htonl(param.image_region->size); /* The 4 bytes are left out for two reasons: * 1. the cbfs master header pointer resides there * 2. some cbfs implementations assume that an image that resides @@ -252,10 +253,17 @@ static int cbfs_add_master_header(void) */ h->bootblocksize = htonl(4); h->align = htonl(CBFS_ENTRY_ALIGNMENT); - /* offset relative to romsize above, which covers precisely the CBFS - * region. + /* The offset and romsize fields within the master header are absolute + * values within the boot media. As such, romsize needs to relfect + * the end 'offset' for a CBFS. To achieve that the current buffer + * representing the CBFS region's size is added to the offset of + * the region within a larger image. */ - h->offset = htonl(0); + offset = buffer_get(param.image_region) - + buffer_get_original_backing(param.image_region); + size = buffer_size(param.image_region); + h->romsize = htonl(size + offset); + h->offset = htonl(offset); h->architecture = htonl(CBFS_ARCHITECTURE_UNKNOWN); header = cbfs_create_file_header(CBFS_COMPONENT_CBFSHEADER,

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New patch to review for coreboot: Revert "x86: Align CBFS on top of ROM"
by Aaron Durbin 04 Jan '16

04 Jan '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12824 -gerrit commit f8f8d3af6de09daaaacb6a13352ebe9dc464916e Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Jan 4 13:57:07 2016 -0600 Revert "x86: Align CBFS on top of ROM" This reverts commit 65e33c08a9a88c52baaadaf515b9591856115a77. This was the wrong logic to fix the master header. Change-Id: I4688034831f09ac69abfd0660c76112deabd62ec Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/mmap_boot.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/arch/x86/mmap_boot.c b/src/arch/x86/mmap_boot.c index 0c2b45d..ae35451 100644 --- a/src/arch/x86/mmap_boot.c +++ b/src/arch/x86/mmap_boot.c @@ -55,8 +55,9 @@ static int cbfs_master_header_props(struct cbfs_props *props) props->offset = header.offset; if (CONFIG_ROM_SIZE != header.romsize) - props->offset += CONFIG_ROM_SIZE - header.romsize; - props->size = CONFIG_ROM_SIZE; + props->size = CONFIG_ROM_SIZE; + else + props->size = header.romsize; props->size -= props->offset; props->size -= header.bootblocksize; props->size = ALIGN_DOWN(props->size, 64);

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New patch to review for coreboot: intel/braswell: Create C0_DISP_SUPPORT symbol in Kconfig
by Martin Roth 04 Jan '16

04 Jan '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12823 -gerrit commit 1b25906eebadd5d4571a3d22b98716347ad21cc8 Author: Martin Roth <martinroth(a)google.com> Date: Mon Jan 4 12:43:22 2016 -0700 intel/braswell: Create C0_DISP_SUPPORT symbol in Kconfig This symbol is used in the google/cyan and intel/strago mainboards but is not actually defined anywhere. Change-Id: If4854116a41f79d962d374e02bb5926e74d8422b Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/soc/intel/braswell/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 11d946a..2ffae39 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -140,4 +140,7 @@ config CHIPSET_BOOTBLOCK_INCLUDE string default "soc/intel/braswell/bootblock/timestamp.inc" +config C0_DISP_SUPPORT + def_bool n + endif

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Patch set updated for coreboot: util/crossgcc: Regenerate MPFR autotools files before build
by Timothy Pearson 04 Jan '16

04 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12816 -gerrit commit ada7fd8dd71e4a95c575364e3c8976798da721b0 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Wed Dec 30 14:52:19 2015 -0600 util/crossgcc: Regenerate MPFR autotools files before build The config.guess file included with MPFR is completely obsolete, leading to build failures on ppc64el due to the system architecture not being detected. Regenerate the files from the host system via automake before attempting to build MPFR. Change-Id: I00fc16003906e373d112c25978197ac907adccfd Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- util/crossgcc/buildgcc | 1 + 1 file changed, 1 insertion(+) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 988e3c3..fad40bf 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -367,6 +367,7 @@ build_GMP() { build_MPFR() { test $UNAME = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL" + (cd ../${MPFR_DIR}/ && CC="$CC" automake --add-missing --copy --force-missing) CC="$CC" ../${MPFR_DIR}/configure --disable-shared --prefix=$TARGETDIR \ --infodir=$TARGETDIR/info \ --with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \

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coreboot-gerrit January 2016