coreboot-gerrit September 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: kconfig: kconfig_warnings needs to be defined for all frontends
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit 9595ed47315066b8a562d52c22e62a43bbe49bc9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Wed Sep 30 12:01:18 2015 +0200 kconfig: kconfig_warnings needs to be defined for all frontends Change-Id: Iecefdd1e827e4eb8b4da573e4291850d6c47767f Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/11754 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> See http://review.coreboot.org/11754 for details. -gerrit

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New patch to review for coreboot: kconfig: kconfig_warnings needs to be defined for all frontends
by Patrick Georgi 30 Sep '15

30 Sep '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11754 -gerrit commit 643f97da8eb2c704f4f4262f426c77ee8104ddd1 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Wed Sep 30 12:01:18 2015 +0200 kconfig: kconfig_warnings needs to be defined for all frontends Change-Id: Iecefdd1e827e4eb8b4da573e4291850d6c47767f Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/kconfig/mconf.c | 2 ++ util/kconfig/nconf.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/util/kconfig/mconf.c b/util/kconfig/mconf.c index b4a0844..7e5dc76 100644 --- a/util/kconfig/mconf.c +++ b/util/kconfig/mconf.c @@ -22,6 +22,8 @@ #include "lkc.h" #include "lxdialog/dialog.h" +int kconfig_warnings = 0; + static const char mconf_readme[] = N_( "Overview\n" "--------\n" diff --git a/util/kconfig/nconf.c b/util/kconfig/nconf.c index bc845fc..f9944a6 100644 --- a/util/kconfig/nconf.c +++ b/util/kconfig/nconf.c @@ -13,6 +13,8 @@ #include "nconf.h" #include <ctype.h> +int kconfig_warnings = 0; + static const char nconf_global_help[] = N_( "Help windows\n" "------------\n"

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Patch merged into coreboot/master: amd/family14: Add k10temp thermal zone.
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit 6a4d6825acf324c02198fa73838c1eeaf4fdffc7 Author: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de> Date: Sun Jun 21 18:25:38 2015 +0200 amd/family14: Add k10temp thermal zone. The thermal sensor interface exposed in function 3 of the northbridge is a more convenient and faster way to access the processor-internal thermal sensor than using the SMBus/SB-TSI interface from the FCH, see the Family14 BKDG: "Tctl is a processor temperature control value used for processor thermal management. Tctl is accessible through SB-TSI and D18F3xA4[CurTmp]. Tctl is a temperature on its own scale aligned to the processors cooling requirements" Also on at least some of these boards the existing thermal zone is broken and always returns 40C (the default value if the SMBus read failed) because the SMBus muxing register (SmBus0Sel) is not set up correctly. Case in point: The fallback "smbus read failed" temperature is 40 C and the the logs taken from the board status repository for the Asrock E350M1 board all show: "ACPI: Thermal Zone [TZ00] (40 C)" e.g. http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1… and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1… and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1… Example lm-sensors output with this patch on the pcengines APU1, on Linux 4.1.0-rc8+ (wiht both CONFIG_ACPI_THERMAL and CONFIG_SENSORS_K10TEMP enabled): acpitz-virtual-0 Adapter: Virtual device temp1: +54.0 C (crit = +100.0 C) k10temp-pci-00c3 Adapter: PCI adapter temp1: +54.0 C (high = +70.0 C) (crit = +100.0 C, hyst = +97.0 C) Change-Id: Id9c5b783ba424246816677099ec6651814e59f21 Signed-off-by: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de> Reviewed-on: http://review.coreboot.org/10940 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10940 for details. -gerrit

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Patch merged into coreboot/master: AMD Bettong: Fix usb device in devicetree for Carrizo
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit b0c6817dbecbb7c3bb9dd7436dc15e8846abc037 Author: zbao <fishbaozi(a)gmail.com> Date: Wed Aug 26 22:29:07 2015 -0400 AMD Bettong: Fix usb device in devicetree for Carrizo Add some missing devices to device tree and header. Remove the obsolete devices. Change-Id: Ieeca06c68fe8c8eef6be4fab43193b898aebf013 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11378 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11378 for details. -gerrit

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Patch set updated for coreboot: Enable KCONFIG_STRICT mode
by Patrick Georgi 30 Sep '15

30 Sep '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10978 -gerrit commit 297da60b1c70f8a6a8afd48cd434ae4a3d747925 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jul 17 17:29:19 2015 -0700 Enable KCONFIG_STRICT mode Change-Id: I6aa77db1b12a67472302ea39d7433993a6838af6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 421e919..d6dd14f 100644 --- a/Makefile +++ b/Makefile @@ -55,6 +55,7 @@ export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd export KCONFIG_SPLITCONFIG := $(obj)/config export KCONFIG_TRISTATE := $(obj)/tristate.conf export KCONFIG_NEGATIVES := 1 +export KCONFIG_STRICT := 1 # directory containing the toplevel Makefile.inc TOPLEVEL := .

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Patch merged into coreboot/master: kconfig: Allow KCONFIG_STRICT outside of confdata.c
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit 57a31317a26ff5f55638c4f3dd8d06b8a69b78f2 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Aug 20 11:19:34 2015 -0700 kconfig: Allow KCONFIG_STRICT outside of confdata.c To catch dependency errors in symbol.c (such as the ones fixed by I51b4ee326f082c6a656a813ee5772e9c34f5c343) we need to check for global kconfig warnings before saving config files. This patch will produce errors for wrong dependencies and add catching of errors to conf, nconf and mconf. Sorry, gconf users, you will have to wait. Change-Id: Idf7ee406ce3869941af319219aea16fab826df84 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11291 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11291 for details. -gerrit

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Patch merged into coreboot/master: vboot: provide a unified flow for separate verstage
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit 588ad7b5db26a88dad36e2dbecf5a4242d8410be Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Sep 29 17:56:59 2015 -0500 vboot: provide a unified flow for separate verstage The vboot verification in a stage proper is unified replacing duplicate code in the tegra SoC code. The original verstage.c file is renamed to reflect its real purpose. The support for a single verstage flow is added to the vboot2 directory proper. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built glados. Change-Id: I14593e1fc69a1654fa27b512eb4b612395b94ce5 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11744 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11744 for details. -gerrit

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Patch merged into coreboot/master: cpu: microcode: Use microcode stored in binary format
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit 1d85700503afdb8516ee945e9e294d4a6aa1c759 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Wed Sep 9 22:38:06 2015 -0700 cpu: microcode: Use microcode stored in binary format Using a copiler to compile something that's already a binary is pretty stupid. Now that Stefan converted most microcode in blobs to a plain binary, use the binary version. Change-Id: Iecf1f0cdf7bbeb7a61f46a0cd984ba341af787ce Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/11607 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11607 for details. -gerrit

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Patch merged into coreboot/master: intel/fsp1_0: Declare microcode to be size 0 if it doesn't exist
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit b20a600ba736d8d7ed3e67a9d4e001ec044faee2 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Wed Sep 30 08:24:01 2015 +0200 intel/fsp1_0: Declare microcode to be size 0 if it doesn't exist Change-Id: Id2063fb29226dcb55fe84f680b7b9cb10313ef2b Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/11753 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> See http://review.coreboot.org/11753 for details. -gerrit

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Patch merged into coreboot/master: x86: prepare cache-as-ram to allow multiple stages
by gerrit＠coreboot.org 30 Sep '15

30 Sep '15

the following patch was just integrated into master: commit dd6fa93dedc402cae65a333f5dff3d3c1a12f0c6 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Sep 24 12:18:07 2015 -0500 x86: prepare cache-as-ram to allow multiple stages In order to do a verification of romstage on x86 one needs to run verstage which verifies romstage (and the memory init code). However, x86 doesn't have SRAM like every other modern SoC so managing the cache-as-ram region is especially critical. First move all of the "shared" objects to the beginning of the .car.data section. This change then ensures that each stage using car.ld to link has the same consistent view of the addresses of these fixed-sized objects in cache-as-ram. The CAR_GLOBALs can be unique per stage. However, these variables are expected to have a value of zero at the start of each stage. In order to allow a stage to provide those semantics outside of the initial cache-as-arm setup routine add _car_global_start and _car_global_end symbols. Those symbols can be used to clear the CAR_GLOBALs for that stage. Note that the timestamp region can't be moved out similarly to the pre-ram cbmem console because the object storage of the timestamp cache is used *after* cache-as-ram is torn down to indicate if the cache should be used or not. Therefore, that timestamp needs to migrated to ram. A logic change in src/lib/timestamp.c could alleviate this requirement, but that task wasn't tackled in this patch. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted glados. Change-Id: I15e9f6b0c632ee5a2369da0709535d6cb0d94f61 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11740 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11740 for details. -gerrit

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coreboot-gerrit September 2015