coreboot-gerrit August 2015

coreboot-gerrit@coreboot.org

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814 discussions

New patch to review for coreboot: libpayload: Missing headers fixup
by Paul Kocialkowski 03 Aug '15

03 Aug '15

Paul Kocialkowski (contact(a)paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11114 -gerrit commit a8a4962635c0315ba86c78dda454548238208c96 Author: Paul Kocialkowski <contact(a)paulk.fr> Date: Mon Aug 3 14:10:17 2015 +0200 libpayload: Missing headers fixup Some Kconfig headers and libpayload config includes were missing, resulting in undeclared macros when building an external payload. Change-Id: I3b55928babba2896a112f8c5fae46365cf71d308 Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- payloads/libpayload/include/endian.h | 1 + payloads/libpayload/include/stdlib.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/payloads/libpayload/include/endian.h b/payloads/libpayload/include/endian.h index 2655634..11001ff 100644 --- a/payloads/libpayload/include/endian.h +++ b/payloads/libpayload/include/endian.h @@ -33,6 +33,7 @@ #include <arch/io.h> #include <arch/types.h> #include <libpayload-config.h> +#include <kconfig.h> static inline uint16_t swap_bytes16(uint16_t in) { diff --git a/payloads/libpayload/include/stdlib.h b/payloads/libpayload/include/stdlib.h index 689bf01..23f412d 100644 --- a/payloads/libpayload/include/stdlib.h +++ b/payloads/libpayload/include/stdlib.h @@ -34,6 +34,8 @@ #include <die.h> #include <stddef.h> #include <string.h> +#include <libpayload-config.h> +#include <kconfig.h> #define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1UL) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))

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New patch to review for coreboot: libpayload: lpgcc: CFLAGS and CMDLINE order inversion
by Paul Kocialkowski 03 Aug '15

03 Aug '15

Paul Kocialkowski (contact(a)paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11113 -gerrit commit 06ebd55af8cff0aafd388ae7d771d7f193d28de4 Author: Paul Kocialkowski <contact(a)paulk.fr> Date: Mon Aug 3 14:08:40 2015 +0200 libpayload: lpgcc: CFLAGS and CMDLINE order inversion When building an external payload with lpgcc, the provided cmdline needs to be included before libpayload-specific CFLAGS so that the include priority is the payload first. This way, a payload using e.g. Kconfig that declares a config.h will have its config.h included first, instead of libpayload's config.h. Change-Id: I19b8012623e04c92a427d74904aed7f3bf5f0996 Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- payloads/libpayload/bin/lpgcc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc index 1dbd716..9346639 100755 --- a/payloads/libpayload/bin/lpgcc +++ b/payloads/libpayload/bin/lpgcc @@ -165,10 +165,10 @@ _LDFLAGS="-L$BASE/../lib -L$_LIBDIR $_LDSCRIPT -static" if [ $DOLINK -eq 0 ]; then if [ $DEBUGME -eq 1 ]; then - echo "$DEFAULT_CC $_CFLAGS $CMDLINE" + echo "$DEFAULT_CC $CMDLINE $_CFLAGS" fi - $DEFAULT_CC $_CFLAGS $CMDLINE + $DEFAULT_CC $CMDLINE $_CFLAGS else if [ -z "${CONFIG_LP_ARCH_MIPS}" ]; then _LIBGCC=`$DEFAULT_CC $_ARCHEXTRA -print-libgcc-file-name` @@ -182,7 +182,7 @@ else exit 1 fi if [ $DEBUGME -eq 1 ]; then - echo "$DEFAULT_CC $_CFLAGS $_LDFLAGS $HEAD_O $CMDLINE -lpayload $_LIBGCC" + echo "$DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC" fi # Note: $_ARCHLIBDIR/head.o must be the first object being linked, because it @@ -190,5 +190,5 @@ else # header to be placed below 0x2000 in the resulting image. See: # http://www.gnu.org/software/grub/manual/multiboot/html_node/OS-image-format… - $DEFAULT_CC $_CFLAGS $_LDFLAGS $HEAD_O $CMDLINE -lpayload $_LIBGCC + $DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC fi

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New patch to review for coreboot: libpayload: Allow for KBUILD_DEFCONFIG override
by Paul Kocialkowski 03 Aug '15

03 Aug '15

Paul Kocialkowski (contact(a)paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11112 -gerrit commit 6907856a76a0f31502e12d540428c920bc9762e4 Author: Paul Kocialkowski <contact(a)paulk.fr> Date: Mon Aug 3 14:05:33 2015 +0200 libpayload: Allow for KBUILD_DEFCONFIG override In order to specify a defconfig to libpayload, one might want to declare KBUILD_DEFCONFIG in the make command line and run the defconfig target. Change-Id: I2ade6f4ff2f0b6478a0831158028ebc79b5daa81 Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- payloads/libpayload/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile index f3544d4..206785c 100644 --- a/payloads/libpayload/Makefile +++ b/payloads/libpayload/Makefile @@ -54,7 +54,7 @@ export CONFIG_ := CONFIG_LP_ TOPLEVEL := . CONFIG_LP_SHELL := sh -KBUILD_DEFCONFIG := configs/defconfig +KBUILD_DEFCONFIG ?= configs/defconfig UNAME_RELEASE := $(shell uname -r) DOTCONFIG ?= .config KCONFIG_CONFIG = $(DOTCONFIG)

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Patch set updated for coreboot: DO NOT SUBMIT: run 64 bit builds on all x86 boards
by Stefan Reinauer 02 Aug '15

02 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11111 -gerrit commit e8923e3b5bf24777c260e5ce47674a18ac61a041 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Sat Aug 1 14:40:01 2015 -0700 DO NOT SUBMIT: run 64 bit builds on all x86 boards Change-Id: Ia3f30ead6bd4a70967de0dd66544cf301b7b592a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/arch/x86/Kconfig | 2 +- src/cpu/amd/model_10xxx/Kconfig | 12 ++++++++---- src/cpu/amd/model_fxx/Kconfig | 12 ++++++++---- src/mainboard/packardbell/ms2290/Kconfig | 11 ++++++++--- 4 files changed, 25 insertions(+), 12 deletions(-) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8905266..7b579ee 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -142,4 +142,4 @@ config COMPILE_IN_DSDT config BOARD_HAS_64BIT bool "Compile 64bit coreboot" depends on ARCH_X86 - default n + default y diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index ebd282a..659ad82 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,9 +1,13 @@ config CPU_AMD_MODEL_10XXX bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 + select ARCH_BOOTBLOCK_X86_64 if BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_BOOTBLOCK_X86_32 if !BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_32 if !BOARD_HAS_64BIT select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 1172d29..738caa3 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,9 +1,13 @@ config CPU_AMD_MODEL_FXX bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 + select ARCH_BOOTBLOCK_X86_64 if BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_BOOTBLOCK_X86_32 if !BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_32 if !BOARD_HAS_64BIT select MMX select SSE select SSE2 diff --git a/src/mainboard/packardbell/ms2290/Kconfig b/src/mainboard/packardbell/ms2290/Kconfig index 3ea302a..480dc3c 100644 --- a/src/mainboard/packardbell/ms2290/Kconfig +++ b/src/mainboard/packardbell/ms2290/Kconfig @@ -3,9 +3,14 @@ if BOARD_PACKARDBELL_MS2290 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select SYSTEM_TYPE_LAPTOP - select ARCH_BOOTBLOCK_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 + select ARCH_BOOTBLOCK_X86_64 if BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_BOOTBLOCK_X86_32 if !BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_32 if !BOARD_HAS_64BIT select NORTHBRIDGE_INTEL_NEHALEM select SOUTHBRIDGE_INTEL_IBEXPEAK select HAVE_OPTION_TABLE

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New patch to review for coreboot: DO NOT SUBMIT: run 64 bit builds on all x86 boards
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11111 -gerrit commit 4ba5263a3c14f0dbc34c31d11735a793302d9c23 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Sat Aug 1 14:40:01 2015 -0700 DO NOT SUBMIT: run 64 bit builds on all x86 boards Change-Id: Ia3f30ead6bd4a70967de0dd66544cf301b7b592a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/arch/x86/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8905266..7b579ee 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -142,4 +142,4 @@ config COMPILE_IN_DSDT config BOARD_HAS_64BIT bool "Compile 64bit coreboot" depends on ARCH_X86 - default n + default y

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Patch set updated for coreboot: Do not commit: Enable KCONFIG_STRICT mode.
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10978 -gerrit commit fec72b2492d3e21c19daa959dae3caf1df169b0e Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jul 17 17:29:19 2015 -0700 Do not commit: Enable KCONFIG_STRICT mode. Change-Id: I6aa77db1b12a67472302ea39d7433993a6838af6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 421e919..d6dd14f 100644 --- a/Makefile +++ b/Makefile @@ -55,6 +55,7 @@ export KCONFIG_DEPENDENCIES := $(obj)/auto.conf.cmd export KCONFIG_SPLITCONFIG := $(obj)/config export KCONFIG_TRISTATE := $(obj)/tristate.conf export KCONFIG_NEGATIVES := 1 +export KCONFIG_STRICT := 1 # directory containing the toplevel Makefile.inc TOPLEVEL := .

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Patch set updated for coreboot: Kconfig: Add KCONFIG_STRICT mode
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10977 -gerrit commit 2eb143b1936dc693b1b46704192b9c242447d8a0 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jul 17 17:26:48 2015 -0700 Kconfig: Add KCONFIG_STRICT mode This is basically a -Werror mode for Kconfig. When exporting KCONFIG_STRICT in the Makefile, warnings in Kconfig will produce errors instead. This will make it easier to spot unclean Kconfig files, settings and dependencies. Change-Id: I941af24c3ccb10b8b9ddc5c98327154749ebbbc6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- util/kconfig/confdata.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/util/kconfig/confdata.c b/util/kconfig/confdata.c index 235debf..5804b29 100644 --- a/util/kconfig/confdata.c +++ b/util/kconfig/confdata.c @@ -358,6 +358,7 @@ load: if (def == S_DEF_USER) { sym = sym_find(line + strlen(CONFIG_)); if (!sym) { + conf_warning("trying to assign non-existent symbol %s", line + strlen(CONFIG_)); sym_add_change_count(1); goto setsym; } @@ -402,6 +403,13 @@ setsym: if (modules_sym) sym_calc_value(modules_sym); + + name = getenv("KCONFIG_STRICT"); + if (name && *name && conf_warnings) { + fprintf(stderr, "\nERROR: %d warnings encountered, and warnings are errors.\n\n", conf_warnings); + return 1; + } + return 0; }

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New patch to review for coreboot: Only apply libgcc workaround on x86-32
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11110 -gerrit commit 986a0a3dc260cce841e1b2eb43d046c4cd790124 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 31 17:56:03 2015 -0700 Only apply libgcc workaround on x86-32 This should probably be moved out of lib and to arch/x86, since it does not even apply on x86-64, and ARM has its own copy of libgcc. Change-Id: I4fca1323927f8d37128472ed60d059f7a459fc71 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/lib/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index bda7586..8597667 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -94,6 +94,7 @@ romstage-y += compute_ip_checksum.c ifeq ($(CONFIG_COMPILER_GCC),y) romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c +smm-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c endif romstage-$(CONFIG_GENERIC_UDELAY) += timer.c @@ -166,7 +167,6 @@ smm-y += region.c smm-y += boot_device.c smm-y += fmap.c smm-y += cbfs.c memcmp.c -smm-$(CONFIG_COMPILER_GCC) += gcc.c bootblock-y += version.c romstage-y += version.c

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Patch set updated for coreboot: Hack up per-board user selectable 64bit scheme
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11109 -gerrit commit 39f5d780d168d48ebb07462f41a28ad8317adefa Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 31 16:57:40 2015 -0700 Hack up per-board user selectable 64bit scheme Change-Id: I91b1316896e69b081c861d99ff0c04be3c1d90c1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/arch/x86/Kconfig | 5 +++++ src/cpu/amd/agesa/Kconfig | 12 ++++++++---- src/mainboard/asrock/e350m1/Kconfig | 1 + 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 88b2592..8905266 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -138,3 +138,8 @@ config ID_SECTION_OFFSET config COMPILE_IN_DSDT bool "compile in DSDT and use that over DSDT in CBFS" default n + +config BOARD_HAS_64BIT + bool "Compile 64bit coreboot" + depends on ARCH_X86 + default n diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 45e1d63..e3fee59 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -27,10 +27,14 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_RL default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_BOOTBLOCK_X86_64 - select ARCH_VERSTAGE_X86_64 - select ARCH_ROMSTAGE_X86_64 - select ARCH_RAMSTAGE_X86_64 + select ARCH_BOOTBLOCK_X86_64 if BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_64 if BOARD_HAS_64BIT + select ARCH_BOOTBLOCK_X86_32 if !BOARD_HAS_64BIT + select ARCH_VERSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_ROMSTAGE_X86_32 if !BOARD_HAS_64BIT + select ARCH_RAMSTAGE_X86_32 if !BOARD_HAS_64BIT select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index ff3e8f4..a2d0a5a 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -32,6 +32,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_4096 select GFXUMA + select BOARD_HAS_64BIT config MAINBOARD_DIR string

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Patch set updated for coreboot: Drop unused code from gcc-intrin.h
by Stefan Reinauer 01 Aug '15

01 Aug '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11108 -gerrit commit 4d03db675710b1d6c66f29f6bb8e5f7041291cc2 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 31 16:44:55 2015 -0700 Drop unused code from gcc-intrin.h Change-Id: I3df66320d0bc18221f947b47e7f09533daafabad Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/vendorcode/amd/agesa/f14/Include/gcc-intrin.h | 36 ----------------------- 1 file changed, 36 deletions(-) diff --git a/src/vendorcode/amd/agesa/f14/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f14/Include/gcc-intrin.h index 9ae45c3..5d77c4d 100644 --- a/src/vendorcode/amd/agesa/f14/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/f14/Include/gcc-intrin.h @@ -612,40 +612,4 @@ static __inline __attribute__(( __always_inline__)) void _mm_sfence (void) } #endif /* __SSE3__ */ -static __inline__ __attribute__((always_inline)) void __stosb(unsigned char *dest, unsigned char data, size_t count) -{ - __asm__ __volatile__ ( - "rep ; stosb " - : "+D" (dest), "+c" (count) - : "a"(data) - ); -} - -static __inline__ __attribute__((always_inline)) void __movsb(unsigned char *dest, unsigned char *data, size_t count) -{ - __asm__ __volatile__ ( - "movsb " - : "+D" (dest), "+S"(data), "+c" (count) - ); -} - -static __inline__ __attribute__((always_inline)) -void debug_point ( unsigned short Port, unsigned long Data ) -{ - __outdword (Port, Data); - __asm__ __volatile__ (".word 0xfeeb"); - -} - -static __inline__ __attribute__((always_inline)) -void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayTime ) -{ - UINTN Index; - Index = 0; - __outdword (Port, Data); - while (Index < delayTime * 600000) { - __outdword (0xE0, 0); - Index ++; - } -} #endif /* defined (__GNUC__) */

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coreboot-gerrit August 2015