coreboot-gerrit August 2015

coreboot-gerrit@coreboot.org

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814 discussions

New patch to review for coreboot: cpu/Kconfig: Make SMP symbol accessable to non-x86 platforms
by Martin Roth 25 Aug '15

25 Aug '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11339 -gerrit commit 4b5910eb461c00c35950a5f9ed4316ef6b788ccb Author: Martin Roth <martinroth(a)google.com> Date: Tue Aug 25 09:47:37 2015 -0600 cpu/Kconfig: Make SMP symbol accessable to non-x86 platforms CONFIG_SMP is used in arm64 as well as x86. Keep default for non-x86 platforms as N unless selected. Change-Id: Id8ac1cf3bb8efb79517fdf668538abecd47b7dd2 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/cpu/Kconfig | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index bfe00fe..d8ed0dc 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -4,6 +4,14 @@ source "src/cpu/*/Kconfig" +config SMP + bool + default y if ARCH_X86 && MAX_CPUS != 1 + default n + help + This option is used to enable certain functions to make coreboot + work correctly on symmetric multi processor (SMP) systems. + if ARCH_X86 config CACHE_AS_RAM @@ -25,14 +33,6 @@ config DCACHE_BSP_STACK_SLUSH config DCACHE_AP_STACK_SIZE hex -config SMP - bool - default y if MAX_CPUS != 1 - default n - help - This option is used to enable certain functions to make coreboot - work correctly on symmetric multi processor (SMP) systems. - config AP_SIPI_VECTOR hex default 0xfffff000

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New patch to review for coreboot: Remove dependency for HAS_PRECBMEM_TIMESTAMP_REGION
by Martin Roth 25 Aug '15

25 Aug '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11338 -gerrit commit b4be267f23121340ffed769b5ac04352e0cdeb2e Author: Martin Roth <martinroth(a)google.com> Date: Mon Aug 24 16:42:31 2015 -0600 Remove dependency for HAS_PRECBMEM_TIMESTAMP_REGION HAS_PRECBMEM_TIMESTAMP_REGION was dependent on COLLECT_TIMESTAMPS, but should be allowed to be selected independently. My thought is that the code may only be used when collecting timestamps, the HAS prefix signifies that this is a platform configuration option. This fix could also be done by adding 'if COLLECT_TIMESTAMPS' everywhere that 'select HAS_PRECBMEM_TIMESTAMP_REGION' is used Change-Id: Iaf4895475c38a855a048dc9b82d4c97e5e3f4e5c Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/src/Kconfig b/src/Kconfig index 9c01687..5227bcd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -203,7 +203,6 @@ config COLLECT_TIMESTAMPS config HAS_PRECBMEM_TIMESTAMP_REGION bool "Timestamp region exists for pre-cbmem timestamps" default y if ARCH_ROMSTAGE_X86_32 && CACHE_AS_RAM - depends on COLLECT_TIMESTAMPS help A separate region is maintained to allow storing of timestamps before cbmem comes up. This is useful for storing timestamps across different

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New patch to review for coreboot: Chromeos: Remove Kconfig workaround for VIRTUAL_DEV_SWITCH warnings
by Martin Roth 25 Aug '15

25 Aug '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11337 -gerrit commit 7e7e1a9997a73f2380b67191a0330cf6385dbe1b Author: Martin Roth <martinroth(a)google.com> Date: Mon Aug 24 16:12:47 2015 -0600 Chromeos: Remove Kconfig workaround for VIRTUAL_DEV_SWITCH warnings With VIRTUAL_DEV_SWITCH moved under 'config CHROMEOS' in all of the mainboards, this is no longer needed. Change-Id: I5fbea17969f6b0c3b8a5dcd519ab9d36eb2ad6f1 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/vendorcode/google/chromeos/Kconfig | 8 -------- 1 file changed, 8 deletions(-) diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 2f04f24..8309d19 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -166,12 +166,4 @@ config WIPEOUT_SUPPORTED source src/vendorcode/google/chromeos/vboot2/Kconfig endif # CHROMEOS -if !CHROMEOS -config VIRTUAL_DEV_SWITCH - bool - default n - depends on MAINBOARD_HAS_CHROMEOS - help - Whether this platform has a virtual developer switch. -endif endmenu

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New patch to review for coreboot: ChromeOS mainboards: Move more Kconfig symbols under CHROMEOS
by Martin Roth 25 Aug '15

25 Aug '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11336 -gerrit commit a01b698073af1a283777dd1d6b6d83a22a9cd6b9 Author: Martin Roth <martinroth(a)google.com> Date: Mon Aug 24 15:55:29 2015 -0600 ChromeOS mainboards: Move more Kconfig symbols under CHROMEOS Move the CHROMEOS dependent symbols VIRTUAL_DEV_SWITCH and VBOOT_DYNAMIC_WORK_BUFFER under the CHROMEOS config options for the mainboards that use them. Change-Id: Iad126cf045cb3a312319037aff3c4b1f15f6529d Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/google/auron/Kconfig | 2 +- src/mainboard/google/bolt/Kconfig | 2 +- src/mainboard/google/cyan/Kconfig | 4 ++-- src/mainboard/google/falco/Kconfig | 2 +- src/mainboard/google/foster/Kconfig | 2 +- src/mainboard/google/glados/Kconfig | 2 +- src/mainboard/google/jecht/Kconfig | 2 +- src/mainboard/google/nyan/Kconfig | 2 +- src/mainboard/google/nyan_big/Kconfig | 2 +- src/mainboard/google/nyan_blaze/Kconfig | 2 +- src/mainboard/google/panther/Kconfig | 2 +- src/mainboard/google/peppy/Kconfig | 2 +- src/mainboard/google/rambi/Kconfig | 2 +- src/mainboard/google/rush/Kconfig | 2 +- src/mainboard/google/rush_ryu/Kconfig | 2 +- src/mainboard/google/samus/Kconfig | 2 +- src/mainboard/google/slippy/Kconfig | 2 +- src/mainboard/google/smaug/Kconfig | 2 +- src/mainboard/google/storm/Kconfig | 2 +- src/mainboard/google/veyron_brain/Kconfig | 2 +- src/mainboard/google/veyron_jerry/Kconfig | 2 +- src/mainboard/google/veyron_mickey/Kconfig | 2 +- src/mainboard/google/veyron_mighty/Kconfig | 2 +- src/mainboard/google/veyron_minnie/Kconfig | 2 +- src/mainboard/google/veyron_pinky/Kconfig | 2 +- src/mainboard/google/veyron_rialto/Kconfig | 2 +- src/mainboard/google/veyron_romy/Kconfig | 2 +- src/mainboard/google/veyron_shark/Kconfig | 2 +- src/mainboard/google/veyron_speedy/Kconfig | 2 +- src/mainboard/intel/kunimitsu/Kconfig | 2 +- src/mainboard/intel/sklrvp/Kconfig | 4 ++-- src/mainboard/intel/strago/Kconfig | 5 ++--- 32 files changed, 35 insertions(+), 36 deletions(-) diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig index 7ad3eaa..c5a4ef4 100644 --- a/src/mainboard/google/auron/Kconfig +++ b/src/mainboard/google/auron/Kconfig @@ -5,7 +5,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -20,6 +19,7 @@ config CHROMEOS select LID_SWITCH select CHROMEOS_RAMOOPS_DYNAMIC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config VBOOT_RAMSTAGE_INDEX hex diff --git a/src/mainboard/google/bolt/Kconfig b/src/mainboard/google/bolt/Kconfig index 0599d15..f11b79a 100644 --- a/src/mainboard/google/bolt/Kconfig +++ b/src/mainboard/google/bolt/Kconfig @@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_LYNXPOINT_LP select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -22,6 +21,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select LID_SWITCH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig index 5bb0e4e..f3bb851 100644 --- a/src/mainboard/google/cyan/Kconfig +++ b/src/mainboard/google/cyan/Kconfig @@ -14,14 +14,14 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select SOC_INTEL_BRASWELL - select VBOOT_DYNAMIC_WORK_BUFFER - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_RESUME config CHROMEOS select LID_SWITCH select CHROMEOS_VBNV_CMOS select EC_SOFTWARE_SYNC + select VBOOT_DYNAMIC_WORK_BUFFER + select VIRTUAL_DEV_SWITCH config DISPLAY_SPD_DATA bool "Display Memory Serial Presence Detect Data" diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig index cbcd57d..203efbe 100644 --- a/src/mainboard/google/falco/Kconfig +++ b/src/mainboard/google/falco/Kconfig @@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_LYNXPOINT_LP select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -25,6 +24,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select LID_SWITCH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/foster/Kconfig b/src/mainboard/google/foster/Kconfig index 373cb07..86c6d73 100644 --- a/src/mainboard/google/foster/Kconfig +++ b/src/mainboard/google/foster/Kconfig @@ -26,13 +26,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SOC_NVIDIA_TEGRA210 select MAINBOARD_HAS_CHROMEOS - select VIRTUAL_DEV_SWITCH select BOOTROM_SDRAM_INIT # use BootRom to config sdram select COMMON_CBFS_SPI_WRAPPER select SPI_FLASH_WINBOND config CHROMEOS select CHROMEOS_VBNV_FLASH + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 767b513..1f8a130 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -17,7 +17,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_RAMOOPS_DYNAMIC @@ -25,6 +24,7 @@ config CHROMEOS select EC_SOFTWARE_SYNC select LID_SWITCH select VBOOT_OPROM_MATTERS + select VIRTUAL_DEV_SWITCH config IRQ_SLOT_COUNT int diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig index 90e9cea..6fe7360 100644 --- a/src/mainboard/google/jecht/Kconfig +++ b/src/mainboard/google/jecht/Kconfig @@ -5,7 +5,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select SUPERIO_ITE_IT8772F - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -19,6 +18,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select PHYSICAL_REC_SWITCH select CHROMEOS_RAMOOPS_DYNAMIC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig index ce491e5..5f4ad81 100644 --- a/src/mainboard/google/nyan/Kconfig +++ b/src/mainboard/google/nyan/Kconfig @@ -31,11 +31,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select SPI_FLASH select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig index 6d7982f..cd744ca 100644 --- a/src/mainboard/google/nyan_big/Kconfig +++ b/src/mainboard/google/nyan_big/Kconfig @@ -32,11 +32,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select SPI_FLASH select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - select VIRTUAL_DEV_SWITCH config CHROMEOS select EC_SOFTWARE_SYNC select CHROMEOS_VBNV_EC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig index e6e240d..94e7172 100644 --- a/src/mainboard/google/nyan_blaze/Kconfig +++ b/src/mainboard/google/nyan_blaze/Kconfig @@ -33,11 +33,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select SPI_FLASH select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B - select VIRTUAL_DEV_SWITCH config CHROMEOS select EC_SOFTWARE_SYNC select CHROMEOS_VBNV_EC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/panther/Kconfig b/src/mainboard/google/panther/Kconfig index 85bc1ff..b247081 100644 --- a/src/mainboard/google/panther/Kconfig +++ b/src/mainboard/google/panther/Kconfig @@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_LYNXPOINT_LP select BOARD_ROMSIZE_KB_8192 select SUPERIO_ITE_IT8772F - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -21,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy config CHROMEOS select PHYSICAL_REC_SWITCH select CHROMEOS_VBNV_CMOS + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/peppy/Kconfig b/src/mainboard/google/peppy/Kconfig index 66203ce..428d293 100644 --- a/src/mainboard/google/peppy/Kconfig +++ b/src/mainboard/google/peppy/Kconfig @@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_LYNXPOINT_LP select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -27,6 +26,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select LID_SWITCH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/rambi/Kconfig b/src/mainboard/google/rambi/Kconfig index 9459675..1ad2d6d 100644 --- a/src/mainboard/google/rambi/Kconfig +++ b/src/mainboard/google/rambi/Kconfig @@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_INTEL_BAYTRAIL select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select ENABLE_BUILTIN_COM1 select BOARD_ROMSIZE_KB_8192 select HAVE_ACPI_TABLES @@ -19,6 +18,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select LID_SWITCH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig index 5bc958e..d8b38d1 100644 --- a/src/mainboard/google/rush/Kconfig +++ b/src/mainboard/google/rush/Kconfig @@ -30,13 +30,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_NVIDIA_TEGRA132 select MAINBOARD_DO_SOR_INIT select MAINBOARD_HAS_CHROMEOS - select VIRTUAL_DEV_SWITCH select BOARD_ROMSIZE_KB_4096 select ARM64_USE_SPINTABLE config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig index a2740b5..5965abe 100644 --- a/src/mainboard/google/rush_ryu/Kconfig +++ b/src/mainboard/google/rush_ryu/Kconfig @@ -32,12 +32,12 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_DO_DSI_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_8192 - select VIRTUAL_DEV_SWITCH select ARM64_USE_SPINTABLE config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/samus/Kconfig b/src/mainboard/google/samus/Kconfig index e45b22f..3059b4b 100644 --- a/src/mainboard/google/samus/Kconfig +++ b/src/mainboard/google/samus/Kconfig @@ -5,7 +5,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -22,6 +21,7 @@ config CHROMEOS select VBOOT_EC_SLOW_UPDATE select VBOOT_OPROM_MATTERS select CHROMEOS_RAMOOPS_DYNAMIC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig index 8f9f518..2c9c10a 100644 --- a/src/mainboard/google/slippy/Kconfig +++ b/src/mainboard/google/slippy/Kconfig @@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_LYNXPOINT_LP select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC - select VIRTUAL_DEV_SWITCH select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME @@ -24,6 +23,7 @@ config CHROMEOS select CHROMEOS_VBNV_CMOS select LID_SWITCH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig index bdb7e66..6ccf5b1 100644 --- a/src/mainboard/google/smaug/Kconfig +++ b/src/mainboard/google/smaug/Kconfig @@ -34,12 +34,12 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_NVIDIA_TEGRA210 select MAINBOARD_DO_DSI_INIT select MAINBOARD_HAS_CHROMEOS - select VIRTUAL_DEV_SWITCH select RAM_CODE_SUPPORT config CHROMEOS select CHROMEOS_VBNV_FLASH select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig index 404ab4d..a86752f 100644 --- a/src/mainboard/google/storm/Kconfig +++ b/src/mainboard/google/storm/Kconfig @@ -31,13 +31,13 @@ config BOARD_SPECIFIC_OPTIONS select SPI_FLASH select SPI_FLASH_SPANSION select SPI_FLASH_STMICRO - select VIRTUAL_DEV_SWITCH select DRIVERS_UART select CONSOLE_CBMEM_DUMP_TO_UART config CHROMEOS select VBOOT_DISABLE_DEV_ON_RECOVERY select WIPEOUT_SUPPORTED + select VIRTUAL_DEV_SWITCH config BOARD_VARIANT_AP148 bool "pick this to build an image for ap148" diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig index bfa9184..f96e92c 100644 --- a/src/mainboard/google/veyron_brain/Kconfig +++ b/src/mainboard/google/veyron_brain/Kconfig @@ -33,11 +33,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_FLASH select PHYSICAL_REC_SWITCH + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig index 5ce5497..1bbcf94 100644 --- a/src/mainboard/google/veyron_jerry/Kconfig +++ b/src/mainboard/google/veyron_jerry/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig index ee48276..bbe5f7d 100644 --- a/src/mainboard/google/veyron_mickey/Kconfig +++ b/src/mainboard/google/veyron_mickey/Kconfig @@ -33,11 +33,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_FLASH select PHYSICAL_REC_SWITCH + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig index cad5dcb..4dad49c 100644 --- a/src/mainboard/google/veyron_mighty/Kconfig +++ b/src/mainboard/google/veyron_mighty/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_minnie/Kconfig b/src/mainboard/google/veyron_minnie/Kconfig index b93386b..f2cd87b 100644 --- a/src/mainboard/google/veyron_minnie/Kconfig +++ b/src/mainboard/google/veyron_minnie/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig index 675382b..5c6e7cd 100644 --- a/src/mainboard/google/veyron_pinky/Kconfig +++ b/src/mainboard/google/veyron_pinky/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index dcbb5e5..0c72667 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -33,11 +33,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_FLASH select PHYSICAL_REC_SWITCH + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_romy/Kconfig b/src/mainboard/google/veyron_romy/Kconfig index 2eb5ae5..9cb6d89 100644 --- a/src/mainboard/google/veyron_romy/Kconfig +++ b/src/mainboard/google/veyron_romy/Kconfig @@ -33,11 +33,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_FLASH select PHYSICAL_REC_SWITCH + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_shark/Kconfig b/src/mainboard/google/veyron_shark/Kconfig index c726e56..829fb85 100644 --- a/src/mainboard/google/veyron_shark/Kconfig +++ b/src/mainboard/google/veyron_shark/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig index a7d36b6..411ea42 100644 --- a/src/mainboard/google/veyron_speedy/Kconfig +++ b/src/mainboard/google/veyron_speedy/Kconfig @@ -35,11 +35,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_VBNV_EC select EC_SOFTWARE_SYNC + select VIRTUAL_DEV_SWITCH config MAINBOARD_DIR string diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig index 4cdb272..bc8ab3e 100644 --- a/src/mainboard/intel/kunimitsu/Kconfig +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -17,13 +17,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MMCONF_SUPPORT select MONOTONIC_TIMER_MSR select SOC_INTEL_SKYLAKE - select VIRTUAL_DEV_SWITCH config CHROMEOS select CHROMEOS_RAMOOPS_DYNAMIC select CHROMEOS_VBNV_CMOS select LID_SWITCH select VBOOT_OPROM_MATTERS + select VIRTUAL_DEV_SWITCH config IRQ_SLOT_COUNT int diff --git a/src/mainboard/intel/sklrvp/Kconfig b/src/mainboard/intel/sklrvp/Kconfig index b69600d..4fd181f 100644 --- a/src/mainboard/intel/sklrvp/Kconfig +++ b/src/mainboard/intel/sklrvp/Kconfig @@ -14,13 +14,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MONOTONIC_TIMER_MSR select PCIEXP_L1_SUB_STATE select SOC_INTEL_SKYLAKE - select VBOOT_DYNAMIC_WORK_BUFFER - select VIRTUAL_DEV_SWITCH config CHROMEOS select LID_SWITCH select CHROMEOS_RAMOOPS_DYNAMIC select CHROMEOS_VBNV_CMOS + select VBOOT_DYNAMIC_WORK_BUFFER + select VIRTUAL_DEV_SWITCH config IRQ_SLOT_COUNT int diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig index 0a59e9b..1d4d4d8 100755 --- a/src/mainboard/intel/strago/Kconfig +++ b/src/mainboard/intel/strago/Kconfig @@ -15,14 +15,13 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select SOC_INTEL_BRASWELL - select VBOOT_DYNAMIC_WORK_BUFFER - select VIRTUAL_DEV_SWITCH config CHROMEOS select LID_SWITCH select CHROMEOS_VBNV_CMOS select EC_SOFTWARE_SYNC - + select VBOOT_DYNAMIC_WORK_BUFFER + select VIRTUAL_DEV_SWITCH config DISPLAY_SPD_DATA bool "Display Memory Serial Presence Detect Data"

1 0

Patch set updated for coreboot: Google Kconfig: Add MAINBOARD_HAS_NATIVE_VGA_INIT in good places
by Martin Roth 25 Aug '15

25 Aug '15

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11301 -gerrit commit 1273dc3711f28bb67d2f4c62bcb62df3a9c5d6cb Author: Martin Roth <martinroth(a)google.com> Date: Fri Aug 21 14:37:02 2015 -0600 Google Kconfig: Add MAINBOARD_HAS_NATIVE_VGA_INIT in good places Add 'select MAINBOARD_HAS_NATIVE_VGA_INIT' which is just used as a gate symbol to display MAINBOARD_DO_NATIVE_VGA_INIT to the mainboards that are already selecting MAINBOARD_DO_NATIVE_VGA_INIT. Since MAINBOARD_HAS_NATIVE_VGA_INIT is not used in any code, this should not have any other effects. This fixes the warning: warning: (BOARD_SPECIFIC_OPTIONS) selects MAINBOARD_DO_NATIVE_VGA_INIT which has unmet direct dependencies (VENDOR_ASUS && BOARD_ASUS_KFSN4_DRE || MAINBOARD_HAS_NATIVE_VGA_INIT) Change-Id: I8ceee69ebae90dc32f55df58c2e80fe25397f049 Signed-off-by: Martin Roth <martinroth(a)google.com> --- src/mainboard/google/nyan/Kconfig | 1 + src/mainboard/google/nyan_big/Kconfig | 1 + src/mainboard/google/nyan_blaze/Kconfig | 1 + src/mainboard/google/rush/Kconfig | 1 + src/mainboard/google/rush_ryu/Kconfig | 1 + src/mainboard/google/smaug/Kconfig | 1 + src/mainboard/google/veyron_brain/Kconfig | 1 + src/mainboard/google/veyron_danger/Kconfig | 1 + src/mainboard/google/veyron_jerry/Kconfig | 1 + src/mainboard/google/veyron_mickey/Kconfig | 1 + src/mainboard/google/veyron_mighty/Kconfig | 1 + src/mainboard/google/veyron_minnie/Kconfig | 1 + src/mainboard/google/veyron_pinky/Kconfig | 1 + src/mainboard/google/veyron_rialto/Kconfig | 1 + src/mainboard/google/veyron_romy/Kconfig | 1 + src/mainboard/google/veyron_shark/Kconfig | 1 + src/mainboard/google/veyron_speedy/Kconfig | 1 + 17 files changed, 17 insertions(+) diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig index bd390e4..ce491e5 100644 --- a/src/mainboard/google/nyan/Kconfig +++ b/src/mainboard/google/nyan/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_SPI select TEGRA124_MODEL_CD570M + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select BOARD_ROMSIZE_KB_4096 select SPI_FLASH diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig index e187a66..6d7982f 100644 --- a/src/mainboard/google/nyan_big/Kconfig +++ b/src/mainboard/google/nyan_big/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_SPI select TEGRA124_MODEL_CD570M + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select BOARD_ROMSIZE_KB_4096 select SPI_FLASH diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig index 29191f2..e6e240d 100644 --- a/src/mainboard/google/nyan_blaze/Kconfig +++ b/src/mainboard/google/nyan_blaze/Kconfig @@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_NVIDIA_TEGRA124 select TEGRA124_MODEL_CD570M select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select BOARD_ROMSIZE_KB_4096 select SPI_FLASH diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig index 573bff9..5bc958e 100644 --- a/src/mainboard/google/rush/Kconfig +++ b/src/mainboard/google/rush/Kconfig @@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ID_AUTO select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_SPI + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select SPI_FLASH select SOC_NVIDIA_TEGRA132 diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig index 6205f2d..a2740b5 100644 --- a/src/mainboard/google/rush_ryu/Kconfig +++ b/src/mainboard/google/rush_ryu/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_I2C select EC_GOOGLE_CHROMEEC_I2C_PROTO3 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select SPI_FLASH select SOC_NVIDIA_TEGRA132 diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig index 0fe9f68..bdb7e66 100644 --- a/src/mainboard/google/smaug/Kconfig +++ b/src/mainboard/google/smaug/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_I2C select EC_GOOGLE_CHROMEEC_I2C_PROTO3 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select SPI_FLASH select SPI_FLASH_WINBOND diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig index eb70f3a..bfa9184 100644 --- a/src/mainboard/google/veyron_brain/Kconfig +++ b/src/mainboard/google/veyron_brain/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select RAM_CODE_SUPPORT diff --git a/src/mainboard/google/veyron_danger/Kconfig b/src/mainboard/google/veyron_danger/Kconfig index 8160046..4c213f2 100644 --- a/src/mainboard/google/veyron_danger/Kconfig +++ b/src/mainboard/google/veyron_danger/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select RAM_CODE_SUPPORT diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig index 566e0a9..5ce5497 100644 --- a/src/mainboard/google/veyron_jerry/Kconfig +++ b/src/mainboard/google/veyron_jerry/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig index 3c90dcc..ee48276 100644 --- a/src/mainboard/google/veyron_mickey/Kconfig +++ b/src/mainboard/google/veyron_mickey/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select RAM_CODE_SUPPORT diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig index 8d22da7..cad5dcb 100644 --- a/src/mainboard/google/veyron_mighty/Kconfig +++ b/src/mainboard/google/veyron_mighty/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/google/veyron_minnie/Kconfig b/src/mainboard/google/veyron_minnie/Kconfig index 930a1ba..b93386b 100644 --- a/src/mainboard/google/veyron_minnie/Kconfig +++ b/src/mainboard/google/veyron_minnie/Kconfig @@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select HAVE_HARD_RESET diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig index 818b525..675382b 100644 --- a/src/mainboard/google/veyron_pinky/Kconfig +++ b/src/mainboard/google/veyron_pinky/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index a038184..dcbb5e5 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select RAM_CODE_SUPPORT diff --git a/src/mainboard/google/veyron_romy/Kconfig b/src/mainboard/google/veyron_romy/Kconfig index 1570cee..2eb5ae5 100644 --- a/src/mainboard/google/veyron_romy/Kconfig +++ b/src/mainboard/google/veyron_romy/Kconfig @@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select RAM_CODE_SUPPORT diff --git a/src/mainboard/google/veyron_shark/Kconfig b/src/mainboard/google/veyron_shark/Kconfig index 01068bf..c726e56 100644 --- a/src/mainboard/google/veyron_shark/Kconfig +++ b/src/mainboard/google/veyron_shark/Kconfig @@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select HAVE_HARD_RESET diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig index 882571c..a7d36b6 100644 --- a/src/mainboard/google/veyron_speedy/Kconfig +++ b/src/mainboard/google/veyron_speedy/Kconfig @@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select EC_GOOGLE_CHROMEEC_SPI select RAM_CODE_SUPPORT select SOC_ROCKCHIP_RK3288 + select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_CHROMEOS select HAVE_HARD_RESET

1 0

New patch to review for coreboot: cbfstool: don't pass header_size as separate argument (part 2)
by Patrick Georgi 25 Aug '15

25 Aug '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11333 -gerrit commit 516e6970c2a53c3f7eab39007a2b3495c2c31758 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Aug 25 22:27:57 2015 +0200 cbfstool: don't pass header_size as separate argument (part 2) It's already present inside struct cbfs_file Change-Id: Ic9682e93c3d208e2ed458940e4a9f9f5a64b6e98 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/cbfs_image.c | 3 ++- util/cbfstool/cbfs_image.h | 3 +-- util/cbfstool/cbfstool.c | 9 ++------- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index f93cfef..315cbe5 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -533,7 +533,7 @@ static int cbfs_add_entry_at(struct cbfs_image *image, int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, uint32_t content_offset, - struct cbfs_file *header, uint32_t header_size) + struct cbfs_file *header) { assert(image); assert(buffer); @@ -546,6 +546,7 @@ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, uint32_t addr, addr_next; struct cbfs_file *entry, *next; uint32_t need_size; + uint32_t header_size = ntohl(header->offset); need_size = header_size + buffer->size; DEBUG("cbfs_add_entry('%s'@0x%x) => need_size = %u+%zu=%u\n", diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h index c1983e7..7a9b484 100644 --- a/util/cbfstool/cbfs_image.h +++ b/util/cbfstool/cbfs_image.h @@ -93,8 +93,7 @@ int cbfs_export_entry(struct cbfs_image *image, const char *entry_name, * Never pass this function a top-aligned address: convert it to an offset. * Returns 0 on success, otherwise non-zero. */ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, - uint32_t content_offset, - struct cbfs_file *header, uint32_t header_size); + uint32_t content_offset, struct cbfs_file *header); /* Removes an entry from CBFS image. Returns 0 on success, otherwise non-zero. */ int cbfs_remove_entry(struct cbfs_image *image, const char *name); diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 047fab3..07d704f 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -154,9 +154,7 @@ static int cbfs_add_integer_component(const char *name, header = cbfs_create_file_header(CBFS_COMPONENT_RAW, buffer.size, name); - uint32_t header_size = cbfs_calculate_file_header_size(name); - if (cbfs_add_entry(&image, &buffer, - offset, header, header_size) != 0) { + if (cbfs_add_entry(&image, &buffer, offset, header) != 0) { ERROR("Failed to add %llu into ROM image as '%s'.\n", (long long unsigned)u64val, name); goto done; @@ -210,7 +208,6 @@ static int cbfs_add_component(const char *filename, struct cbfs_file *header = cbfs_create_file_header(type, buffer.size, name); - uint32_t header_size = cbfs_calculate_file_header_size(name); if (convert && convert(&buffer, &offset, header) != 0) { ERROR("Failed to parse file '%s'.\n", filename); @@ -222,9 +219,7 @@ static int cbfs_add_component(const char *filename, offset = convert_to_from_top_aligned(param.image_region, -offset); - if (cbfs_add_entry(&image, &buffer, offset, - header, header_size) - != 0) { + if (cbfs_add_entry(&image, &buffer, offset, header) != 0) { ERROR("Failed to add '%s' into ROM image.\n", filename); free(header); buffer_delete(&buffer);

1 0

New patch to review for coreboot: cbfstool: don't pass header_size as separate argument
by Patrick Georgi 25 Aug '15

25 Aug '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11332 -gerrit commit 644b9d73cbd6aeecc9b7f6499bb499706eeeed4d Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Aug 25 22:27:57 2015 +0200 cbfstool: don't pass header_size as separate argument It's already present inside struct cbfs_file Change-Id: Ib10663c6601aa02e07b868e440f05da02af9c2d9 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/cbfs_image.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 53ce604..f93cfef 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -457,8 +457,7 @@ static int cbfs_add_entry_at(struct cbfs_image *image, struct cbfs_file *entry, const void *data, uint32_t content_offset, - const struct cbfs_file *header, - uint32_t header_size) + const struct cbfs_file *header) { struct cbfs_file *next = cbfs_find_next_entry(image, entry); uint32_t addr = cbfs_get_entry_addr(image, entry), @@ -467,6 +466,7 @@ static int cbfs_add_entry_at(struct cbfs_image *image, uint32_t len, header_offset; uint32_t align = image->has_header ? image->header.align : CBFS_ENTRY_ALIGNMENT; + uint32_t header_size = ntohl(header->offset); header_offset = content_offset - header_size; if (header_offset % align) @@ -605,9 +605,8 @@ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, DEBUG("section 0x%x+0x%x for content_offset 0x%x.\n", addr, addr_next - addr, content_offset); - if (cbfs_add_entry_at(image, entry, - buffer->data, content_offset, header, - header_size) == 0) { + if (cbfs_add_entry_at(image, entry, buffer->data, + content_offset, header) == 0) { return 0; } break;

1 0

New patch to review for coreboot: cbfstool: use struct cbfs_file * instead of void *
by Patrick Georgi 25 Aug '15

25 Aug '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11331 -gerrit commit db83c8a0b8cc456f3ebbe28d5e4cd2b5c07209f5 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Aug 25 22:26:02 2015 +0200 cbfstool: use struct cbfs_file * instead of void * My concern was that compilers may something stupid under the assumption of a fixed struct size, but filename is already variable, so things are okay. Change-Id: I5348faf68f0a7993294e9de4c0b6c737278b28af Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/cbfs_image.c | 8 ++++---- util/cbfstool/cbfs_image.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 7066b99..53ce604 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -457,7 +457,7 @@ static int cbfs_add_entry_at(struct cbfs_image *image, struct cbfs_file *entry, const void *data, uint32_t content_offset, - const void *header_data, + const struct cbfs_file *header, uint32_t header_size) { struct cbfs_file *next = cbfs_find_next_entry(image, entry); @@ -487,7 +487,7 @@ static int cbfs_add_entry_at(struct cbfs_image *image, } len = content_offset - addr - header_size; - memcpy(entry, header_data, header_size); + memcpy(entry, header, header_size); if (len != 0) { /* the header moved backwards a bit to accomodate cbfs_file * alignment requirements, so patch up ->offset to still point @@ -533,14 +533,14 @@ static int cbfs_add_entry_at(struct cbfs_image *image, int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, uint32_t content_offset, - void *header, uint32_t header_size) + struct cbfs_file *header, uint32_t header_size) { assert(image); assert(buffer); assert(buffer->data); assert(!IS_TOP_ALIGNED_ADDRESS(content_offset)); - const char *name = ((struct cbfs_file *)header)->filename; + const char *name = header->filename; uint32_t entry_type; uint32_t addr, addr_next; diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h index 02c4a2d..c1983e7 100644 --- a/util/cbfstool/cbfs_image.h +++ b/util/cbfstool/cbfs_image.h @@ -94,7 +94,7 @@ int cbfs_export_entry(struct cbfs_image *image, const char *entry_name, * Returns 0 on success, otherwise non-zero. */ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, uint32_t content_offset, - void *header, uint32_t header_size); + struct cbfs_file *header, uint32_t header_size); /* Removes an entry from CBFS image. Returns 0 on success, otherwise non-zero. */ int cbfs_remove_entry(struct cbfs_image *image, const char *name);

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Patch set updated for coreboot: cbfstool: passing a header is now mandatory for converters
by Patrick Georgi 25 Aug '15

25 Aug '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11330 -gerrit commit 1d937d57204257207196e8b25f21c0ce6ed551f9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Aug 25 20:17:14 2015 +0200 cbfstool: passing a header is now mandatory for converters Change-Id: Iea5377af735b06bcaefb999547a8896b1c70763a Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/cbfstool.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index aac09b8..047fab3 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -248,8 +248,7 @@ static int cbfstool_convert_mkstage(struct buffer *buffer, uint32_t *offset, buffer_delete(buffer); // direct assign, no dupe. memcpy(buffer, &output, sizeof(*buffer)); - if (header) - header->len = htonl(output.size); + header->len = htonl(output.size); return 0; } @@ -280,8 +279,7 @@ static int cbfstool_convert_mkpayload(struct buffer *buffer, buffer_delete(buffer); // direct assign, no dupe. memcpy(buffer, &output, sizeof(*buffer)); - if (header) - header->len = htonl(output.size); + header->len = htonl(output.size); return 0; } @@ -298,8 +296,7 @@ static int cbfstool_convert_mkflatpayload(struct buffer *buffer, buffer_delete(buffer); // direct assign, no dupe. memcpy(buffer, &output, sizeof(*buffer)); - if (header) - header->len = htonl(output.size); + header->len = htonl(output.size); return 0; }

1 0

Patch set updated for coreboot: cbfstool: move cbfs_file header creation further up the call chain
by Patrick Georgi 25 Aug '15

25 Aug '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11326 -gerrit commit cb9b779f637aab119e5acaa89730ff5e97433783 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Aug 25 13:48:10 2015 +0200 cbfstool: move cbfs_file header creation further up the call chain The header is now created before the "converters" are run. Adding new capabilities (and fields to the header) will happen there, so we're close. Change-Id: I0556df724bd93816b435efff7d931293dbed918f Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/cbfs_image.c | 8 ++------ util/cbfstool/cbfs_image.h | 2 +- util/cbfstool/cbfstool.c | 17 ++++++++++++++--- 3 files changed, 17 insertions(+), 10 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 84f4be6..8297cf1 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -533,12 +533,13 @@ static int cbfs_add_entry_at(struct cbfs_image *image, int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, const char *name, uint32_t type, uint32_t content_offset, - uint32_t header_size) + void *header, uint32_t header_size) { assert(image); assert(buffer); assert(buffer->data); assert(name); + type = type; assert(!IS_TOP_ALIGNED_ADDRESS(content_offset)); uint32_t entry_type; @@ -607,16 +608,11 @@ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, DEBUG("section 0x%x+0x%x for content_offset 0x%x.\n", addr, addr_next - addr, content_offset); - struct cbfs_file *header = - cbfs_create_file_header(type, buffer->size, name); - if (cbfs_add_entry_at(image, entry, buffer->data, content_offset, header, header_size) == 0) { - free(header); return 0; } - free(header); break; } diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h index 432ea72..c1df911 100644 --- a/util/cbfstool/cbfs_image.h +++ b/util/cbfstool/cbfs_image.h @@ -94,7 +94,7 @@ int cbfs_export_entry(struct cbfs_image *image, const char *entry_name, * Returns 0 on success, otherwise non-zero. */ int cbfs_add_entry(struct cbfs_image *image, struct buffer *buffer, const char *name, uint32_t type, uint32_t content_offset, - uint32_t header_size); + void *header, uint32_t header_size); /* Removes an entry from CBFS image. Returns 0 on success, otherwise non-zero. */ int cbfs_remove_entry(struct cbfs_image *image, const char *name); diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 8672362..cad8004 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -123,6 +123,7 @@ static int cbfs_add_integer_component(const char *name, uint32_t offset, uint32_t headeroffset) { struct cbfs_image image; + struct cbfs_file *header = NULL; struct buffer buffer; int i, ret = 1; @@ -151,8 +152,11 @@ static int cbfs_add_integer_component(const char *name, offset = convert_to_from_top_aligned(param.image_region, -offset); + header = cbfs_create_file_header(CBFS_COMPONENT_RAW, + buffer.size, name); + uint32_t header_size = cbfs_calculate_file_header_size(name); if (cbfs_add_entry(&image, &buffer, name, CBFS_COMPONENT_RAW, - offset, 0) != 0) { + offset, header, header_size) != 0) { ERROR("Failed to add %llu into ROM image as '%s'.\n", (long long unsigned)u64val, name); goto done; @@ -161,6 +165,8 @@ static int cbfs_add_integer_component(const char *name, ret = 0; done: + if (header) + free(header); buffer_delete(&buffer); return ret; } @@ -202,9 +208,11 @@ static int cbfs_add_component(const char *filename, return 1; } + struct cbfs_file *header = + cbfs_create_file_header(type, buffer.size, name); uint32_t header_size = cbfs_calculate_file_header_size(name); - if (convert && convert(&buffer, &offset, NULL) != 0) { + if (convert && convert(&buffer, &offset, header) != 0) { ERROR("Failed to parse file '%s'.\n", filename); buffer_delete(&buffer); return 1; @@ -214,13 +222,16 @@ static int cbfs_add_component(const char *filename, offset = convert_to_from_top_aligned(param.image_region, -offset); - if (cbfs_add_entry(&image, &buffer, name, type, offset, header_size) + if (cbfs_add_entry(&image, &buffer, name, type, offset, + header, header_size) != 0) { ERROR("Failed to add '%s' into ROM image.\n", filename); + free(header); buffer_delete(&buffer); return 1; } + free(header); buffer_delete(&buffer); return 0; }

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coreboot-gerrit August 2015