August 2015 - coreboot-gerrit - mail.coreboot.org

New patch to review for coreboot: soc/intel: Fix dependency of CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
by Alexandru Gagniuc Aug. 31, 2015

Aug. 31, 2015

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11473 -gerrit commit c65b2dd738a25e5a8584095f636f327a30704d66 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Aug 29 20:00:24 2015 -0700 soc/intel: Fix dependency of CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM This depends on RELOCATABLE_RAMSTAGE, and shouldn't be selected if its dependency is not activated. Change-Id: I8e7efc3f87e105715fe3377ed306891f0d209979 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/soc/intel/braswell/Kconfig | 2 +- src/soc/intel/broadwell/Kconfig | 2 +- src/soc/intel/skylake/Kconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index ab36056..4c9c8aa 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -13,7 +13,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select COLLECT_TIMESTAMPS select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 0106255..30c0093 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -14,7 +14,7 @@ config CPU_SPECIFIC_OPTIONS select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_SETTINGS select MRC_SETTINGS_PROTECT - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_MONOTONIC_TIMER diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 9805b6d..d53e67e 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -13,7 +13,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select BACKUP_DEFAULT_SMM_REGION select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select CACHE_ROM select CAR_MIGRATION select COLLECT_TIMESTAMPS

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Patch merged into coreboot/master: util/cbmem: add -T option for machine parseable timestamps
by gerrit＠coreboot.org Aug. 31, 2015

Aug. 31, 2015

the following patch was just integrated into master: commit fbff301f78f73d3a9e37e579883b470d8189833e Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Aug 30 22:00:12 2015 -0500 util/cbmem: add -T option for machine parseable timestamps In order to make analysis easier provide an option (-T) to print timestamps in a parseable format: ID<tab>raw timestamp<tab>time from previous entry<tab>description BUG=chrome-os-partner:44669 BRANCH=firmware-strago-7287.B TEST=Built and tested on glados. Used the following script: cbmem -T | awk 'BEGIN { FS="\t" } { tot += $3 } END { print tot }' Change-Id: I06dc0487d1462b6a78924130f0ad74b0d787d3f8 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11471 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11471 for details. -gerrit

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Patch merged into coreboot/master: timestamp: add tick frequency to exported table
by gerrit＠coreboot.org Aug. 31, 2015

Aug. 31, 2015

the following patch was just integrated into master: commit c49014e7507b02c5f5ca249e7ab86a65394d12b0 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Aug 30 21:19:55 2015 -0500 timestamp: add tick frequency to exported table Add the timestamp tick frequency within the timestamp table so the cbmem utility doesn't try to figure it out on its own. Those paths still exist for x86 systems which don't provide tsc_freq_mhz(). All other non-x86 systems use the monotonic timer which has a 1us granularity or 1MHz. One of the main reasons is that Linux is reporting /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq as the true turbo frequency on turbo enables machines. This change also fixes the p-state values honored in cpufreq for turbo machines in that turbo p-pstates were reported as 100MHz greater than nominal. BUG=chrome-os-partner:44669 BRANCH=firmware-strago-7287.B TEST=Built and booted on glados. Confirmed table frequency honored. Change-Id: I763fe2d9a7b01d0ef5556e5abff36032062f5801 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11470 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11470 for details. -gerrit

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Patch merged into coreboot/master: imgtec/pistachio: remove timestamp_get() implementation
by gerrit＠coreboot.org Aug. 31, 2015

Aug. 31, 2015

the following patch was just integrated into master: commit 60391b65fdaca3a365cb16d891f0541c74e866b4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Aug 30 16:04:13 2015 -0500 imgtec/pistachio: remove timestamp_get() implementation As pistachio already provides timer_monotonic_get() let the generic timestamp_get() use that instead of having around another implementation of timestamp_get(). BUG=chrome-os-partner:44669 BRANCH=None TEST=None Change-Id: Iaa6db49f0055b7c2ef116f41453f838093e516e0 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11469 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/11469 for details. -gerrit

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Patch merged into coreboot/master: armv7/arm64: remove timestamp.c
by gerrit＠coreboot.org Aug. 31, 2015

Aug. 31, 2015

the following patch was just integrated into master: commit 107d1fb1376bca62cf07f59eec222f7834c5f326 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Aug 30 15:41:54 2015 -0500 armv7/arm64: remove timestamp.c The src/lib/timestamp.c already has an implementation using timer_monotonic_get() for timestamp_get(). Use that instead of duplicating the logic. BUG=chrome-os-partner:44669 BRANCH=None TEST=None Change-Id: If17be86143f217445bd64d67ceee4355fa482d39 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/11468 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/11468 for details. -gerrit

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Patch merged into coreboot/master: AMD bettong: Fix the PCIe lane map
by gerrit＠coreboot.org Aug. 30, 2015

Aug. 30, 2015

the following patch was just integrated into master: commit 4a2fc3e6f08d19a8045802784a5342f11ed4ff9c Author: zbao <fishbaozi(a)gmail.com> Date: Sun Aug 16 22:45:59 2015 -0400 AMD bettong: Fix the PCIe lane map Change-Id: Ieaed5cf76c6f0a6a121e6add731d5c1e1528dfc7 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11375 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11375 for details. -gerrit

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Patch merged into coreboot/master: AMD Bettong: Set the USB3 port as unremoveable.
by gerrit＠coreboot.org Aug. 30, 2015

Aug. 30, 2015

the following patch was just integrated into master: commit d5b778d2696107deaf97a388829dc13c5659e673 Author: zbao <fishbaozi(a)gmail.com> Date: Wed Aug 26 03:37:40 2015 -0400 AMD Bettong: Set the USB3 port as unremoveable. Without this change, if one USB3 device is attached when the board is power up, the USB3 port can not be used. Change-Id: I98628975000c7d56b1540c2b321d580ace1ef70e Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11377 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11377 for details. -gerrit

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Patch merged into coreboot/master: AMD Bettong: Lower the TOM to give more MMIO space
by gerrit＠coreboot.org Aug. 30, 2015

Aug. 30, 2015

the following patch was just integrated into master: commit 418026f63fbd966dfcc6c60f1384a90e6f17143d Author: zbao <fishbaozi(a)gmail.com> Date: Mon Aug 24 00:24:51 2015 -0400 AMD Bettong: Lower the TOM to give more MMIO space Change-Id: Idf28faa26a7ea5e94495af5ff027309df444766e Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11376 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11376 for details. -gerrit

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Patch merged into coreboot/master: buildgcc: Show the exit status of wget if downloading fails.
by gerrit＠coreboot.org Aug. 30, 2015

Aug. 30, 2015

the following patch was just integrated into master: commit d22b9ea1cbc0e23eb2b30a48c0ed8d807a337df2 Author: zbao <fishbaozi(a)gmail.com> Date: Sun Aug 30 23:35:16 2015 -0400 buildgcc: Show the exit status of wget if downloading fails. Change-Id: Ie3a44c6db9c9c186c52b4743334266ec5411ba8a Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11472 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11472 for details. -gerrit

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Patch merged into coreboot/master: buildgcc: remove getopt when doing clean.
by gerrit＠coreboot.org Aug. 30, 2015

Aug. 30, 2015

the following patch was just integrated into master: commit ff3f15cd4dcd631e982332c9912a07c28ee42def Author: zbao <fishbaozi(a)gmail.com> Date: Wed Aug 26 22:00:31 2015 -0400 buildgcc: remove getopt when doing clean. Change-Id: I9f59a00e735f39df813b2216290da62eea3c595d Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: http://review.coreboot.org/11372 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/11372 for details. -gerrit

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