coreboot-gerrit June 2015

coreboot-gerrit@coreboot.org

1 participants
1226 discussions

New patch to review for coreboot: drivers/i2c/tpm: push tpm driver from verstage to libverstage
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10707 -gerrit commit 4e48c7d4ce7ef36296339bcd70cba326a800953f Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 23:08:44 2015 +0200 drivers/i2c/tpm: push tpm driver from verstage to libverstage That way it's available wherever the verstage code ends up, bootblock, verstage or romstage. Change-Id: I0665e297f199acd60cff93e1b39812f183115d33 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/drivers/i2c/tpm/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/i2c/tpm/Makefile.inc b/src/drivers/i2c/tpm/Makefile.inc index e601136..6b003ed 100644 --- a/src/drivers/i2c/tpm/Makefile.inc +++ b/src/drivers/i2c/tpm/Makefile.inc @@ -1,3 +1,3 @@ ramstage-$(CONFIG_I2C_TPM) += tis.c tpm.c romstage-$(CONFIG_I2C_TPM) += tis.c tpm.c -verstage-$(CONFIG_I2C_TPM) += tis.c tpm.c +libverstage-$(CONFIG_I2C_TPM) += tis.c tpm.c

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New patch to review for coreboot: chromeos: push vbnv_* accessors from verstage to libverstage
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10706 -gerrit commit 8e93481265905d9bb7b63fc4e4a33168a5a91a73 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 23:08:44 2015 +0200 chromeos: push vbnv_* accessors from verstage to libverstage That way they're available wherever the verstage code ends up, bootblock, verstage or romstage. Change-Id: I6e59a40761f95a98d96a9b72e3bbcc59caae9b1a Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/vendorcode/google/chromeos/Makefile.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index df24435..5325bdd 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -22,13 +22,13 @@ verstage-y += chromeos.c romstage-y += chromeos.c ramstage-y += chromeos.c -verstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c +libverstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c romstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c ramstage-$(CONFIG_CHROMEOS_VBNV_CMOS) += vbnv_cmos.c -verstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c +libverstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c romstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c ramstage-$(CONFIG_CHROMEOS_VBNV_EC) += vbnv_ec.c -verstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c +libverstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c romstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c ramstage-$(CONFIG_CHROMEOS_VBNV_FLASH) += vbnv_flash.c

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New patch to review for coreboot: google/cosmos: romstage needs the accessor functions for buttons
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10705 -gerrit commit 09adc2bfcfda557860058c931cdac2e238127385 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:52:26 2015 +0200 google/cosmos: romstage needs the accessor functions for buttons In Chrome OS mode, the romstage tries to interpret the various buttons on the device, so it needs access to the accessor functions. Change-Id: Iecfd37e79883d826e15c474d77095fbbbb2b7cea Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/mainboard/google/cosmos/Makefile.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/cosmos/Makefile.inc b/src/mainboard/google/cosmos/Makefile.inc index 0ab2491..e8c0869 100644 --- a/src/mainboard/google/cosmos/Makefile.inc +++ b/src/mainboard/google/cosmos/Makefile.inc @@ -26,6 +26,7 @@ verstage-y += chromeos.c verstage-y += reset.c romstage-y += boardid.c +romstage-y += chromeos.c romstage-y += romstage.c romstage-y += reset.c

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New patch to review for coreboot: google/storm: romstage needs the accessor functions for buttons
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10704 -gerrit commit 19fb9a107075d8aa15667ed718c8901cb8ba7272 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:52:26 2015 +0200 google/storm: romstage needs the accessor functions for buttons In Chrome OS mode, the romstage tries to interpret the various buttons on the device, so it needs access to the accessor functions. Change-Id: I59a4f892ca84d475d8f46c8f8c1906dae10ad32d Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/mainboard/google/storm/Makefile.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc index 68828c6..8eccc3e 100644 --- a/src/mainboard/google/storm/Makefile.inc +++ b/src/mainboard/google/storm/Makefile.inc @@ -31,6 +31,7 @@ verstage-y += reset.c romstage-y += romstage.c romstage-y += cdp.c +romstage-y += chromeos.c romstage-y += mmu.c romstage-y += reset.c

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New patch to review for coreboot: qualcomm/ipq806x: Fix uart in verstage
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10703 -gerrit commit 5cbe38fe39e7fd838f9911c8e8bdafe07006c216 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:50:45 2015 +0200 qualcomm/ipq806x: Fix uart in verstage An old Kconfig symbol from Chrome OS survived into the Makefile (but is nowhere declared or used). Use the same symbol as for uart.c in the other stages. Change-Id: I7a6f1b82254e888d6f2d65d6cff87c4d546ec097 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/soc/qualcomm/ipq806x/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index b348423..84eae0b 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -32,7 +32,7 @@ libverstage-y += i2c.c libverstage-y += qup.c libverstage-y += spi.c verstage-y += timer.c -verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c +verstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += clock.c romstage-y += blobs_init.c

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New patch to review for coreboot: qualcomm/ipq806x: centralize vboot configuration
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10702 -gerrit commit b4396bdf3e59dff19d8c7a6ced23dc4cbb749b32 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:49:26 2015 +0200 qualcomm/ipq806x: centralize vboot configuration vboot configuration (separate stage or not, which stage loads romstage) depends on SoC properties (eg. amount of SRAM), not on board specifics, so move this part of the configuration to the SoC. Change-Id: I70b4cd1794ddf2aba7cdae94859ea1d76ae019f4 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/mainboard/google/storm/Kconfig | 1 - src/soc/qualcomm/ipq806x/Kconfig | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig index c6c75ee..1989640 100644 --- a/src/mainboard/google/storm/Kconfig +++ b/src/mainboard/google/storm/Kconfig @@ -29,7 +29,6 @@ config BOARD_SPECIFIC_OPTIONS select DRIVERS_I2C_WW_RING select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS - select RETURN_FROM_VERSTAGE select SPI_FLASH select SPI_FLASH_SPANSION select SPI_FLASH_STMICRO diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 7f8937c..ecc52e2 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -10,6 +10,8 @@ config SOC_QC_IPQ806X select HAVE_UART_SPECIAL select SPI_ATOMIC_SEQUENCING select GENERIC_GPIO_LIB + select SEPARATE_VERSTAGE + select RETURN_FROM_VERSTAGE if SOC_QC_IPQ806X

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Patch set updated for coreboot: vboot2: Enable VBOOT_DYNAMIC_WORK_BUFFER on x86
by Stefan Reinauer 29 Jun '15

29 Jun '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10677 -gerrit commit 3dda624998c231071cb5c7c1237efcf843b3c9b7 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jun 26 17:34:56 2015 -0700 vboot2: Enable VBOOT_DYNAMIC_WORK_BUFFER on x86 Change-Id: Iaadbd52d948000d1ed46865b83bdb0f4926ca429 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/vendorcode/google/chromeos/vboot2/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vendorcode/google/chromeos/vboot2/Kconfig index 3106737..c5c46e5 100644 --- a/src/vendorcode/google/chromeos/vboot2/Kconfig +++ b/src/vendorcode/google/chromeos/vboot2/Kconfig @@ -118,6 +118,7 @@ config VBOOT_BL31_INDEX config VBOOT_DYNAMIC_WORK_BUFFER bool "Vboot's work buffer is dynamically allocated." + default y if ARCH_ROMSTAGE_X86_32 default n depends on VBOOT_VERIFY_FIRMWARE help

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Patch set updated for coreboot: MAINTAINERS: define all subsystems and their files
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10530 -gerrit commit 4c5aef534d0423793670185f25df4d4b850fca51 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Jun 12 15:30:59 2015 -0700 MAINTAINERS: define all subsystems and their files WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! Initial list of subsystems and the files that belong to that subsystem, so we can define maintainers for them. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! WIP! Change-Id: Icde0f387b486bea1bb63f9bbdf6330fa0a3ebcfa --- MAINTAINERS | 169 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 162 insertions(+), 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index bd49c41..3e2c14d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -122,30 +122,185 @@ Maintainers List (try to look for most precise areas first) RISC-V ARCHITECTURE M: Ronald Minnich <rminnich(a)gmail.com> S: Maintained -F: src/arch/riscv -F: src/mainboard/emulation/qemu-riscv +F: src/arch/riscv/ +F: src/soc/ucb/ +F: src/mainboard/emulation/qemu-riscv/ -GOOGLE PANTHER MAINBOARD +GOOGLE MAINBOARDS M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> S: Supported -F: src/mainboard/google/panther +F: src/mainboard/google/ +F: src/ec/google/ ATI MACH64 Driver S: Orphan -F: drivers/ati/mach64 +F: src/drivers/ati/mach64/ + +ABUILD +M: Patrick Georgi <patrick(a)georgi-clan.de> +S: Supported +F: util/abuild/ + +ACPI +F: src/acpi/ +F: src/arch/x86/acpi/ +F: util/acpi/ + +ARM ARCHITECTURE +F: src/arch/arm/ +F: src/arch/arm64 +F: src/cpu/allwinner/ +F: src/cpu/armltd/ +F: src/cpu/samsung/ +F: src/cpu/ti/ +F: src/soc/broadcom/ +F: src/soc/marvell/ +F: src/soc/nvidia/ +F: src/soc/qualcomm/ +F: src/soc/rockchip/ +F: src/soc/samsung/ +F: util/arm_boot_tools/ +F: util/broadcom/ +F: util/exynos/ +F: util/ipqheader/ +F: util/nvidia/ +F: util/rockchip/ + +MIPS ARCHITECTURE +F: src/arch/mips/ +F: src/cpu/mips/ +F: src/soc/imgtec/ +F: util/bimgtool/ + +X86 ARCHITECTURE +F: src/arch/x86/ +F: src/cpu/x86/ +F: src/drivers/pc80/ +F: src/include/pc80/ +F: src/include/cpu/x86/ + +INTEL SUPPORT +F: src/vendorcode/intel/ +F: src/cpu/intel/ +F: src/northbridge/intel/ +F: src/southbridge/intel/ +F: src/soc/intel/ +F: src/drivers/intel/ +F: src/include/cpu/intel/ + +AMD SUPPORT +F: src/vendorcode/amd/ +F: src/cpu/amd/ +F: src/northbridge/amd/ +F: src/southbridge/amd/ +F: src/include/cpu/amd/ + +VIA SUPPORT +F: src/cpu/via/ +F: src/northbridge/via/ +F: src/southbridge/via/ LINT SCRIPTS M: Patrick Georgi <patrick(a)georgi-clan.de> S: Supported F: util/lint/ +INTELTOOL +M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> +F: util/inteltool/ + +IFDTOOL +M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> +F: util/ifdtool/ +F: util/ifdfake/ + BUILD SYSTEM M: Patrick Georgi <patrick(a)georgi-clan.de> S: Supported F: Makefile F: *.inc -F: util/kconfig -F: util/sconfig +F: src/include/kconfig.h +F: util/kconfig/ +F: util/sconfig/ + +BOARD STATUS +F: util/board_status/ + +BINARY OBJECTS +F: 3rdparty/blobs/ + +VERIFIED BOOT +F: 3rdparty/vboot/ +F: src/vendorcode/google/chromeos/ +F: src/include/tpm.h +F: src/include/tpm_lite/ + +RESOURCE ALLOCATOR +F: src/device/* +F: src/include/device/ +F: src/include/cpu/cpu.h + +OPTION ROM EXECUTION & X86EMU +F: src/device/oprom/ + +CBFS +F: src/include/cbfs.h +F: src/include/cbfs_serialized.h +F: util/cbfstool/ + +CBMEM +F: src/include/cbmem.h +F: src/include/cbmem_id.h +F: util/cbmem/ + +CONSOLE +F: src/console/ +F: src/include/console/ +F: src/drivers/uart/ + +NVRAM +F: util/nvramtool/ +F: util/optionlist/ +F: payloads/nvramcui/ + +LIBPAYLOAD +F: payloads/libpayload/ + +BAYOU PAYLOAD +F: payloads/bayou/ + +COREINFO PAYLOAD +F: payloads/coreinfo/ + +EXTERNAL PAYLOADS INTEGRATION +M: Stefan Reinauer <stefan.reinauer(a)coreboot.org> +F: payloads/external + +VERIFIED BOOT 2 +M: Aaron Durbin <adurbin(a)chromium.org> +F: src/vendorcode/google/chromeos/vboot2/ + +MISSING: TIMERS / DELAYS + +MISSING: TIMESTAMPS + +MISSING: MEMLAYOUT + +MISSING: FMAP + +MISSING: GPIO + +MISSING: SMP + +MISSING: SUPERIOS + +MISSING: DMP / QEMU-X86 + +MISSING: ELOG + +MISSING: GENERIC DRAM (should drop) + +MISSING: SPI THE REST M: Stefan Reinauer <stefan.reinauer(a)coreboot.org>

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New patch to review for coreboot: vboot2: consolidate vboot2 buffer initialization
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10701 -gerrit commit 97525387a983de83ad1454d6ca50227971fee793 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:24:34 2015 +0200 vboot2: consolidate vboot2 buffer initialization Instead of calling the init function to clear out vboot2 data structures in multiple places, move the function and call close to verstage_main(). Change-Id: If42e18a8e4581f22f7a7aced70ccbe3188bb0cd5 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/vendorcode/google/chromeos/vboot2/vboot_loader.c | 18 ------------------ src/vendorcode/google/chromeos/vboot2/verstage.c | 20 +++++++++++++++++++- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index d6e760a..3c0d67e 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -63,22 +63,6 @@ static int verstage_should_load(void) return 0; } -static void init_vb2_working_data(void) -{ - struct vb2_working_data *wd; - size_t work_size; - - work_size = vb2_working_data_size(); - wd = vboot_get_working_data(); - memset(wd, 0, work_size); - /* - * vboot prefers 16-byte alignment. This takes away 16 bytes - * from the VBOOT2_WORK region, but the vboot devs said that's okay. - */ - wd->buffer_offset = ALIGN_UP(sizeof(*wd), 16); - wd->buffer_size = work_size - wd->buffer_offset; -} - static int vboot_active(struct asset *asset) { struct vb2_working_data *wd; @@ -87,10 +71,8 @@ static int vboot_active(struct asset *asset) run_verification = verification_should_run(); if (run_verification) { - init_vb2_working_data(); verstage_main(); } else if (verstage_should_load()) { - init_vb2_working_data(); struct prog verstage = PROG_INIT(ASSET_VERSTAGE, CONFIG_CBFS_PREFIX "/verstage"); diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c index bc7846a..783d1b6 100644 --- a/src/vendorcode/google/chromeos/vboot2/verstage.c +++ b/src/vendorcode/google/chromeos/vboot2/verstage.c @@ -209,6 +209,22 @@ static uint32_t extend_pcrs(struct vb2_context *ctx) tpm_extend_pcr(ctx, 1, HWID_DIGEST_PCR); } +static void init_vb2_working_data(void) +{ + struct vb2_working_data *wd; + size_t work_size; + + work_size = vb2_working_data_size(); + wd = vboot_get_working_data(); + memset(wd, 0, work_size); + /* + * vboot prefers 16-byte alignment. This takes away 16 bytes + * from the VBOOT2_WORK region, but the vboot devs said that's okay. + */ + wd->buffer_offset = ALIGN_UP(sizeof(*wd), 16); + wd->buffer_size = work_size - wd->buffer_offset; +} + /** * Verify and select the firmware in the RW image * @@ -219,8 +235,10 @@ void verstage_main(void) { struct vb2_context ctx; struct region_device fw_main; - struct vb2_working_data *wd = vboot_get_working_data(); + struct vb2_working_data *wd; int rv; + init_vb2_working_data(); + wd = vboot_get_working_data(); timestamp_add_now(TS_START_VBOOT); /* Set up context and work buffer */

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New patch to review for coreboot: arch/arm64: Avoid race condition when building bl31
by Patrick Georgi 29 Jun '15

29 Jun '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10700 -gerrit commit 0e3320586eb35859e3b44971194be71b315e95b5 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Jun 29 22:13:53 2015 +0200 arch/arm64: Avoid race condition when building bl31 The arm-trusted-firmware build system may not create the final bl31.elf file atomically, confusing our make to try to use it before it's ready. Hence insert a (hopefully, but not guaranteed to be atomic) file move. Change-Id: Iffc80467e0f4bbc96fc62414d4abfaa7b42634f4 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/arch/arm64/Makefile.inc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index 86d6f7d..4cf012a 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -195,12 +195,12 @@ BL31_MAKEARGS += DEBUG=1 endif # CONFIG_CONSOLE_SERIAL # Avoid build/release|build/debug distinction by overriding BUILD_PLAT directly -BL31_MAKEARGS += BUILD_PLAT="$(top)/$(obj)/3rdparty/arm-trusted-firmware" +BL31_MAKEARGS += BUILD_PLAT="$(abspath $(obj)/3rdparty/arm-trusted-firmware)" BL31_CFLAGS := -fno-pic -fno-stack-protector BL31_LDFLAGS := --emit-relocs -BL31 := $(obj)/3rdparty/arm-trusted-firmware/bl31/bl31.elf +BL31 := $(obj)/bl31.elf $(BL31): @printf " MAKE $(subst $(obj)/,,$(@))\n" @@ -208,6 +208,7 @@ $(BL31): CFLAGS="$(BL31_CFLAGS)" \ LDFLAGS="$(BL31_LDFLAGS)" \ $(MAKE) -C $(BL31_SOURCE) $(BL31_MAKEARGS) bl31 + mv $(obj)/3rdparty/arm-trusted-firmware/bl31/bl31.elf $@ .PHONY: $(BL31)

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coreboot-gerrit June 2015