coreboot-gerrit April 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: b4ff291 rk3288: Pass SPI bus speed in as parameter to init function
by gerrit＠coreboot.org 04 Apr '15

04 Apr '15

the following patch was just integrated into master: commit b4ff291cf6999651cd29b3df671049feffeb5e48 Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Sep 29 13:48:40 2014 -0700 rk3288: Pass SPI bus speed in as parameter to init function This re-factors rockchip_spi to remove speed_hz which will instead be passed in via rockchip_spi_init(), thus making it easier to support other boards which may have different slave devices attached. BUG=none BRANCH=none TEST=built and booted on Pinky Original-Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Original-Change-Id: I7baf0fa0a2660e3c975847fdec3eb92bcd0d6c10 Original-Reviewed-on: https://chromium-review.googlesource.com/220411 Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> (cherry picked from commit de33d2ed6352fc4c8e81dc53451f164a8792daf2) Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Change-Id: Ie6473e47d50b7e633688185e8d8036980b833f1c Reviewed-on: http://review.coreboot.org/9245 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/9245 for details. -gerrit

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New patch to review for coreboot: 173ec64 arm64: make secmon link with the manual template
by Aaron Durbin 04 Apr '15

04 Apr '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9300 -gerrit commit 173ec645c503a7d68e77084e440179f905a0343f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Apr 3 20:33:39 2015 -0500 arm64: make secmon link with the manual template Secmon needs a special build rule because of the objcopy -B operation required to include it in ramstage. Utilize the manual template so builds continue to work with upcoming build chnages. Note: secmon is actually missing symbols still so those still need to be addressed. That looks to be as if --gc-sections isn't be honored, but I'm actually thinking the symbols are just erroneously carried over as the references for these symbols don't show up in the symbol table: U coreboot_build U coreboot_extra_version U coreboot_version U default_baudrate U lb_add_console U lb_add_serial U uart_baudrate_divisor Change-Id: I41c75e93536b73c4304ef3a87dc39d448d1f00d4 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm64/armv8/secmon/Makefile.inc | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/arch/arm64/armv8/secmon/Makefile.inc b/src/arch/arm64/armv8/secmon/Makefile.inc index 85c3c0a..f9ce4f6 100644 --- a/src/arch/arm64/armv8/secmon/Makefile.inc +++ b/src/arch/arm64/armv8/secmon/Makefile.inc @@ -23,10 +23,10 @@ $(eval $(call create_class_compiler,secmon,arm64)) SECMON_DIR=$(obj)/arch/arm64/armv8/secmon SECMON_BIN=$(SECMON_DIR)/secmon -SECMON_OBJ=$(SECMON_DIR)/secmon.o -SECMON_ELF=$(SECMON_DIR)/secmon.elf -SECMON_RMOD=$(SECMON_DIR)/secmon.elf.rmod -SECMON_RAMSTAGE=$(SECMON_DIR)/secmon.ramstage.o +SECMON_OBJ=$(SECMON_BIN).o +SECMON_ELF=$(SECMON_BIN).elf +SECMON_RMOD=$(SECMON_ELF).rmod +SECMON_RAMSTAGE=$(SECMON_DIR)/secmon.manual secmon-generic-ccopts += -I$(src)/arch/arm64/include/armv8/ -include $(src)/include/kconfig.h -D__SECMON__ @@ -38,16 +38,16 @@ secmon-y += ../exception.c secmon-y += ../../cpu.c secmon-y += ../../transition_asm.S ../../transition.c -ramstage-srcs += $(SECMON_BIN).o +ramstage-srcs += $(SECMON_RAMSTAGE) $(SECMON_OBJ): $$(secmon-objs) - $(CC_secmon) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_secmon) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SECMON_ELF), $(SECMON_OBJ), 0,arm64)) $(SECMON_BIN): $(SECMON_RMOD) - $(OBJCOPY_secmon) -O binary $< $@ + $(OBJCOPY_secmon) -O binary $< $@ -$(SECMON_RAMSTAGE): $(SECMON_BIN) - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY_secmon) -I binary $(notdir $<) -O elf64-littleaarch64 -B aarch64 $(notdir $@) +$(SECMON_BIN).ramstage.manual: $(SECMON_BIN) + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cd $(dir $@); $(OBJCOPY_secmon) -I binary $(notdir $<) -O elf64-littleaarch64 -B aarch64 $(notdir $@)

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Patch set updated for coreboot: 22add2b build system: use full (in-tree) paths
by Aaron Durbin 04 Apr '15

04 Apr '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9288 -gerrit commit 22add2b8d5b88de896efc58a8a819c68e4dce84d Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Apr 3 10:32:17 2015 +0200 build system: use full (in-tree) paths So far we assumed that all files in *-srcs are below src/ which wasn't really true actually and will be less true with future changes. Fix up crt0.S handling on x86, which is covered by default rules due to this change. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: Icae563c2d545b1aea809406e73faf3b417796a1b Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 --- Makefile | 4 ++-- Makefile.inc | 2 +- src/arch/x86/Makefile.inc | 13 ++++--------- 3 files changed, 7 insertions(+), 12 deletions(-) diff --git a/Makefile b/Makefile index f6f9a60..3ad19df 100644 --- a/Makefile +++ b/Makefile @@ -230,7 +230,7 @@ define create_cc_template # $4 additional dependencies ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template -$(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) +$$(call src-to-obj,$1,$$(1).$2): $$(1).$2 $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" $(CC_$(1)) -MMD $$$$(CPPFLAGS_$(1)) $$$$(CFLAGS_$(1)) -MT $$$$(@) $(3) -c -o $$$$@ $$$$< en$(EMPTY)def @@ -244,7 +244,7 @@ $(foreach class,$(classes), \ $(if $(generic-objs_$(type)_template_gen),$(eval $(call generic-objs_$(type)_template_gen,$(class))),\ $(eval $(call create_cc_template,$(class),$(type),$($(class)-$(type)-ccopts),$($(class)-$(type)-deps)))))) -foreach-src=$(foreach file,$($(1)-srcs),$(eval $(call $(1)-objs_$(subst .,,$(suffix $(file)))_template,$(subst src/,,$(basename $(file)))))) +foreach-src=$(foreach file,$($(1)-srcs),$(eval $(call $(1)-objs_$(subst .,,$(suffix $(file)))_template,$(basename $(file))))) $(eval $(foreach class,$(classes),$(call foreach-src,$(class)))) DEPENDENCIES = $(addsuffix .d,$(basename $(allobjs))) diff --git a/Makefile.inc b/Makefile.inc index d18acfc..0e34577 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -147,7 +147,7 @@ endef ####################################################################### # Add handler to compile ACPI's ASL define ramstage-objs_asl_template -$(obj)/$(1).ramstage.asl: src/$(1).asl $(obj)/config.h +$$(call src-to-obj,ramstage,$(1).asl): $(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-ramstage-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$@ cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$@) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index fe92a22..e2170f5 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -233,17 +233,12 @@ $(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; } mv $@.tmp $@ -$(objgenerated)/crt0.romstage.S: $$(crt0s) +$(objgenerated)/crt0.S: $$(crt0s) @printf " GEN $(subst $(obj)/,,$(@))\n" - printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@ + printf '$(foreach crt0,$(crt0s),#include "$(crt0)"\n)' > $@ -$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.S - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) $(CFLAGS_x86_32) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm - -$(objgenerated)/crt0.S: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) $(CPPFLAGS_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ +# Compiling crt0 with -g seems to trigger https://sourceware.org/bugzilla/show_bug.cgi?id=6428 +romstage-S-ccopts += -I. -g0 endif # CONFIG_ARCH_ROMSTAGE_X86_32

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New patch to review for coreboot: 08c5c70 git: add rebase helper script
by Stefan Reinauer 04 Apr '15

04 Apr '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9299 -gerrit commit 08c5c70bb902062c2f1f17d8d2dc773d6c7aed72 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Fri Apr 3 17:06:48 2015 -0700 git: add rebase helper script This is a script we have been using to rewrite commit messages when upstreaming coreboot patches from the ChromiumOS tree into coreboot upstream. Change-Id: I5442279c099dafe55cc97ccf09ee2bc2df4eca5f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/gitconfig/rebase.sh | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/util/gitconfig/rebase.sh b/util/gitconfig/rebase.sh new file mode 100755 index 0000000..53b3ef1 --- /dev/null +++ b/util/gitconfig/rebase.sh @@ -0,0 +1,28 @@ +#!/bin/sh + +# rebase.sh - rebase helper script +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +# When pulling in patches from another tree, do the following: +# git remote add ... +# git checkout -b upstreaming +# git cherry-pick ... +# git rebase -i --exec util/gitconfig/rebase.sh master + +msg() { + git log -n 1 | grep "^ " | cut -c5- +} + +CHID=$(msg | grep -i "^Change-Id: I") +CID=$(git log -n1 --grep "^$CHID$" --pretty=%H cros/chromeos-2013.04) +GUID="`git config user.name` <`git config user.email`>" +msg | tac | awk '/^$/ {if (end==0) print "Original-Commit-Id: '"$CID"'\nSigned-off-by: '"$GUID"'"; end=1}; { if (end==0) print "Original-" $0; else print $0;}' | tac | git commit --amend -F -

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New patch to review for coreboot: e2b7eaa kconfig: drop intermittend forwarder files
by Stefan Reinauer 04 Apr '15

04 Apr '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9298 -gerrit commit e2b7eaa0755532d04666e9e445e91df446e42184 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Sat Apr 4 01:58:28 2015 +0200 kconfig: drop intermittend forwarder files With kconfig understanding wildcards, we don't need Kconfig files that just include other Kconfig files anymore. Change-Id: I7584e675f78fcb4ff1fdb0731e340533c5bc040d Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/Kconfig | 55 ++++++++++----------------------------- src/arch/arm/Kconfig | 4 +++ src/arch/arm64/Kconfig | 4 +++ src/arch/mips/Kconfig | 4 +++ src/arch/riscv/Kconfig | 4 +++ src/arch/x86/Kconfig | 5 ++++ src/cpu/Kconfig | 12 +-------- src/drivers/Kconfig | 45 -------------------------------- src/drivers/pc80/Kconfig | 4 +++ src/drivers/ricoh/Kconfig | 1 + src/ec/Kconfig | 7 ----- src/ec/compal/Kconfig | 1 - src/ec/google/Kconfig | 1 - src/ec/kontron/Kconfig | 1 - src/ec/lenovo/Kconfig | 2 -- src/ec/quanta/Kconfig | 2 -- src/ec/smsc/Kconfig | 1 - src/northbridge/Kconfig | 5 ---- src/northbridge/amd/Kconfig | 7 ----- src/northbridge/amd/agesa/Kconfig | 8 +----- src/northbridge/dmp/Kconfig | 20 -------------- src/northbridge/intel/Kconfig | 17 ------------ src/northbridge/rdc/Kconfig | 1 - src/northbridge/via/Kconfig | 4 --- src/soc/Kconfig | 7 ----- src/soc/imgtec/Kconfig | 1 - src/soc/intel/Kconfig | 4 --- src/soc/nvidia/Kconfig | 2 -- src/soc/qualcomm/Kconfig | 9 ------- src/soc/qualcomm/ipq806x/Kconfig | 8 ++++++ src/soc/rockchip/Kconfig | 20 -------------- src/soc/samsung/Kconfig | 2 -- src/soc/ucb/Kconfig | 1 - src/southbridge/Kconfig | 10 ------- src/southbridge/amd/Kconfig | 15 ----------- src/southbridge/broadcom/Kconfig | 3 --- src/southbridge/dmp/Kconfig | 20 -------------- src/southbridge/intel/Kconfig | 18 ------------- src/southbridge/nvidia/Kconfig | 2 -- src/southbridge/rdc/Kconfig | 1 - src/southbridge/ricoh/Kconfig | 1 - src/southbridge/sis/Kconfig | 1 - src/southbridge/ti/Kconfig | 22 ---------------- src/southbridge/via/Kconfig | 2 -- src/superio/Kconfig | 32 ----------------------- src/superio/smsc/Kconfig | 3 +++ 46 files changed, 53 insertions(+), 346 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index aa4d6ee..cc87aec 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -255,39 +255,11 @@ config UPDATE_IMAGE endmenu -source src/mainboard/Kconfig +source "src/mainboard/Kconfig" -# This option is used to set the architecture of a mainboard to X86. -# It is usually set in mainboard/*/Kconfig. -config ARCH_X86 - bool - default n - select PCI - -config ARCH_ARM - bool - default n - -config ARCH_ARM64 - bool - default n - -config ARCH_RISCV - bool - default n - select ANY_TOOLCHAIN - -config ARCH_MIPS - bool - default n - -source src/arch/x86/Kconfig -source src/arch/arm/Kconfig -source src/arch/arm64/Kconfig -source src/arch/riscv/Kconfig -source src/arch/mips/Kconfig +source "src/arch/*/Kconfig" -source src/vendorcode/Kconfig +source "src/vendorcode/*/Kconfig" config SYSTEM_TYPE_LAPTOP default n @@ -296,18 +268,19 @@ config SYSTEM_TYPE_LAPTOP menu "Chipset" comment "CPU" -source src/cpu/Kconfig +source "src/cpu/Kconfig" comment "Northbridge" -source src/northbridge/Kconfig +source "src/northbridge/*/*/Kconfig" comment "Southbridge" -source src/southbridge/Kconfig +source "src/southbridge/*/*/Kconfig" comment "Super I/O" -source src/superio/Kconfig +source "src/superio/*/Kconfig" comment "Embedded Controllers" -source src/ec/Kconfig +source "src/ec/acpi/Kconfig" +source "src/ec/*/*/Kconfig" comment "SoC" -source src/soc/Kconfig -source src/drivers/intel/fsp/Kconfig +source "src/soc/*/*/Kconfig" +source "src/drivers/intel/fsp/Kconfig" endmenu @@ -319,10 +292,10 @@ config MAINBOARD_HAS_BOOTBLOCK_INIT bool default n -source src/device/Kconfig +source "src/device/Kconfig" menu "Generic Drivers" -source src/drivers/Kconfig +source "src/drivers/*/Kconfig" endmenu config TPM @@ -365,7 +338,7 @@ config BOOTMODE_STRAPS bool default n -source src/console/Kconfig +source "src/console/Kconfig" config HAVE_ACPI_RESUME bool diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig index 77ed41a..2499d2d 100644 --- a/src/arch/arm/Kconfig +++ b/src/arch/arm/Kconfig @@ -1,3 +1,7 @@ +config ARCH_ARM + bool + default n + config ARCH_BOOTBLOCK_ARM bool default n diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 16830bc..47e7b67 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -1,3 +1,7 @@ +config ARCH_ARM64 + bool + default n + config ARCH_BOOTBLOCK_ARM64 bool default n diff --git a/src/arch/mips/Kconfig b/src/arch/mips/Kconfig index 5c0fc5c..10349f2 100644 --- a/src/arch/mips/Kconfig +++ b/src/arch/mips/Kconfig @@ -19,6 +19,10 @@ # MA 02110-1301 USA # +config ARCH_MIPS + bool + default n + config ARCH_BOOTBLOCK_MIPS bool default n diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index f2dc41e..5d7b5c2 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -1,3 +1,7 @@ +config ARCH_RISCV + bool + default n + config ARCH_BOOTBLOCK_RISCV bool default n diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 93474a8..f7da89a 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -13,6 +13,11 @@ ## GNU General Public License for more details. ## +config ARCH_X86 + bool + default n + select PCI + config ARCH_BOOTBLOCK_X86_32 bool default n diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index f6f0647..c8dc136 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -2,17 +2,7 @@ # The if controls how the evaluation occurs. # (See also src/Kconfig) -source src/cpu/allwinner/Kconfig -source src/cpu/armltd/Kconfig -source src/cpu/ti/Kconfig - -source src/cpu/amd/Kconfig -source src/cpu/dmp/Kconfig -source src/cpu/intel/Kconfig -source src/cpu/mips/Kconfig -source src/cpu/via/Kconfig -source src/cpu/qemu-x86/Kconfig -source src/cpu/x86/Kconfig +source "src/cpu/*/Kconfig" if ARCH_X86 diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig deleted file mode 100644 index 435ed0e..0000000 --- a/src/drivers/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Rudolf Marek <r.marek(a)assembler.cz> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -source src/drivers/ams/Kconfig -source src/drivers/ati/Kconfig -source src/drivers/dec/Kconfig -source src/drivers/elog/Kconfig -source src/drivers/emulation/Kconfig -source src/drivers/generic/Kconfig -source src/drivers/gic/Kconfig -source src/drivers/i2c/Kconfig -source src/drivers/ics/Kconfig -source src/drivers/intel/Kconfig -source src/drivers/ipmi/Kconfig -source src/drivers/lenovo/Kconfig -source src/drivers/maxim/Kconfig -source src/drivers/parade/Kconfig -if PC80_SYSTEM -source src/drivers/pc80/Kconfig -endif -source src/drivers/sil/Kconfig -source src/drivers/spi/Kconfig -source src/drivers/ti/Kconfig -source src/drivers/trident/Kconfig -source src/drivers/uart/Kconfig -source src/drivers/usb/Kconfig -source src/drivers/xgi/Kconfig -source src/drivers/xpowers/Kconfig -source src/drivers/ricoh/rce822/Kconfig diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig index f8ac5c5..f6da88c 100644 --- a/src/drivers/pc80/Kconfig +++ b/src/drivers/pc80/Kconfig @@ -1,5 +1,7 @@ # Might be removed (alongside with the PS/2 init code) once payloads # reliably support PS/2 init themselves. +if PC80_SYSTEM + config DRIVERS_PS2_KEYBOARD bool "PS/2 keyboard init" default y @@ -26,3 +28,5 @@ config LPC_TPM config DRIVERS_MC146818 bool default y if ARCH_X86 + +endif diff --git a/src/drivers/ricoh/Kconfig b/src/drivers/ricoh/Kconfig new file mode 100644 index 0000000..6b05142 --- /dev/null +++ b/src/drivers/ricoh/Kconfig @@ -0,0 +1 @@ +source src/drivers/ricoh/rce822/Kconfig diff --git a/src/ec/Kconfig b/src/ec/Kconfig deleted file mode 100644 index 98aeb9c..0000000 --- a/src/ec/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -source src/ec/acpi/Kconfig -source src/ec/compal/Kconfig -source src/ec/google/Kconfig -source src/ec/kontron/Kconfig -source src/ec/lenovo/Kconfig -source src/ec/smsc/Kconfig -source src/ec/quanta/Kconfig diff --git a/src/ec/compal/Kconfig b/src/ec/compal/Kconfig deleted file mode 100644 index 5b7899a..0000000 --- a/src/ec/compal/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/ec/compal/ene932/Kconfig diff --git a/src/ec/google/Kconfig b/src/ec/google/Kconfig deleted file mode 100644 index f83741e..0000000 --- a/src/ec/google/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/ec/google/chromeec/Kconfig diff --git a/src/ec/kontron/Kconfig b/src/ec/kontron/Kconfig deleted file mode 100644 index 747a667..0000000 --- a/src/ec/kontron/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/ec/kontron/it8516e/Kconfig diff --git a/src/ec/lenovo/Kconfig b/src/ec/lenovo/Kconfig deleted file mode 100644 index 73f11ca..0000000 --- a/src/ec/lenovo/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/ec/lenovo/h8/Kconfig -source src/ec/lenovo/pmh7/Kconfig diff --git a/src/ec/quanta/Kconfig b/src/ec/quanta/Kconfig deleted file mode 100644 index 00c3dbf..0000000 --- a/src/ec/quanta/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/ec/quanta/ene_kb3940q/Kconfig -source src/ec/quanta/it8518/Kconfig diff --git a/src/ec/smsc/Kconfig b/src/ec/smsc/Kconfig deleted file mode 100644 index afc6e4b..0000000 --- a/src/ec/smsc/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/ec/smsc/mec1308/Kconfig diff --git a/src/northbridge/Kconfig b/src/northbridge/Kconfig deleted file mode 100644 index 0ac09a6..0000000 --- a/src/northbridge/Kconfig +++ /dev/null @@ -1,5 +0,0 @@ -source src/northbridge/amd/Kconfig -source src/northbridge/dmp/Kconfig -source src/northbridge/intel/Kconfig -source src/northbridge/rdc/Kconfig -source src/northbridge/via/Kconfig diff --git a/src/northbridge/amd/Kconfig b/src/northbridge/amd/Kconfig deleted file mode 100644 index 4bc6e49..0000000 --- a/src/northbridge/amd/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -source src/northbridge/amd/amdk8/Kconfig -source src/northbridge/amd/gx2/Kconfig -source src/northbridge/amd/amdfam10/Kconfig -source src/northbridge/amd/lx/Kconfig -source src/northbridge/amd/agesa/Kconfig -source src/northbridge/amd/cimx/Kconfig -source src/northbridge/amd/pi/Kconfig \ No newline at end of file diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig index 8fd8bfd..430d4ba 100644 --- a/src/northbridge/amd/agesa/Kconfig +++ b/src/northbridge/amd/agesa/Kconfig @@ -32,13 +32,7 @@ config S3_VGA_ROM_RUN bool default n -source src/northbridge/amd/agesa/family10/Kconfig -source src/northbridge/amd/agesa/family12/Kconfig -source src/northbridge/amd/agesa/family14/Kconfig -source src/northbridge/amd/agesa/family15/Kconfig -source src/northbridge/amd/agesa/family15tn/Kconfig -source src/northbridge/amd/agesa/family15rl/Kconfig -source src/northbridge/amd/agesa/family16kb/Kconfig +source "src/northbridge/amd/agesa/*/Kconfig" # TODO: Reservation for heap seems excessive config HEAP_SIZE diff --git a/src/northbridge/dmp/Kconfig b/src/northbridge/dmp/Kconfig deleted file mode 100644 index a69d1d9..0000000 --- a/src/northbridge/dmp/Kconfig +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2013 DMP Electronics Inc. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -source src/northbridge/dmp/vortex86ex/Kconfig diff --git a/src/northbridge/intel/Kconfig b/src/northbridge/intel/Kconfig deleted file mode 100644 index cf7264b..0000000 --- a/src/northbridge/intel/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -source src/northbridge/intel/e7501/Kconfig -source src/northbridge/intel/e7505/Kconfig -source src/northbridge/intel/i3100/Kconfig -source src/northbridge/intel/i440bx/Kconfig -source src/northbridge/intel/i440lx/Kconfig -source src/northbridge/intel/i82810/Kconfig -source src/northbridge/intel/i82830/Kconfig -source src/northbridge/intel/i855/Kconfig -source src/northbridge/intel/i945/Kconfig -source src/northbridge/intel/gm45/Kconfig -source src/northbridge/intel/sch/Kconfig -source src/northbridge/intel/i5000/Kconfig -source src/northbridge/intel/nehalem/Kconfig -source src/northbridge/intel/sandybridge/Kconfig -source src/northbridge/intel/haswell/Kconfig -source src/northbridge/intel/fsp_sandybridge/Kconfig -source src/northbridge/intel/fsp_rangeley/Kconfig diff --git a/src/northbridge/rdc/Kconfig b/src/northbridge/rdc/Kconfig deleted file mode 100644 index 73ac740..0000000 --- a/src/northbridge/rdc/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/northbridge/rdc/r8610/Kconfig diff --git a/src/northbridge/via/Kconfig b/src/northbridge/via/Kconfig deleted file mode 100644 index 7b9fa1d..0000000 --- a/src/northbridge/via/Kconfig +++ /dev/null @@ -1,4 +0,0 @@ -source src/northbridge/via/cn700/Kconfig -source src/northbridge/via/cx700/Kconfig -source src/northbridge/via/vx800/Kconfig -source src/northbridge/via/vx900/Kconfig diff --git a/src/soc/Kconfig b/src/soc/Kconfig deleted file mode 100644 index 43c2010..0000000 --- a/src/soc/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -source src/soc/imgtec/Kconfig -source src/soc/intel/Kconfig -source src/soc/nvidia/Kconfig -source src/soc/qualcomm/Kconfig -source src/soc/rockchip/Kconfig -source src/soc/samsung/Kconfig -source src/soc/ucb/Kconfig diff --git a/src/soc/imgtec/Kconfig b/src/soc/imgtec/Kconfig deleted file mode 100644 index df51850..0000000 --- a/src/soc/imgtec/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/soc/imgtec/pistachio/Kconfig diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig deleted file mode 100644 index 808f6b8..0000000 --- a/src/soc/intel/Kconfig +++ /dev/null @@ -1,4 +0,0 @@ -source src/soc/intel/baytrail/Kconfig -source src/soc/intel/broadwell/Kconfig -source src/soc/intel/fsp_baytrail/Kconfig -source src/soc/intel/common/Kconfig diff --git a/src/soc/nvidia/Kconfig b/src/soc/nvidia/Kconfig deleted file mode 100644 index cb1f468..0000000 --- a/src/soc/nvidia/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/soc/nvidia/tegra124/Kconfig -source src/soc/nvidia/tegra132/Kconfig diff --git a/src/soc/qualcomm/Kconfig b/src/soc/qualcomm/Kconfig deleted file mode 100644 index 918093b..0000000 --- a/src/soc/qualcomm/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -source src/soc/qualcomm/ipq806x/Kconfig - -config CBFS_SIZE - hex "Size of CBFS filesystem in ROM" - default ROM_SIZE - help - CBFS size needs to match the size of memory allocated to the - coreboot blob elsewhere in the system. Make sure this config option - is fine tuned in the board config file. diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 013d86c..35310fe 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -13,6 +13,14 @@ config SOC_QC_IPQ806X if SOC_QC_IPQ806X +config CBFS_SIZE + hex "Size of CBFS filesystem in ROM" + default ROM_SIZE + help + CBFS size needs to match the size of memory allocated to the + coreboot blob elsewhere in the system. Make sure this config option + is fine tuned in the board config file. + config BOOTBLOCK_ROM_OFFSET hex default 0x0 diff --git a/src/soc/rockchip/Kconfig b/src/soc/rockchip/Kconfig deleted file mode 100644 index b041f89..0000000 --- a/src/soc/rockchip/Kconfig +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright 2014 Rockchip Inc. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -source src/soc/rockchip/rk3288/Kconfig diff --git a/src/soc/samsung/Kconfig b/src/soc/samsung/Kconfig deleted file mode 100644 index 9241d27..0000000 --- a/src/soc/samsung/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/soc/samsung/exynos5250/Kconfig -source src/soc/samsung/exynos5420/Kconfig diff --git a/src/soc/ucb/Kconfig b/src/soc/ucb/Kconfig deleted file mode 100644 index 7af50cb..0000000 --- a/src/soc/ucb/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/soc/ucb/riscv/Kconfig diff --git a/src/southbridge/Kconfig b/src/southbridge/Kconfig deleted file mode 100644 index 84b5f8d..0000000 --- a/src/southbridge/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -source src/southbridge/amd/Kconfig -source src/southbridge/broadcom/Kconfig -source src/southbridge/dmp/Kconfig -source src/southbridge/intel/Kconfig -source src/southbridge/nvidia/Kconfig -source src/southbridge/rdc/Kconfig -source src/southbridge/ricoh/Kconfig -source src/southbridge/sis/Kconfig -source src/southbridge/ti/Kconfig -source src/southbridge/via/Kconfig diff --git a/src/southbridge/amd/Kconfig b/src/southbridge/amd/Kconfig deleted file mode 100644 index feb9006..0000000 --- a/src/southbridge/amd/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -source src/southbridge/amd/amd8111/Kconfig -source src/southbridge/amd/amd8131/Kconfig -source src/southbridge/amd/cs5536/Kconfig -source src/southbridge/amd/amd8132/Kconfig -source src/southbridge/amd/amd8151/Kconfig -source src/southbridge/amd/cs5535/Kconfig -source src/southbridge/amd/rs690/Kconfig -source src/southbridge/amd/sb600/Kconfig -source src/southbridge/amd/rs780/Kconfig -source src/southbridge/amd/sb700/Kconfig -source src/southbridge/amd/sb800/Kconfig -source src/southbridge/amd/cimx/Kconfig -source src/southbridge/amd/agesa/Kconfig -source src/southbridge/amd/pi/Kconfig -source src/southbridge/amd/sr5650/Kconfig diff --git a/src/southbridge/broadcom/Kconfig b/src/southbridge/broadcom/Kconfig deleted file mode 100644 index 38ff222..0000000 --- a/src/southbridge/broadcom/Kconfig +++ /dev/null @@ -1,3 +0,0 @@ -source src/southbridge/broadcom/bcm21000/Kconfig -source src/southbridge/broadcom/bcm5780/Kconfig -source src/southbridge/broadcom/bcm5785/Kconfig diff --git a/src/southbridge/dmp/Kconfig b/src/southbridge/dmp/Kconfig deleted file mode 100644 index 1c5b8c7..0000000 --- a/src/southbridge/dmp/Kconfig +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2013 DMP Electronics Inc. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -source src/southbridge/dmp/vortex86ex/Kconfig diff --git a/src/southbridge/intel/Kconfig b/src/southbridge/intel/Kconfig deleted file mode 100644 index 426ac0b..0000000 --- a/src/southbridge/intel/Kconfig +++ /dev/null @@ -1,18 +0,0 @@ -source src/southbridge/intel/common/Kconfig -source src/southbridge/intel/esb6300/Kconfig -source src/southbridge/intel/i3100/Kconfig -source src/southbridge/intel/i82371eb/Kconfig -source src/southbridge/intel/i82801ax/Kconfig -source src/southbridge/intel/i82801bx/Kconfig -source src/southbridge/intel/i82801cx/Kconfig -source src/southbridge/intel/i82801dx/Kconfig -source src/southbridge/intel/i82801ex/Kconfig -source src/southbridge/intel/i82801gx/Kconfig -source src/southbridge/intel/i82801ix/Kconfig -source src/southbridge/intel/i82870/Kconfig -source src/southbridge/intel/sch/Kconfig -source src/southbridge/intel/bd82x6x/Kconfig -source src/southbridge/intel/ibexpeak/Kconfig -source src/southbridge/intel/lynxpoint/Kconfig -source src/southbridge/intel/fsp_bd82x6x/Kconfig -source src/southbridge/intel/fsp_rangeley/Kconfig diff --git a/src/southbridge/nvidia/Kconfig b/src/southbridge/nvidia/Kconfig deleted file mode 100644 index 59fc8ed..0000000 --- a/src/southbridge/nvidia/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/southbridge/nvidia/ck804/Kconfig -source src/southbridge/nvidia/mcp55/Kconfig diff --git a/src/southbridge/rdc/Kconfig b/src/southbridge/rdc/Kconfig deleted file mode 100644 index 50ef475..0000000 --- a/src/southbridge/rdc/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/southbridge/rdc/r8610/Kconfig diff --git a/src/southbridge/ricoh/Kconfig b/src/southbridge/ricoh/Kconfig deleted file mode 100644 index 2d25e9e..0000000 --- a/src/southbridge/ricoh/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/southbridge/ricoh/rl5c476/Kconfig diff --git a/src/southbridge/sis/Kconfig b/src/southbridge/sis/Kconfig deleted file mode 100644 index 4d11384..0000000 --- a/src/southbridge/sis/Kconfig +++ /dev/null @@ -1 +0,0 @@ -source src/southbridge/sis/sis966/Kconfig diff --git a/src/southbridge/ti/Kconfig b/src/southbridge/ti/Kconfig deleted file mode 100644 index 7092685..0000000 --- a/src/southbridge/ti/Kconfig +++ /dev/null @@ -1,22 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2008-2009 coresystems GmbH -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -source src/southbridge/ti/pci7420/Kconfig -source src/southbridge/ti/pcixx12/Kconfig -source src/southbridge/ti/pci1x2x/Kconfig diff --git a/src/southbridge/via/Kconfig b/src/southbridge/via/Kconfig deleted file mode 100644 index 75a1395..0000000 --- a/src/southbridge/via/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -source src/southbridge/via/k8t890/Kconfig -source src/southbridge/via/vt8237r/Kconfig diff --git a/src/superio/Kconfig b/src/superio/Kconfig deleted file mode 100644 index 32e60bb..0000000 --- a/src/superio/Kconfig +++ /dev/null @@ -1,32 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Ronald G. Minnich -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -config SUPERIO_WANTS_14MHZ_CLOCK - bool - -source src/superio/fintek/Kconfig -source src/superio/intel/Kconfig -source src/superio/ite/Kconfig -source src/superio/nsc/Kconfig -source src/superio/nuvoton/Kconfig -source src/superio/renesas/Kconfig -source src/superio/serverengines/Kconfig -source src/superio/smsc/Kconfig -source src/superio/via/Kconfig -source src/superio/winbond/Kconfig diff --git a/src/superio/smsc/Kconfig b/src/superio/smsc/Kconfig index 34bc60c..7a58cbb 100644 --- a/src/superio/smsc/Kconfig +++ b/src/superio/smsc/Kconfig @@ -18,6 +18,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +config SUPERIO_WANTS_14MHZ_CLOCK + bool + config SUPERIO_SMSC_FDC37M60X bool config SUPERIO_SMSC_FDC37N972

1 0

Patch set updated for coreboot: 3b789ca kconfig: example of how to automatically include mainboards
by Stefan Reinauer 04 Apr '15

04 Apr '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9295 -gerrit commit 3b789ca332fd7c46f5f5b04be7fb70fa6701cff4 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Apr 3 20:11:13 2015 +0200 kconfig: example of how to automatically include mainboards This is an unfinished example that shows how vendor and mainboard directories could be "drop in", e.g. be placed in coreboot without having to modify any higher level coreboot files. DO NOT COMMIT! This is only a demonstration of what's possible. If we decide to go down this road, there is a lot more to do. Change-Id: Ib68ce1478a2e12562aeac6297128a21eb174d58a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- src/mainboard/Kconfig | 69 +------------------------------ src/mainboard/google/Kconfig | 25 +---------- src/mainboard/google/Kconfig.name | 2 + src/mainboard/google/panther/Kconfig.name | 2 + 4 files changed, 8 insertions(+), 90 deletions(-) diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index 610bfbb..91eb6a8 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -60,8 +60,7 @@ config VENDOR_GIGABYTE bool "GIGABYTE" config VENDOR_GIZMOSPHERE bool "GizmoSphere" -config VENDOR_GOOGLE - bool "Google" +source src/mainboard/google/Kconfig.name config VENDOR_HP bool "HP" config VENDOR_IBASE @@ -137,71 +136,7 @@ config VENDOR_WYSE endchoice -source "src/mainboard/a-trend/Kconfig" -source "src/mainboard/aaeon/Kconfig" -source "src/mainboard/abit/Kconfig" -source "src/mainboard/adlink/Kconfig" -source "src/mainboard/advansus/Kconfig" -source "src/mainboard/amd/Kconfig" -source "src/mainboard/aopen/Kconfig" -source "src/mainboard/apple/Kconfig" -source "src/mainboard/arima/Kconfig" -source "src/mainboard/artecgroup/Kconfig" -source "src/mainboard/asrock/Kconfig" -source "src/mainboard/asus/Kconfig" -source "src/mainboard/avalue/Kconfig" -source "src/mainboard/azza/Kconfig" -source "src/mainboard/bachmann/Kconfig" -source "src/mainboard/bcom/Kconfig" -source "src/mainboard/bifferos/Kconfig" -source "src/mainboard/biostar/Kconfig" -source "src/mainboard/broadcom/Kconfig" -source "src/mainboard/compaq/Kconfig" -source "src/mainboard/cubietech/Kconfig" -source "src/mainboard/digitallogic/Kconfig" -source "src/mainboard/dmp/Kconfig" -source "src/mainboard/ecs/Kconfig" -source "src/mainboard/emulation/Kconfig" -source "src/mainboard/getac/Kconfig" -source "src/mainboard/gigabyte/Kconfig" -source "src/mainboard/gizmosphere/Kconfig" -source "src/mainboard/google/Kconfig" -source "src/mainboard/hp/Kconfig" -source "src/mainboard/ibase/Kconfig" -source "src/mainboard/ibm/Kconfig" -source "src/mainboard/iei/Kconfig" -source "src/mainboard/intel/Kconfig" -source "src/mainboard/iwave/Kconfig" -source "src/mainboard/iwill/Kconfig" -source "src/mainboard/jetway/Kconfig" -source "src/mainboard/kontron/Kconfig" -source "src/mainboard/lanner/Kconfig" -source "src/mainboard/lenovo/Kconfig" -source "src/mainboard/linutop/Kconfig" -source "src/mainboard/lippert/Kconfig" -source "src/mainboard/mitac/Kconfig" -source "src/mainboard/msi/Kconfig" -source "src/mainboard/nec/Kconfig" -source "src/mainboard/newisys/Kconfig" -source "src/mainboard/nokia/Kconfig" -source "src/mainboard/nvidia/Kconfig" -source "src/mainboard/packardbell/Kconfig" -source "src/mainboard/pcengines/Kconfig" -source "src/mainboard/rca/Kconfig" -source "src/mainboard/roda/Kconfig" -source "src/mainboard/samsung/Kconfig" -source "src/mainboard/siemens/Kconfig" -source "src/mainboard/soyo/Kconfig" -source "src/mainboard/sunw/Kconfig" -source "src/mainboard/supermicro/Kconfig" -source "src/mainboard/technexion/Kconfig" -source "src/mainboard/thomson/Kconfig" -source "src/mainboard/ti/Kconfig" -source "src/mainboard/traverse/Kconfig" -source "src/mainboard/tyan/Kconfig" -source "src/mainboard/via/Kconfig" -source "src/mainboard/winent/Kconfig" -source "src/mainboard/wyse/Kconfig" +source "src/mainboard/*/Kconfig" config BOARD_ROMSIZE_KB_64 bool diff --git a/src/mainboard/google/Kconfig b/src/mainboard/google/Kconfig index c193d81..2d1bba0 100644 --- a/src/mainboard/google/Kconfig +++ b/src/mainboard/google/Kconfig @@ -37,8 +37,7 @@ config BOARD_GOOGLE_NYAN_BIG bool "Nyan Big" config BOARD_GOOGLE_NYAN_BLAZE bool "Nyan Blaze" -config BOARD_GOOGLE_PANTHER - bool "Panther" +source src/mainboard/google/panther/Kconfig.name config BOARD_GOOGLE_PARROT bool "Parrot" config BOARD_GOOGLE_PEACH_PIT @@ -66,27 +65,7 @@ config BOARD_GOOGLE_VEYRON_PINKY endchoice -source "src/mainboard/google/bolt/Kconfig" -source "src/mainboard/google/butterfly/Kconfig" -source "src/mainboard/google/daisy/Kconfig" -source "src/mainboard/google/falco/Kconfig" -source "src/mainboard/google/link/Kconfig" -source "src/mainboard/google/nyan/Kconfig" -source "src/mainboard/google/nyan_big/Kconfig" -source "src/mainboard/google/nyan_blaze/Kconfig" -source "src/mainboard/google/panther/Kconfig" -source "src/mainboard/google/parrot/Kconfig" -source "src/mainboard/google/peach_pit/Kconfig" -source "src/mainboard/google/peppy/Kconfig" -source "src/mainboard/google/rambi/Kconfig" -source "src/mainboard/google/rush/Kconfig" -source "src/mainboard/google/rush_ryu/Kconfig" -source "src/mainboard/google/samus/Kconfig" -source "src/mainboard/google/slippy/Kconfig" -source "src/mainboard/google/storm/Kconfig" -source "src/mainboard/google/stout/Kconfig" -source "src/mainboard/google/urara/Kconfig" -source "src/mainboard/google/veyron_pinky/Kconfig" +source "src/mainboard/google/*/Kconfig" config MAINBOARD_VENDOR string "Mainboard Vendor" diff --git a/src/mainboard/google/Kconfig.name b/src/mainboard/google/Kconfig.name new file mode 100644 index 0000000..6ae874b --- /dev/null +++ b/src/mainboard/google/Kconfig.name @@ -0,0 +1,2 @@ +config VENDOR_GOOGLE + bool "Google" diff --git a/src/mainboard/google/panther/Kconfig.name b/src/mainboard/google/panther/Kconfig.name new file mode 100644 index 0000000..c8cd14b --- /dev/null +++ b/src/mainboard/google/panther/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_GOOGLE_PANTHER + bool "Panther"

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New patch to review for coreboot: eb139a3 baytrail: Fix hdmi audio choppy issue
by Marc Jones 03 Apr '15

03 Apr '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9297 -gerrit commit eb139a3339bbe6815b4e1c739049923390135f4b Author: Kein Yuan <kein.yuan(a)intel.com> Date: Tue Feb 11 17:40:31 2014 -0800 baytrail: Fix hdmi audio choppy issue Disable VC setting for HDA so hdmi audio choppy issue will be eliminated. Change HDA initialize steps to sync with UEFI reference code. BUG=chrome-os-partner:25651 BRANCH=Baytrail TEST=Does not have choppy noise during video playing Original-Signed-off-by: Kein Yuan <kein.yuan(a)intel.com> Original-Change-Id: I45d49123d369b7d075776215e709af5801ea696d Original-Reviewed-on: https://chromium-review.googlesource.com/186024 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: Benson Leung <bleung(a)chromium.org> Original-Tested-by: Benson Leung <bleung(a)chromium.org> Original-Commit-Queue: Bernie Thompson <bhthompson(a)chromium.org> (cherry picked from commit 9f725a40f77cd684b2e230bd226d78d87b56e73b) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I4fc10a161e5996e14d4823491fb62a7beff39bcc --- src/soc/intel/baytrail/hda.c | 5 ----- src/soc/intel/common/hda_verb.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c index 010150f..9e4140d 100644 --- a/src/soc/intel/baytrail/hda.c +++ b/src/soc/intel/baytrail/hda.c @@ -31,11 +31,6 @@ #include <baytrail/ramstage.h> static const struct reg_script init_ops[] = { - /* Set up VC0 and VC1. */ - REG_MMIO_WRITE32(RCBA_BASE_ADDRESS + 0x24, 0x80000019), - REG_MMIO_WRITE32(RCBA_BASE_ADDRESS + 0x28, 0x81000022), - /* Enable VCi */ - REG_PCI_WRITE32(0x120, 0x81000022), /* Enable no snoop traffic. */ REG_PCI_OR16(0x78, 1 << 11), /* Configure HDMI codec connection. */ diff --git a/src/soc/intel/common/hda_verb.c b/src/soc/intel/common/hda_verb.c index bd61cee..2523b41 100644 --- a/src/soc/intel/common/hda_verb.c +++ b/src/soc/intel/common/hda_verb.c @@ -70,6 +70,19 @@ int hda_codec_detect(u8 *base) /* Write back the value once reset bit is set. */ write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG)); + /* Clear the "State Change Status Register" STATESTS bits + * for each of the "SDIN Stat Change Status Flag" + */ + write8(base + HDA_STATESTS_REG, 0xf); + + /* Turn off the link and poll RESET# bit until it reads back as 0 */ + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, ~HDA_GCTL_CRST) < 0) + goto no_codec; + + /* Turn on the link and poll RESET# bit until it reads back as 1 */ + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) + goto no_codec; + /* Read in Codec location (BAR + 0xe)[2..0]*/ reg8 = read8(base + HDA_STATESTS_REG); reg8 &= 0x0f;

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New patch to review for coreboot: e8058d9 baytrail: reinitialize spi controller in SMM finalization
by Marc Jones 03 Apr '15

03 Apr '15

Marc Jones (marc.jones(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9296 -gerrit commit e8058d975cbe181035f3481a1d6d7f0baff9f8d4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Feb 9 16:04:06 2014 -0600 baytrail: reinitialize spi controller in SMM finalization On the SMM APM_CNT_FINALIZE step re-initialize the SPI controller so that it can still log events after the SPI controller has been locked down. BUG=chrome-os-partner:24624 BRANCH=baytrail TEST=Built and booted. Events still logged after SPI controller has been locked down. Original-Change-Id: I41a3e12c0398303e74f95eb6df82d5bc4303898b Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/185630 Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> (cherry picked from commit 28ffb1a9e761cdfeb173bd533684db1011260e0a) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ia82753cba9ae4f049de2e81061739efc21d49a1e --- src/soc/intel/baytrail/smihandler.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index a2718e2..0641907 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -26,6 +26,7 @@ #include <device/pci_def.h> #include <elog.h> #include <halt.h> +#include <spi-generic.h> #include <baytrail/pci_devs.h> #include <baytrail/pmc.h> @@ -232,6 +233,23 @@ static void southbridge_smi_gsmi(void) *ret = gsmi_exec(sub_command, param); } #endif + +static void finalize(void) +{ + static int finalize_done; + + if (finalize_done) { + printk(BIOS_DEBUG, "SMM already finalized.\n"); + return; + } + finalize_done = 1; + +#if CONFIG_SPI_FLASH_SMM + /* Re-init SPI driver to handle locked BAR */ + spi_init(); +#endif +} + static void southbridge_smi_apmc(void) { uint8_t reg8; @@ -282,6 +300,9 @@ static void southbridge_smi_apmc(void) southbridge_smi_gsmi(); break; #endif + case APM_CNT_FINALIZE: + finalize(); + break; } mainboard_smi_apmc(reg8);

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Patch merged into coreboot/master: f430546 build system: Introduce manual file type
by gerrit＠coreboot.org 03 Apr '15

03 Apr '15

the following patch was just integrated into master: commit f4305468d7c49698548babb7366a3b3d813771d2 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Apr 3 10:39:05 2015 +0200 build system: Introduce manual file type It's used for files with custom build rules, eg. the objcopy stuff surrounding smm and sipi_vector. Change-Id: Ie9ab4c9c6008ca42f82f768c5f33f90c7f5f4db5 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/9287 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9287 for details. -gerrit

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Patch merged into coreboot/master: 416ab38 build system: Allow defining generic rules
by gerrit＠coreboot.org 03 Apr '15

03 Apr '15

the following patch was just integrated into master: commit 416ab38ea47b5f41b918292b64843e63c100e53c Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Fri Apr 3 10:19:38 2015 +0200 build system: Allow defining generic rules Provide a mechanism to define rules that apply for a given filetype (.c, .asl, ...) across all classes (ramstage, ...) Change-Id: If45c526d294e0374c32efef01f0213c6b78b1e43 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Reviewed-on: http://review.coreboot.org/9286 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/9286 for details. -gerrit

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