Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9394
-gerrit
commit 3a004a9a446228c5d1fffea464b44a76cd170cdc
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Nov 5 10:23:33 2014 -0600
arm64: secmon: wait for all CPUs to enter secmon
There is state within the system that relies on having
all CPUs present in order to proceed with initialization.
The current expectation is that all CPUs are online and
entering the secure monitor. Therefore, wait until all
CONFIG_MAX_CPUs show up.
BUG=chrome-os-partner:32112
BRANCH=None
TEST=Can get all CPUs up in kernel using PSCI.
Change-Id: I741a09128e99e0cb0c9f4046b1c0d27582fda963
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 030535b7c9821b40bf4a51f88e289eab8af9aa13
Original-Change-Id: Ia0f744c93766efc694b522ab0af9aedf7329ac43
Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/227547
Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org>
---
src/arch/arm64/armv8/secmon/secmon_init.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/src/arch/arm64/armv8/secmon/secmon_init.c b/src/arch/arm64/armv8/secmon/secmon_init.c
index 2ec2f13..fb3422f 100644
--- a/src/arch/arm64/armv8/secmon/secmon_init.c
+++ b/src/arch/arm64/armv8/secmon/secmon_init.c
@@ -53,6 +53,24 @@ static void cpu_init(int bsp)
cpu_set_bsp();
}
+static void wait_for_all_cpus(void)
+{
+ int all_online;
+
+ while (1) {
+ int i;
+
+ all_online = 1;
+ for (i = 0; i < CONFIG_MAX_CPUS; i++) {
+ if (!cpu_online(cpu_info_for_cpu(i)))
+ all_online = 0;
+ }
+
+ if (all_online)
+ break;
+ }
+}
+
static void secmon_init(struct secmon_params *params, int bsp)
{
struct cpu_action action = {
@@ -67,6 +85,9 @@ static void secmon_init(struct secmon_params *params, int bsp)
if (!cpu_is_bsp())
secmon_wait_for_action();
+ /* Wait for all CPUs to enter secmon. */
+ wait_for_all_cpus();
+
smc_init();
psci_init();
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9448
-gerrit
commit c995d0be778d8406c7bfdb37264d72165b9df37a
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Thu Apr 9 13:31:02 2015 +0200
ipq806x: Remove extra INCLUDES
That variable isn't used anymore and the include statement
is already covered in CPPFLAGS_common further down that file.
Change-Id: I3e4fd3281dc0d3f73b238e121dbdfc0d29102b27
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/soc/qualcomm/ipq806x/Makefile.inc | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 6ee925c..5dfca4d 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -40,8 +40,6 @@ ramstage-y += timer.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += usb.c
-INCLUDES += -Isrc/soc/qualcomm/ipq806x/include/
-
ifeq ($(CONFIG_USE_BLOBS),y)
# Generate the actual coreboot bootblock code
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9425
-gerrit
commit 554403666499a0f464d240451d93d4e294a09e94
Author: Furquan Shaikh <furquan(a)google.com>
Date: Wed Nov 12 16:23:00 2014 -0800
rtc: Add an RTC driver for the TI TPS65913 PMIC.
The TPS65913 PMIC has an RTC built into it. This change adds
a driver for it which implements the new RTC API.
BUG=chrome-os-partner:33764
BRANCH=None
TEST=Compiles and boots to kernel prompt on ryu. Timestamps for event log
verified across multiple boots.
Change-Id: I49ec9b78afc53f1cbd4be09e448cdae6077fb710
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: c16c11e620c830e7a73a2a24fe4823ccea0f3c39
Original-Change-Id: If1d549ea2361d0de6be75fd24b9e9810a6df7457
Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/229414
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org>
---
src/drivers/ti/Kconfig | 1 +
src/drivers/ti/Makefile.inc | 2 +
src/drivers/ti/tps65913/Kconfig | 35 ++++++++
src/drivers/ti/tps65913/Makefile.inc | 20 +++++
src/drivers/ti/tps65913/tps65913rtc.c | 155 ++++++++++++++++++++++++++++++++++
5 files changed, 213 insertions(+)
diff --git a/src/drivers/ti/Kconfig b/src/drivers/ti/Kconfig
index b3aded8..42ead03 100644
--- a/src/drivers/ti/Kconfig
+++ b/src/drivers/ti/Kconfig
@@ -18,3 +18,4 @@
##
source src/drivers/ti/tps65090/Kconfig
+source src/drivers/ti/tps65913/Kconfig
diff --git a/src/drivers/ti/Makefile.inc b/src/drivers/ti/Makefile.inc
index c0ed9c0..037da94 100644
--- a/src/drivers/ti/Makefile.inc
+++ b/src/drivers/ti/Makefile.inc
@@ -2,6 +2,7 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The Chromium OS Authors.
+## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -18,3 +19,4 @@
##
subdirs-$(CONFIG_DRIVER_TI_TPS65090) += tps65090/
+subdirs-$(CONFIG_DRIVERS_TI_TPS65913) += tps65913/
diff --git a/src/drivers/ti/tps65913/Kconfig b/src/drivers/ti/tps65913/Kconfig
new file mode 100644
index 0000000..bd24bae
--- /dev/null
+++ b/src/drivers/ti/tps65913/Kconfig
@@ -0,0 +1,35 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+config DRIVERS_TI_TPS65913
+ bool "TI TPS65913 support"
+ default n
+
+config DRIVERS_TI_TPS65913_RTC
+ bool "TI TPS65913 RTC support"
+ default n
+ select DRIVERS_TI_TPS65913
+
+config DRIVERS_TI_TPS65913_RTC_BUS
+ int "TI TPS65913 RTC bus"
+ depends on DRIVERS_TI_TPS65913_RTC
+
+config DRIVERS_TI_TPS65913_RTC_ADDR
+ hex "TI TPS65913 RTC chip address"
+ depends on DRIVERS_TI_TPS65913_RTC
diff --git a/src/drivers/ti/tps65913/Makefile.inc b/src/drivers/ti/tps65913/Makefile.inc
new file mode 100644
index 0000000..272b026
--- /dev/null
+++ b/src/drivers/ti/tps65913/Makefile.inc
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_DRIVERS_TI_TPS65913_RTC) += tps65913rtc.c
diff --git a/src/drivers/ti/tps65913/tps65913rtc.c b/src/drivers/ti/tps65913/tps65913rtc.c
new file mode 100644
index 0000000..46dd4f9
--- /dev/null
+++ b/src/drivers/ti/tps65913/tps65913rtc.c
@@ -0,0 +1,155 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <bcd.h>
+#include <console/console.h>
+#include <device/i2c.h>
+#include <rtc.h>
+#include <stdint.h>
+
+enum TPS65913_RTC_REG {
+ TPS65913_SECONDS_REG = 0x00,
+ TPS65913_MINUTES_REG = 0x01,
+ TPS65913_HOURS_REG = 0x02,
+ TPS65913_DAYS_REG = 0x03,
+ TPS65913_MONTHS_REG = 0x04,
+ TPS65913_YEARS_REG = 0x05,
+ TPS65913_WEEKS_REG = 0x06,
+ TPS65913_RTC_CTRL_REG = 0x10,
+ TPS65913_RTC_STATUS_REG = 0x11,
+ TPS65913_RTC_INTERRUPS_REG = 0x12,
+};
+
+enum {
+ TPS65913_RTC_CTRL_STOP = (1 << 0),
+ TPS65913_RTC_CTRL_GET_TIME = (1 << 6),
+
+ TPS65913_RTC_STATUS_RUN = (1 << 1),
+ TPS65913_RTC_RUNNING = (1 << 1),
+ TPS65913_RTC_FROZEN = (0 << 1),
+};
+
+static inline uint8_t tps65913_read(enum TPS65913_RTC_REG reg)
+{
+ uint8_t val;
+ i2c_readb(CONFIG_DRIVERS_TI_TPS65913_RTC_BUS,
+ CONFIG_DRIVERS_TI_TPS65913_RTC_ADDR, reg, &val);
+ return val;
+}
+
+static inline void tps65913_write(enum TPS65913_RTC_REG reg, uint8_t val)
+{
+ i2c_writeb(CONFIG_DRIVERS_TI_TPS65913_RTC_BUS,
+ CONFIG_DRIVERS_TI_TPS65913_RTC_ADDR, reg, val);
+}
+
+static void tps65913_rtc_ctrl_clear(uint8_t bit)
+{
+ uint8_t control = tps65913_read(TPS65913_RTC_CTRL_REG);
+
+ control &= ~bit;
+ tps65913_write(TPS65913_RTC_CTRL_REG, control);
+}
+
+static void tps65913_rtc_ctrl_set(uint8_t bit)
+{
+ uint8_t control = tps65913_read(TPS65913_RTC_CTRL_REG);
+
+ control |= TPS65913_RTC_CTRL_GET_TIME;
+ tps65913_write(TPS65913_RTC_CTRL_REG, control);
+}
+
+static int tps65913_is_rtc_running(void)
+{
+ uint8_t status = tps65913_read(TPS65913_RTC_STATUS_REG);
+ return ((status & TPS65913_RTC_STATUS_RUN) == TPS65913_RTC_RUNNING);
+}
+
+/*
+ * This function ensures that current time is copied to shadow registers. Then a
+ * normal read on TC registers reads from the shadow instead of current TC
+ * registers. This helps prevent the accidental change in counters while
+ * reading. In order to ensure that the current TC registers are copied into
+ * shadow registers, GET_TIME bit needs to be set to 0 and then to 1.
+ */
+static void tps65913_rtc_shadow(void)
+{
+ tps65913_rtc_ctrl_clear(TPS65913_RTC_CTRL_GET_TIME);
+ tps65913_rtc_ctrl_set(TPS65913_RTC_CTRL_GET_TIME);
+}
+
+static int tps65913_rtc_stop(void)
+{
+ /* Clearing stop bit freezes RTC */
+ tps65913_rtc_ctrl_clear(TPS65913_RTC_CTRL_STOP);
+
+ if (tps65913_is_rtc_running()) {
+ printk(BIOS_ERR, "Could not stop RTC\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+static int tps65913_rtc_start(void)
+{
+ /* Setting stop bit starts RTC */
+ tps65913_rtc_ctrl_set(TPS65913_RTC_CTRL_STOP);
+
+ if (!tps65913_is_rtc_running()) {
+ printk(BIOS_ERR, "Could not start RTC\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+int rtc_set(const struct rtc_time *time)
+{
+ /* Before setting the time, ensure that rtc is stopped */
+ if (tps65913_rtc_stop())
+ return 1;
+
+ tps65913_write(TPS65913_SECONDS_REG, bin2bcd(time->sec));
+ tps65913_write(TPS65913_MINUTES_REG, bin2bcd(time->min));
+ tps65913_write(TPS65913_HOURS_REG, bin2bcd(time->hour));
+ tps65913_write(TPS65913_DAYS_REG, bin2bcd(time->mday));
+ tps65913_write(TPS65913_MONTHS_REG, bin2bcd(time->mon));
+ tps65913_write(TPS65913_YEARS_REG, bin2bcd(time->year));
+
+ /* Re-start rtc */
+ if (tps65913_rtc_start())
+ return 1;
+
+ return 0;
+}
+
+int rtc_get(struct rtc_time *time)
+{
+ tps65913_rtc_shadow();
+
+ time->sec = bcd2bin(tps65913_read(TPS65913_SECONDS_REG) & 0x7f);
+ time->min = bcd2bin(tps65913_read(TPS65913_MINUTES_REG) & 0x7f);
+ time->hour = bcd2bin(tps65913_read(TPS65913_HOURS_REG) & 0x3f);
+ time->mday = bcd2bin(tps65913_read(TPS65913_DAYS_REG) & 0x3f);
+ time->mon = bcd2bin(tps65913_read(TPS65913_MONTHS_REG) & 0x1f);
+ time->year = bcd2bin(tps65913_read(TPS65913_YEARS_REG) & 0xff);
+
+ return 0;
+}