coreboot-gerrit March 2015

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Patch set updated for coreboot: 921c3b9 coreboot: common stage cache
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8625 -gerrit commit 921c3b9b9882ef61c531f43073266e18dc5b2771 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 6 23:17:33 2015 -0600 coreboot: common stage cache Many chipsets were using a stage cache for reference code or when using a relocatable ramstage. Provide a common API for the chipsets to use while reducing code duplication. Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/intel/haswell/romstage.c | 26 +++-- src/include/cbfs.h | 3 +- src/include/cbmem.h | 2 + src/include/program_loading.h | 14 +-- src/include/ramstage_cache.h | 53 ---------- src/include/romstage_handoff.h | 4 - src/include/stage_cache.h | 49 +++++++++ src/lib/Makefile.inc | 9 +- src/lib/cbmem_stage_cache.c | 76 ++++++++++++++ src/lib/ext_stage_cache.c | 122 +++++++++++++++++++++++ src/lib/loaders/load_and_run_ramstage.c | 23 +++-- src/lib/ramstage_cache.c | 149 ---------------------------- src/soc/intel/baytrail/refcode.c | 57 +---------- src/soc/intel/baytrail/romstage/raminit.c | 17 ++-- src/soc/intel/baytrail/romstage/romstage.c | 6 +- src/soc/intel/baytrail/stage_cache.c | 6 +- src/soc/intel/broadwell/refcode.c | 57 +---------- src/soc/intel/broadwell/romstage/raminit.c | 13 ++- src/soc/intel/broadwell/romstage/romstage.c | 5 +- src/soc/intel/broadwell/stage_cache.c | 6 +- 20 files changed, 330 insertions(+), 367 deletions(-) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 50150cf..b8c455b 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <string.h> +#include <cbfs.h> #include <cbmem.h> #include <console/console.h> #include <arch/cpu.h> @@ -33,9 +34,9 @@ #include <device/pci_def.h> #include <cpu/x86/lapic.h> #include <cbfs.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> #include <reset.h> +#include <stage_cache.h> #include <vendorcode/google/chromeos/chromeos.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> @@ -256,13 +257,17 @@ void romstage_common(const struct romstage_params *params) if (!wake_from_s3) { cbmem_initialize_empty(); + stage_cache_create_empty(); /* Save data returned from MRC on non-S3 resumes. */ save_mrc_data(params->pei_data); - } else if (cbmem_initialize()) { - #if CONFIG_HAVE_ACPI_RESUME - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); - #endif + } else { + stage_cache_recover(); + if (cbmem_initialize()) { + #if CONFIG_HAVE_ACPI_RESUME + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); + #endif + } } handoff = romstage_handoff_find_or_add(); @@ -307,18 +312,17 @@ void romstage_after_car(void) } -#if CONFIG_RELOCATABLE_RAMSTAGE -#include <ramstage_cache.h> +#if IS_ENABLED(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { /* The ramstage cache lives in the TSEG region at RESERVED_SMM_OFFSET. * The top of ram is defined to be the TSEG base address. */ *size = RESERVED_SMM_SIZE; - return (void *)((uint32_t)cbmem_top() + RESERVED_SMM_OFFSET); + *base = (void *)((uint32_t)cbmem_top() + RESERVED_SMM_OFFSET); } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE reset_system(); diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 6d9fc40..2478c4c 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright (C) 2013-2015 Google, Inc. * * This file is dual-licensed. You can choose between: * - The GNU GPL, version 2, as published by the Free Software Foundation @@ -83,4 +83,3 @@ int run_address(void *f); int init_default_cbfs_media(struct cbfs_media *media); #endif - diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 9b3ca7d..7b74237 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -79,6 +79,8 @@ #define CBMEM_ID_HOB_POINTER 0x484f4221 #define CBMEM_ID_IMD_ROOT 0xff4017ff #define CBMEM_ID_IMD_SMALL 0x53a11439 +#define CBMEM_ID_STAGEx_META 0x57a9e000 +#define CBMEM_ID_STAGEx_CACHE 0x57a9e100 #ifndef __ASSEMBLER__ #include <stddef.h> diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 0261b59..4978a84 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -127,18 +127,8 @@ void run_romstage(void); /* Run ramstage from romstage. */ void run_ramstage(void); -struct romstage_handoff; -#if IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE) -/* Cache the loaded ramstage described by prog. */ -void cache_loaded_ramstage(struct romstage_handoff *, struct prog *p); -/* Load ramstage from cache filling in struct prog. */ -void load_cached_ramstage(struct romstage_handoff *h, struct prog *p); -#else -static inline void cache_loaded_ramstage(struct romstage_handoff *h, - struct prog *p) {} -static inline void load_cached_ramstage(struct romstage_handoff *h, - struct prog *p) {} -#endif +/* Called when the stage cache couldn't load ramstage on resume. */ +void ramstage_cache_invalid(void); /*********************** * PAYLOAD LOADING * diff --git a/src/include/ramstage_cache.h b/src/include/ramstage_cache.h deleted file mode 100644 index 8d9b095..0000000 --- a/src/include/ramstage_cache.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _RAMSTAGE_CACHE_ -#define _RAMSTAGE_CACHE_ - -#include <stddef.h> -#include <stdint.h> - -/* This structure is saved along with the relocated ramstage program when - * CONFIG_RELOCATED_RAMSTAGE is employed. For x86, it can used to protect - * the integrity of the ramstage program on S3 resume by saving a copy of - * the relocated ramstage in SMM space with the assumption that the SMM region - * cannot be altered from the OS. The magic value just serves as a quick sanity - * check. */ - -#define RAMSTAGE_CACHE_MAGIC 0xf3c3a02a - -struct ramstage_cache { - uint32_t magic; - uint32_t entry_point; - uint32_t load_address; - uint32_t size; - char program[0]; -} __attribute__((packed)); - -/* Chipset/Board function for obtaining cache location and size. */ -struct ramstage_cache *ramstage_cache_location(long *size); -/* Chipset/Board function called when cache is invalid on resume. */ -void ramstage_cache_invalid(struct ramstage_cache *cache); - -static inline int ramstage_cache_is_valid(const struct ramstage_cache *c) -{ - return (c != NULL && c->magic == RAMSTAGE_CACHE_MAGIC); -} - -#endif /* _RAMSTAGE_CACHE_ */ diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 307babd..679633d 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -34,10 +34,6 @@ struct romstage_handoff { * will be re-loaded from cbfs (which can be slower since it lives * in flash). */ uint32_t s3_resume; - /* The ramstage_entry_point is cached in the stag loading path. This - * cached value can only be utilized when the chipset code properly - * fills in the s3_resume field above. */ - uint32_t ramstage_entry_point; }; #if defined(__PRE_RAM__) diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h new file mode 100644 index 0000000..fef512e --- /dev/null +++ b/src/include/stage_cache.h @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _STAGE_CACHE_H_ +#define _STAGE_CACHE_H_ + +#include <stddef.h> +#include <stdint.h> +#include <program_loading.h> + +enum { + STAGE_RAMSTAGE, + STAGE_REFCODE, +}; + +/* Create an empty stage cache. */ +void stage_cache_create_empty(void); +/* Recover existing stage cache. */ +void stage_cache_recover(void); +/* Cache the loaded stage provided according to the parameters. */ +void stage_cache_add(int stage_id, struct prog *stage); +/* Load the cached stage at given location returning the stage entry point. */ +void stage_cache_load_stage(int stage_id, struct prog *stage); +/* Fill in parameters for the external stage cache, if utilized. */ +void stage_cache_external_region(void **base, size_t *size); + +/* Metadata associated with each stage. */ +struct stage_cache { + uint64_t load_addr; + uint64_t entry_addr; +}; + +#endif /* _STAGE_CACHE_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f49cf8b..f93a300 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -106,7 +106,14 @@ romstage-y += hexdump.c romstage-$(CONFIG_REG_SCRIPT) += reg_script.c ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c -romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += ramstage_cache.c +ifeq ($(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM),y) +ramstage-y += ext_stage_cache.c +romstage-y += ext_stage_cache.c +else +ramstage-$(RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c +romstage-$(RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c +endif + smm-y += cbfs.c cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c diff --git a/src/lib/cbmem_stage_cache.c b/src/lib/cbmem_stage_cache.c new file mode 100644 index 0000000..59ac6e4 --- /dev/null +++ b/src/lib/cbmem_stage_cache.c @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/early_variables.h> +#include <cbmem.h> +#include <stage_cache.h> +#include <string.h> + + +/* Provide empty implementations by default. */ +void __attribute__((weak)) stage_cache_create_empty(void) {} +void __attribute__((weak)) stage_cache_recover(void) {} + +/* Stage cache uses cbmem. */ +void stage_cache_add(int stage_id, struct prog *stage) +{ + struct stage_cache *meta; + void *c; + + meta = cbmem_add(CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta)); + if (meta == NULL) + return; + meta->load_addr = (uintptr_t)prog_start(stage); + meta->entry_addr = (uintptr_t)prog_entry(stage); + + c = cbmem_add(CBMEM_ID_STAGEx_CACHE + stage_id, prog_size(stage)); + if (c == NULL) + return; + + memcpy(c, prog_start(stage), prog_size(stage)); +} + +void stage_cache_load_stage(int stage_id, struct prog *stage) +{ + struct stage_cache *meta; + const struct cbmem_entry *e; + void *c; + size_t size; + void *load_addr; + + prog_set_entry(stage, NULL, NULL); + + meta = cbmem_find(CBMEM_ID_STAGEx_META + stage_id); + if (meta == NULL) + return; + + e = cbmem_entry_find(CBMEM_ID_STAGEx_CACHE + stage_id); + + if (e == NULL) + return; + + c = cbmem_entry_start(e); + size = cbmem_entry_size(e); + load_addr = (void *)(uintptr_t)meta->load_addr; + + memcpy(load_addr, c, size); + + prog_set_area(stage, load_addr, size); + prog_set_entry(stage, (void *)(uintptr_t)meta->entry_addr, NULL); +} diff --git a/src/lib/ext_stage_cache.c b/src/lib/ext_stage_cache.c new file mode 100644 index 0000000..1539270 --- /dev/null +++ b/src/lib/ext_stage_cache.c @@ -0,0 +1,122 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/early_variables.h> +#include <bootstate.h> +#include <cbmem.h> +#include <imd.h> +#include <rules.h> +#include <stage_cache.h> +#include <string.h> + +static struct imd imd_stage_cache CAR_GLOBAL = { }; + +static inline struct imd *imd_get(void) +{ + return car_get_var_ptr(&imd_stage_cache); +} + +static struct imd *sc_imd_init(void) +{ + struct imd *imd; + void *base; + size_t size; + + imd = imd_get(); + stage_cache_external_region(&base, &size); + imd_handle_init(imd, (void *)(size + (uintptr_t)base)); + + return imd; +} + +void stage_cache_create_empty(void) +{ + imd_create_tiered_empty(sc_imd_init(), 4096, 4096, 1024, 32); +} + +void stage_cache_recover(void) +{ + imd_recover(sc_imd_init()); +} + +void stage_cache_add(int stage_id, struct prog *stage) +{ + struct imd *imd; + const struct imd_entry *e; + struct stage_cache *meta; + void *c; + + imd = imd_get(); + e = imd_entry_add(imd, CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta)); + + if (e == NULL) + return; + + meta = imd_entry_at(imd, e); + + meta->load_addr = (uintptr_t)prog_start(stage); + meta->entry_addr = (uintptr_t)prog_entry(stage); + + e = imd_entry_add(imd, CBMEM_ID_STAGEx_CACHE + stage_id, + prog_size(stage)); + + if (e == NULL) + return; + + c = imd_entry_at(imd, e); + + memcpy(c, prog_start(stage), prog_size(stage)); +} + +void stage_cache_load_stage(int stage_id, struct prog *stage) +{ + struct imd *imd; + struct stage_cache *meta; + const struct imd_entry *e; + void *c; + size_t size; + + imd = imd_get(); + e = imd_entry_find(imd, CBMEM_ID_STAGEx_META + stage_id); + if (e == NULL) + return; + + meta = imd_entry_at(imd, e); + + e = imd_entry_find(imd, CBMEM_ID_STAGEx_CACHE + stage_id); + + if (e == NULL) + return; + + c = imd_entry_at(imd, e); + size = imd_entry_size(imd, e); + + memcpy((void *)(uintptr_t)meta->load_addr, c, size); + + prog_set_area(stage, (void *)(uintptr_t)meta->load_addr, size); + prog_set_entry(stage, (void *)(uintptr_t)meta->entry_addr, NULL); +} + +#if ENV_RAMSTAGE +static void recover_sc(void *unused) +{ + stage_cache_recover(); +} +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, recover_sc, NULL); +#endif diff --git a/src/lib/loaders/load_and_run_ramstage.c b/src/lib/loaders/load_and_run_ramstage.c index b3728a1..153e38e 100644 --- a/src/lib/loaders/load_and_run_ramstage.c +++ b/src/lib/loaders/load_and_run_ramstage.c @@ -23,6 +23,7 @@ #include <cbfs.h> #include <program_loading.h> #include <romstage_handoff.h> +#include <stage_cache.h> #include <timestamp.h> extern const struct prog_loader_ops cbfs_ramstage_loader; @@ -35,16 +36,20 @@ static const struct prog_loader_ops *loaders[] = { &cbfs_ramstage_loader, }; -static void -load_ramstage(const struct prog_loader_ops *ops, - struct romstage_handoff *handoff, struct prog *ramstage) +void __attribute__((weak)) stage_cache_add(int stage_id, struct prog *stage) {} +void __attribute__((weak)) stage_cache_load_stage(int stage_id, + struct prog *stage) {} +void __attribute__((weak)) ramstage_cache_invalid(void) {} + +static void load_ramstage(const struct prog_loader_ops *ops, + struct prog *ramstage) { timestamp_add_now(TS_START_COPYRAM); if (ops->prepare(ramstage)) return; - cache_loaded_ramstage(handoff, ramstage); + stage_cache_add(STAGE_RAMSTAGE, ramstage); timestamp_add_now(TS_END_COPYRAM); @@ -56,18 +61,18 @@ static void run_ramstage_from_resume(struct romstage_handoff *handoff, { if (handoff != NULL && handoff->s3_resume) { /* Load the cached ramstage to runtime location. */ - load_cached_ramstage(handoff, ramstage); + stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); if (prog_entry(ramstage) != NULL) { printk(BIOS_DEBUG, "Jumping to image.\n"); prog_run(ramstage); } + ramstage_cache_invalid(); } } void run_ramstage(void) { - struct romstage_handoff *handoff; const struct prog_loader_ops *ops; int i; struct prog ramstage = { @@ -75,14 +80,12 @@ void run_ramstage(void) .type = PROG_RAMSTAGE, }; - handoff = romstage_handoff_find_or_add(); - - run_ramstage_from_resume(handoff, &ramstage); + run_ramstage_from_resume(romstage_handoff_find_or_add(), &ramstage); for (i = 0; i < ARRAY_SIZE(loaders); i++) { ops = loaders[i]; printk(BIOS_DEBUG, "Trying %s ramstage loader.\n", ops->name); - load_ramstage(ops, handoff, &ramstage); + load_ramstage(ops, &ramstage); } die("Ramstage was not loaded!\n"); diff --git a/src/lib/ramstage_cache.c b/src/lib/ramstage_cache.c deleted file mode 100644 index 1dd40c7..0000000 --- a/src/lib/ramstage_cache.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include <string.h> -#include <console/console.h> -#include <program_loading.h> -#include <ramstage_cache.h> -#include <romstage_handoff.h> - -#if CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM - -void cache_loaded_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - struct ramstage_cache *cache; - uint32_t total_size; - uint32_t ramstage_size; - void *ramstage_base; - long cache_size = 0; - - ramstage_size = prog_size(ramstage); - ramstage_base = prog_start(ramstage); - - cache = ramstage_cache_location(&cache_size); - - if (cache == NULL) { - printk(BIOS_DEBUG, "No ramstage cache location provided.\n"); - return; - } - - total_size = sizeof(*cache) + ramstage_size; - if (total_size > cache_size) { - printk(BIOS_DEBUG, "cache size too small: 0x%08x > 0x%08lx\n", - total_size, cache_size); - /* Nuke whatever may be there now just in case. */ - cache->magic = ~RAMSTAGE_CACHE_MAGIC; - return; - } - - cache->magic = RAMSTAGE_CACHE_MAGIC; - cache->entry_point = (uint32_t)prog_entry(ramstage); - cache->load_address = (uint32_t)ramstage_base; - cache->size = ramstage_size; - - printk(BIOS_DEBUG, "Saving ramstage to %p.\n", cache); - - /* Copy over the program. */ - memcpy(&cache->program[0], ramstage_base, ramstage_size); - - if (handoff == NULL) - return; - - handoff->ramstage_entry_point = cache->entry_point; -} - -void load_cached_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - struct ramstage_cache *cache; - long size = 0; - - cache = ramstage_cache_location(&size); - - if (!ramstage_cache_is_valid(cache)) { - printk(BIOS_DEBUG, "Invalid ramstage cache found.\n"); - ramstage_cache_invalid(cache); - return; - } - - printk(BIOS_DEBUG, "Loading ramstage from %p.\n", cache); - - prog_set_area(ramstage, (void *)cache->load_address, cache->size); - prog_set_entry(ramstage, (void *)cache->entry_point, NULL); - - memcpy((void *)cache->load_address, &cache->program[0], cache->size); -} - -#else - -/* Cache relocated ramstage in CBMEM. */ - -void cache_loaded_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - uint32_t ramstage_size; - const struct cbmem_entry *entry; - - if (handoff == NULL) - return; - - ramstage_size = prog_size(ramstage); - /* cbmem_entry_add() does a find() before add(). */ - entry = cbmem_entry_add(CBMEM_ID_RAMSTAGE_CACHE, ramstage_size); - - if (entry == NULL) - return; - - /* Keep track of the entry point in the handoff structure. */ - handoff->ramstage_entry_point = (uint32_t)prog_entry(ramstage); - - memcpy(cbmem_entry_start(entry), prog_start(ramstage), ramstage_size); -} - -void load_cached_ramstage(struct romstage_handoff *handoff, - struct prog *ramstage) -{ - const struct cbmem_entry *entry_cache; - const struct cbmem_entry *entry_dest; - - if (handoff == NULL) - return; - - entry_cache = cbmem_entry_find(CBMEM_ID_RAMSTAGE_CACHE); - - if (entry_cache == NULL) - return; - - entry_dest = cbmem_entry_find(CBMEM_ID_RAMSTAGE); - - if (entry_dest == NULL) - return; - - prog_set_area(ramstage, cbmem_entry_start(entry_dest), - cbmem_entry_size(entry_dest)); - prog_set_entry(ramstage, (void *)handoff->ramstage_entry_point, NULL); - - /* Load the cached ramstage copy into the to-be-run region. */ - memcpy(prog_start(ramstage), cbmem_entry_start(entry_cache), - prog_size(ramstage)); -} - -#endif diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 45771e0..6c89d00 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -25,7 +25,7 @@ #include <cpu/x86/tsc.h> #include <program_loading.h> #include <rmodule.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/vboot_handoff.h> #endif @@ -33,11 +33,6 @@ #include <baytrail/ramstage.h> #include <baytrail/efi_wrapper.h> -static inline struct ramstage_cache *next_cache(struct ramstage_cache *c) -{ - return (struct ramstage_cache *)&c->program[c->size]; -} - static void ABI_X86 send_to_console(unsigned char b) { console_tx_byte(b); @@ -45,60 +40,18 @@ static void ABI_X86 send_to_console(unsigned char b) static efi_wrapper_entry_t load_refcode_from_cache(void) { - struct ramstage_cache *c; - long cache_size; + struct prog refcode; printk(BIOS_DEBUG, "refcode loading from cache.\n"); - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid ramstage cache descriptor.\n"); - return NULL; - } + stage_cache_load_stage(STAGE_REFCODE, &refcode); - c = next_cache(c); - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid refcode cache descriptor.\n"); - return NULL; - } - - printk(BIOS_DEBUG, "Loading cached reference code from 0x%08x(%x)\n", - c->load_address, c->size); - memcpy((void *)c->load_address, &c->program[0], c->size); - - return (efi_wrapper_entry_t)c->entry_point; + return (efi_wrapper_entry_t)prog_entry(&refcode); } static void cache_refcode(const struct rmod_stage_load *rsl) { - struct ramstage_cache *c; - long cache_size; - - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "No place to cache reference code.\n"); - return; - } - - /* Determine how much remaining cache available. */ - cache_size -= c->size + sizeof(*c); - - if (cache_size < (sizeof(*c) + prog_size(rsl->prog))) { - printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); - return; - } - - c = next_cache(c); - c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)(uintptr_t)prog_entry(rsl->prog); - c->load_address = (uint32_t)(uintptr_t)prog_start(rsl->prog); - c->size = prog_size(rsl->prog); - - printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", - &c->program[0], c->size); - memcpy(&c->program[0], (void *)c->load_address, c->size); + stage_cache_add(STAGE_REFCODE, rsl->prog); } #if IS_ENABLED(CONFIG_CHROMEOS) diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index a51853a..7488215 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -25,6 +25,7 @@ #include <console/console.h> #include <device/pci_def.h> #include <halt.h> +#include <stage_cache.h> #include <baytrail/gpio.h> #include <soc/intel/common/mrc_cache.h> #include <baytrail/iomap.h> @@ -169,12 +170,16 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) if (prev_sleep_state != 3) { cbmem_initialize_empty(); - } else if (cbmem_initialize()) { - #if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); - #endif + stage_cache_create_empty(); + } else { + stage_cache_recover(); + if (cbmem_initialize()) { + #if CONFIG_HAVE_ACPI_RESUME + printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); + #endif + } } printk(BIOS_DEBUG, "MRC Wrapper returned %d\n", ret); diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 91548e3..e961ccd 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -20,18 +20,18 @@ #include <stddef.h> #include <arch/cpu.h> #include <arch/io.h> -#include <arch/cbfs.h> #include <arch/stages.h> #include <arch/early_variables.h> #include <console/console.h> +#include <cbfs.h> #include <cbmem.h> #include <cpu/x86/mtrr.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> #endif #include <elog.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> +#include <stage_cache.h> #include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> #include <baytrail/gpio.h> @@ -359,7 +359,7 @@ static void *setup_stack_and_mttrs(void) return slot; } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE /* Perform cold reset on invalid ramstage cache. */ diff --git a/src/soc/intel/baytrail/stage_cache.c b/src/soc/intel/baytrail/stage_cache.c index 3bda56d..c133bc8 100644 --- a/src/soc/intel/baytrail/stage_cache.c +++ b/src/soc/intel/baytrail/stage_cache.c @@ -18,10 +18,10 @@ */ #include <cbmem.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <baytrail/smm.h> -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { char *smm_base; /* 1MiB cache size */ @@ -31,5 +31,5 @@ struct ramstage_cache *ramstage_cache_location(long *size) * cbmem_top(). */ smm_base = cbmem_top(); *size = cache_size; - return (void *)&smm_base[smm_region_size() - cache_size]; + *base = &smm_base[smm_region_size() - cache_size]; } diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index 36ce97d..5910e23 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -25,7 +25,7 @@ #include <cpu/x86/tsc.h> #include <program_loading.h> #include <rmodule.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <string.h> #if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/vboot_handoff.h> @@ -34,67 +34,20 @@ #include <broadwell/pei_wrapper.h> #include <broadwell/ramstage.h> -static inline struct ramstage_cache *next_cache(struct ramstage_cache *c) -{ - return (struct ramstage_cache *)&c->program[c->size]; -} - static pei_wrapper_entry_t load_refcode_from_cache(void) { - struct ramstage_cache *c; - long cache_size; + struct prog refcode; printk(BIOS_DEBUG, "refcode loading from cache.\n"); - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid ramstage cache descriptor.\n"); - return NULL; - } + stage_cache_load_stage(STAGE_REFCODE, &refcode); - c = next_cache(c); - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "Invalid refcode cache descriptor.\n"); - return NULL; - } - - printk(BIOS_DEBUG, "Loading cached reference code from 0x%08x(%x)\n", - c->load_address, c->size); - memcpy((void *)c->load_address, &c->program[0], c->size); - - return (pei_wrapper_entry_t)c->entry_point; + return (pei_wrapper_entry_t)prog_entry(&refcode); } static void cache_refcode(const struct rmod_stage_load *rsl) { - struct ramstage_cache *c; - long cache_size; - - c = ramstage_cache_location(&cache_size); - - if (!ramstage_cache_is_valid(c)) { - printk(BIOS_DEBUG, "No place to cache reference code.\n"); - return; - } - - /* Determine how much remaining cache available. */ - cache_size -= c->size + sizeof(*c); - - if (cache_size < (sizeof(*c) + prog_size(rsl->prog))) { - printk(BIOS_DEBUG, "Not enough cache space for ref code.\n"); - return; - } - - c = next_cache(c); - c->magic = RAMSTAGE_CACHE_MAGIC; - c->entry_point = (uint32_t)(uintptr_t)prog_entry(rsl->prog); - c->load_address = (uint32_t)(uintptr_t)prog_start(rsl->prog); - c->size = prog_size(rsl->prog); - - printk(BIOS_DEBUG, "Caching refcode at 0x%p(%x)\n", - &c->program[0], c->size); - memcpy(&c->program[0], (void *)c->load_address, c->size); + stage_cache_add(STAGE_REFCODE, rsl->prog); } #if IS_ENABLED(CONFIG_CHROMEOS) diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index b8b88bc..cb541ab 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -29,6 +29,7 @@ #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #endif +#include <stage_cache.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/intel/common/mrc_cache.h> #include <broadwell/iomap.h> @@ -111,12 +112,16 @@ void raminit(struct pei_data *pei_data) if (pei_data->boot_mode != SLEEP_STATE_S3) { cbmem_initialize_empty(); - } else if (cbmem_initialize()) { + stage_cache_create_empty(); + } else { + stage_cache_recover(); + if (cbmem_initialize()) { #if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); - /* Failed S3 resume, reset to come up cleanly */ - reset_system(); + printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n"); + /* Failed S3 resume, reset to come up cleanly */ + reset_system(); #endif + } } printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", pei_data->data_to_save, diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index ff5918a..2945204 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -25,11 +25,12 @@ #include <arch/stages.h> #include <arch/early_variables.h> #include <console/console.h> +#include <cbfs.h> #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <elog.h> -#include <ramstage_cache.h> #include <romstage_handoff.h> +#include <stage_cache.h> #include <timestamp.h> #include <broadwell/me.h> #include <broadwell/pei_data.h> @@ -134,7 +135,7 @@ void asmlinkage romstage_after_car(void) while (1); } -void ramstage_cache_invalid(struct ramstage_cache *cache) +void ramstage_cache_invalid(void) { #if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE /* Perform cold reset on invalid ramstage cache. */ diff --git a/src/soc/intel/broadwell/stage_cache.c b/src/soc/intel/broadwell/stage_cache.c index 6c6b6fb..80c7cc5 100644 --- a/src/soc/intel/broadwell/stage_cache.c +++ b/src/soc/intel/broadwell/stage_cache.c @@ -18,11 +18,11 @@ */ #include <cbmem.h> -#include <ramstage_cache.h> +#include <stage_cache.h> #include <broadwell/smm.h> #include <stdint.h> -struct ramstage_cache *ramstage_cache_location(long *size) +void stage_cache_external_region(void **base, size_t *size) { /* The ramstage cache lives in the TSEG region. * The top of ram is defined to be the TSEG base address. */ @@ -30,6 +30,6 @@ struct ramstage_cache *ramstage_cache_location(long *size) offset -= CONFIG_IED_REGION_SIZE; offset -= CONFIG_SMM_RESERVED_SIZE; + *base = (void *)(cbmem_top() + offset); *size = CONFIG_SMM_RESERVED_SIZE; - return (void *)(cbmem_top() + offset); }

1 0

Patch set updated for coreboot: 3662a7f fmap: add region based fmap API
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9171 -gerrit commit 3662a7f7533410884b7ef470a26e7e393eada385 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sun Mar 29 00:05:18 2015 -0500 fmap: add region based fmap API Instead of being pointer based use the region infrastrucutre. Additionally, this removes the need for arch-specific compilation paths. Change-Id: I436533a4f4a272837794ee00c90280602745edac Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/Kconfig | 9 +++ src/include/fmap.h | 35 ++++++++++ src/lib/Makefile.inc | 4 ++ src/lib/fmap.c | 121 +++++++++++++++++++++++++++++++++ src/vendorcode/google/chromeos/Kconfig | 8 --- 5 files changed, 169 insertions(+), 8 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 2625266..0741275 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -219,6 +219,15 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM The relocated ramstage is saved in an area specified by the by the board and/or chipset. +config FLASHMAP_OFFSET + hex "Flash Map Offset" + default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE + default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE + default CBFS_SIZE if !ARCH_X86 + default 0 + help + Offset of flash map in firmware image + choice prompt "Bootblock behaviour" default BOOTBLOCK_SIMPLE diff --git a/src/include/fmap.h b/src/include/fmap.h new file mode 100644 index 0000000..1128d2e --- /dev/null +++ b/src/include/fmap.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _FMAP_H_ +#define _FMAP_H_ + +#include <region.h> + +/* Locate the named area in the fmap and fill in a region device representing + * that area. The region is a sub-region of the readonly boot media. Return + * 0 on success, < 0 on error. */ +int fmap_locate_area_as_rdev(const char *name, struct region_device *area); + +/* Locate the named area in the fmap and fill in a region with the + * offset and size of that area within the boot media. Return 0 on success, + * < 0 on error. */ +int fmap_locate_area(const char *name, struct region *r); + +#endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 2ebca6c..d157d3f 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -28,11 +28,13 @@ bootblock-y += memchr.c bootblock-y += memcmp.c bootblock-y += mem_pool.c bootblock-y += region.c +bootblock-y += fmap.c verstage-y += prog_ops.c verstage-y += delay.c verstage-y += cbfs.c verstage-y += cbfs_boot_props.c +verstage-y += fmap.c verstage-y += memcmp.c verstage-y += region.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -46,6 +48,7 @@ romstage-y += memchr.c romstage-y += memcmp.c $(foreach arch,$(ARCH_SUPPORTED),\ $(eval rmodules_$(arch)-y += memcmp.c)) +romstage-y += fmap.c romstage-$(CONFIG_I2C_TPM) += delay.c romstage-y += cbfs.c @@ -72,6 +75,7 @@ ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c ramstage-y += bootmem.c +ramstage-y += fmap.c ramstage-y += memchr.c ramstage-y += memcmp.c ramstage-y += malloc.c diff --git a/src/lib/fmap.c b/src/lib/fmap.c new file mode 100644 index 0000000..b50a186 --- /dev/null +++ b/src/lib/fmap.c @@ -0,0 +1,121 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2012-2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <boot_device.h> +#include <console/console.h> +#include <fmap.h> +#include <fmap_serialized.h> +#include <stddef.h> +#include <string.h> + +/* + * See http://code.google.com/p/flashmap/ for more information on FMAP. + */ + +static int find_fmap_directory(struct region_device *fmrd) +{ + const struct region_device *boot; + struct fmap *fmap; + size_t fmap_size; + size_t offset = CONFIG_FLASHMAP_OFFSET; + + boot = boot_device_ro(); + + if (boot == NULL) + return -1; + + fmap_size = sizeof(struct fmap); + + fmap = rdev_mmap(boot, offset, fmap_size); + + if (fmap == NULL) + return -1; + + if (memcmp(fmap->signature, FMAP_SIGNATURE, sizeof(fmap->signature))) { + printk(BIOS_DEBUG, "No FMAP found at %zx offset.\n", offset); + rdev_munmap(boot, fmap); + return -1; + } + + printk(BIOS_DEBUG, "FMAP: Found \"%s\" version %d.%d at %zx.\n", + fmap->name, fmap->ver_major, fmap->ver_minor, offset); + printk(BIOS_DEBUG, "FMAP: base = %llx size = %x #areas = %d\n", + (long long)fmap->base, fmap->size, fmap->nareas); + + fmap_size += fmap->nareas * sizeof(struct fmap_area); + + rdev_munmap(boot, fmap); + + return rdev_chain(fmrd, boot, offset, fmap_size); +} + +int fmap_locate_area_as_rdev(const char *name, struct region_device *area) +{ + const struct region_device *boot; + struct region ar; + + boot = boot_device_ro(); + + if (fmap_locate_area(name, &ar)) + return -1; + + return rdev_chain(area, boot, ar.offset, ar.size); +} + +int fmap_locate_area(const char *name, struct region *ar) +{ + struct region_device fmrd; + size_t offset; + + if (find_fmap_directory(&fmrd)) + return -1; + + /* Start reading the areas just after fmap header. */ + offset = sizeof(struct fmap); + + while (1) { + struct fmap_area *area; + + area = rdev_mmap(&fmrd, offset, sizeof(*area)); + + if (area == NULL) + return -1; + + if (strcmp((const char *)area->name, name)) { + rdev_munmap(&fmrd, area); + offset += sizeof(struct fmap_area); + continue; + } + + printk(BIOS_DEBUG, "FMAP: area %s found\n", name); + printk(BIOS_DEBUG, "FMAP: offset: %x\n", area->offset); + printk(BIOS_DEBUG, "FMAP: size: %d bytes\n", area->size); + + ar->offset = area->offset; + ar->size = area->size; + + rdev_munmap(&fmrd, area); + + return 0; + } + + printk(BIOS_DEBUG, "FMAP: area %s not found\n", name); + + return -1; +} diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 8826a14..4259ad9 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -86,14 +86,6 @@ config CHROMEOS_RAMOOPS_RAM_SIZE default 0x00100000 depends on CHROMEOS_RAMOOPS -config FLASHMAP_OFFSET - hex "Flash Map Offset" - default 0x00670000 if NORTHBRIDGE_INTEL_SANDYBRIDGE - default 0x00610000 if NORTHBRIDGE_INTEL_IVYBRIDGE - default 0 - help - Offset of flash map in firmware image - config VBOOT_VERIFY_FIRMWARE bool "Verify firmware with vboot." default n

1 0

Patch set updated for coreboot: 37f695c fmap: create fmap_serialized.h header
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9170 -gerrit commit 37f695caf69be4d2971a2718d93772a688145ec4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Mar 28 23:56:22 2015 -0500 fmap: create fmap_serialized.h header Create a header for the fmap serialized data layout to allow for easier use from non-chromeos code. Change-Id: Ie36e9ff9cb554234ec394b921f029eeed6845aee Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/fmap_serialized.h | 73 +++++++++++++++++++++++++++++++++++ src/vendorcode/google/chromeos/fmap.h | 40 +------------------ 2 files changed, 74 insertions(+), 39 deletions(-) diff --git a/src/include/fmap_serialized.h b/src/include/fmap_serialized.h new file mode 100644 index 0000000..3585f0b --- /dev/null +++ b/src/include/fmap_serialized.h @@ -0,0 +1,73 @@ +/* + * Copyright 2010, Google Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following disclaimer + * in the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Google Inc. nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + */ + +#ifndef FLASHMAP_SERIALIZED_H__ +#define FLASHMAP_SERIALIZED_H__ + +#include <stdint.h> + +#define FMAP_SIGNATURE "__FMAP__" +#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */ +#define FMAP_VER_MINOR 1 /* this header's FMAP minor version */ +#define FMAP_STRLEN 32 /* maximum length for strings, */ + /* including null-terminator */ + +enum fmap_flags { + FMAP_AREA_STATIC = 1 << 0, + FMAP_AREA_COMPRESSED = 1 << 1, + FMAP_AREA_RO = 1 << 2, +}; + +/* Mapping of volatile and static regions in firmware binary */ +struct fmap_area { + uint32_t offset; /* offset relative to base */ + uint32_t size; /* size in bytes */ + uint8_t name[FMAP_STRLEN]; /* descriptive name */ + uint16_t flags; /* flags for this area */ +} __attribute__((packed)); + +struct fmap { + uint8_t signature[8]; /* "__FMAP__" (0x5F5F464D41505F5F) */ + uint8_t ver_major; /* major version */ + uint8_t ver_minor; /* minor version */ + uint64_t base; /* address of the firmware binary */ + uint32_t size; /* size of firmware binary in bytes */ + uint8_t name[FMAP_STRLEN]; /* name of this firmware binary */ + uint16_t nareas; /* number of areas described by + fmap_areas[] below */ + struct fmap_area areas[]; +} __attribute__((packed)); + +#endif /* FLASHMAP_SERIALIZED_H__ */ diff --git a/src/vendorcode/google/chromeos/fmap.h b/src/vendorcode/google/chromeos/fmap.h index a3d2abd..db61b74 100644 --- a/src/vendorcode/google/chromeos/fmap.h +++ b/src/vendorcode/google/chromeos/fmap.h @@ -36,44 +36,6 @@ #ifndef FLASHMAP_LIB_FMAP_H__ #define FLASHMAP_LIB_FMAP_H__ -#include <stdint.h> +#include <fmap_serialized.h> -#define FMAP_SIGNATURE "__FMAP__" -#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */ -#define FMAP_VER_MINOR 1 /* this header's FMAP minor version */ -#define FMAP_STRLEN 32 /* maximum length for strings, */ - /* including null-terminator */ - -enum fmap_flags { - FMAP_AREA_STATIC = 1 << 0, - FMAP_AREA_COMPRESSED = 1 << 1, - FMAP_AREA_RO = 1 << 2, -}; - -/* Mapping of volatile and static regions in firmware binary */ -struct fmap_area { - uint32_t offset; /* offset relative to base */ - uint32_t size; /* size in bytes */ - uint8_t name[FMAP_STRLEN]; /* descriptive name */ - uint16_t flags; /* flags for this area */ -} __attribute__((packed)); - -struct fmap { - uint8_t signature[8]; /* "__FMAP__" (0x5F5F464D41505F5F) */ - uint8_t ver_major; /* major version */ - uint8_t ver_minor; /* minor version */ - uint64_t base; /* address of the firmware binary */ - uint32_t size; /* size of firmware binary in bytes */ - uint8_t name[FMAP_STRLEN]; /* name of this firmware binary */ - uint16_t nareas; /* number of areas described by - fmap_areas[] below */ - struct fmap_area areas[]; -} __attribute__((packed)); - - -/* coreboot specific function prototypes */ -const struct fmap *fmap_find(void); -const struct fmap_area *find_fmap_area(const struct fmap *fmap, - const char name[]); -int find_fmap_entry(const char name[], void **pointer); #endif /* FLASHMAP_LIB_FMAP_H__*/

1 0

Patch set updated for coreboot: abcba85 cbmem: switch over to imd-based cbmem
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9169 -gerrit commit abcba85140d3e2c5c2d357a7aa50bf92059e1c15 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Mar 30 16:34:20 2015 -0500 cbmem: switch over to imd-based cbmem In order to reduce the number of cbmem implementations remove the dynamic cbmem with the imd-based one. The imd library still provdes dynamic growth so that feature hasn't changed. The current imd-based cbmem packs small allocations into a larger entry. The following examples show the reduced fragmentation and reduced memory usage. Before with dynamic cbmem: CBMEM ROOT 0. 023ff000 00001000 aaaabbbb 1. 023fe000 00001000 aaaabbbc 2. 023fd000 00001000 aaaabbbe 3. 023fc000 00001000 aaaacccc 4. 023fa000 00002000 aaaacccd 5. 023f9000 00001000 ROMSTAGE 6. 023f8000 00001000 CONSOLE 7. 023d8000 00020000 COREBOOT 8. 023d6000 00002000 After with tiered imd: IMD ROOT 0. 023ff000 00001000 IMD SMALL 1. 023fe000 00001000 aaaacccc 2. 023fc000 00001060 aaaacccd 3. 023fb000 000007cf CONSOLE 4. 023db000 00020000 COREBOOT 5. 023d9000 00002000 IMD small region: IMD ROOT 0. 023fec00 00000400 aaaabbbb 1. 023febe0 00000020 aaaabbbc 2. 023feba0 00000040 aaaabbbe 3. 023feb20 00000080 ROMSTAGE 4. 023feb00 00000004 Side note: this CL provides a basis for what hoops one needs to jump through when there are not writeable global variables on a particular platform in the early stages. Change-Id: If770246caa64b274819e45a26e100b62b9f8d2db Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/lib/Makefile.inc | 6 +- src/lib/dynamic_cbmem.c | 481 ------------------------------------------------ src/lib/imd_cbmem.c | 101 ++++++++-- 3 files changed, 88 insertions(+), 500 deletions(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f93a300..34b3137 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -90,12 +90,10 @@ ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c ramstage-$(CONFIG_TERTIARY_BOARD_ID) += tristate_gpios.c romstage-y += cbmem_common.c -romstage-$(CONFIG_PLATFORM_NO_EARLY_WRITABLE_GLOBALS) += dynamic_cbmem.c -romstage-$(CONFIG_PLATFORM_HAS_EARLY_WRITABLE_GLOBALS) += imd_cbmem.c +romstage-y += imd_cbmem.c ramstage-y += cbmem_common.c -ramstage-$(CONFIG_PLATFORM_NO_EARLY_WRITABLE_GLOBALS) += dynamic_cbmem.c -ramstage-$(CONFIG_PLATFORM_HAS_EARLY_WRITABLE_GLOBALS) += imd_cbmem.c +ramstage-y += imd_cbmem.c romstage-y += imd.c ramstage-y += imd.c diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c deleted file mode 100644 index cff8f7d..0000000 --- a/src/lib/dynamic_cbmem.c +++ /dev/null @@ -1,481 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <bootstate.h> -#include <bootmem.h> -#include <console/console.h> -#include <cbmem.h> -#include <string.h> -#include <stdlib.h> -#include <arch/early_variables.h> -#ifndef UINT_MAX -#define UINT_MAX 4294967295U -#endif - -/* - * The dynamic cbmem code uses a root region. The root region boundary - * addresses are determined by cbmem_top() and ROOT_MIN_SIZE. Just below - * the address returned by cbmem_top() is a pointer that points to the - * root data structure. The root data structure provides the book keeping - * for each large entry. - */ - -/* The root region is at least DYN_CBMEM_ALIGN_SIZE . */ -#define ROOT_MIN_SIZE DYN_CBMEM_ALIGN_SIZE -#define CBMEM_POINTER_MAGIC 0xc0389479 -#define CBMEM_ENTRY_MAGIC ~(CBMEM_POINTER_MAGIC) - -/* The cbmem_root_pointer structure lives just below address returned - * from cbmem_top(). It points to the root data structure that - * maintains the entries. */ -struct cbmem_root_pointer { - u32 magic; - u32 root; -} __attribute__((packed)); - -struct cbmem_entry { - u32 magic; - u32 start; - u32 size; - u32 id; -} __attribute__((packed)); - -struct cbmem_root { - u32 max_entries; - u32 num_entries; - u32 locked; - u32 size; - struct cbmem_entry entries[0]; -} __attribute__((packed)); - - -#if !defined(__PRE_RAM__) -static void *cached_cbmem_top; - -void cbmem_set_top(void * ramtop) -{ - cached_cbmem_top = ramtop; -} -#endif - -static inline void *cbmem_top_cached(void) -{ -#if !defined(__PRE_RAM__) - if (cached_cbmem_top == NULL) - cached_cbmem_top = cbmem_top(); - - return cached_cbmem_top; -#else - return cbmem_top(); -#endif -} - -static inline uintptr_t get_top_aligned(void) -{ - uintptr_t top; - - /* Align down what is returned from cbmem_top(). */ - top = (uintptr_t)cbmem_top_cached(); - top &= ~(DYN_CBMEM_ALIGN_SIZE - 1); - - return top; -} - -static inline void *get_root(void) -{ - uintptr_t pointer_addr; - struct cbmem_root_pointer *pointer; - - pointer_addr = get_top_aligned(); - if (pointer_addr == 0) - return NULL; - - pointer_addr -= sizeof(struct cbmem_root_pointer); - - pointer = (void *)pointer_addr; - if (pointer->magic != CBMEM_POINTER_MAGIC) - return NULL; - - pointer_addr = pointer->root; - return (void *)pointer_addr; -} - -static inline void cbmem_entry_assign(struct cbmem_entry *entry, - u32 id, u32 start, u32 size) -{ - entry->magic = CBMEM_ENTRY_MAGIC; - entry->start = start; - entry->size = size; - entry->id = id; -} - -static inline const struct cbmem_entry * -cbmem_entry_append(struct cbmem_root *root, u32 id, u32 start, u32 size) -{ - struct cbmem_entry *cbmem_entry; - - cbmem_entry = &root->entries[root->num_entries]; - root->num_entries++; - - cbmem_entry_assign(cbmem_entry, id, start, size); - - return cbmem_entry; -} - -void cbmem_initialize_empty(void) -{ - uintptr_t pointer_addr; - uintptr_t root_addr; - unsigned long max_entries; - struct cbmem_root *root; - struct cbmem_root_pointer *pointer; - - /* Place the root pointer and the root. The number of entries is - * dictated by difference between the root address and the pointer - * where the root address is aligned down to - * DYN_CBMEM_ALIGN_SIZE. The pointer falls just below the - * address returned by get_top_aligned(). */ - pointer_addr = get_top_aligned(); - if (pointer_addr == 0) - return; - - root_addr = pointer_addr - ROOT_MIN_SIZE; - root_addr &= ~(DYN_CBMEM_ALIGN_SIZE - 1); - pointer_addr -= sizeof(struct cbmem_root_pointer); - - max_entries = (pointer_addr - (root_addr + sizeof(*root))) / - sizeof(struct cbmem_entry); - - pointer = (void *)pointer_addr; - pointer->magic = CBMEM_POINTER_MAGIC; - pointer->root = root_addr; - - root = (void *)root_addr; - root->max_entries = max_entries; - root->num_entries = 0; - root->locked = 0; - root->size = pointer_addr - root_addr + - sizeof(struct cbmem_root_pointer); - - /* Add an entry covering the root region. */ - cbmem_entry_append(root, CBMEM_ID_ROOT, root_addr, root->size); - - printk(BIOS_DEBUG, "CBMEM: root @ %p %d entries.\n", - root, root->max_entries); - - /* Complete migration to CBMEM. */ - cbmem_run_init_hooks(); -} - -static inline int cbmem_fail_recovery(void) -{ - cbmem_initialize_empty(); - cbmem_fail_resume(); - return 1; -} - -static int validate_entries(struct cbmem_root *root) -{ - unsigned int i; - uintptr_t current_end; - - current_end = get_top_aligned(); - - printk(BIOS_DEBUG, "CBMEM: recovering %d/%d entries from root @ %p\n", - root->num_entries, root->max_entries, root); - - /* Check that all regions are properly aligned and are just below - * the previous entry */ - for (i = 0; i < root->num_entries; i++) { - struct cbmem_entry *entry = &root->entries[i]; - - if (entry->magic != CBMEM_ENTRY_MAGIC) - return -1; - - if (entry->start & (DYN_CBMEM_ALIGN_SIZE - 1)) - return -1; - - if (entry->start + entry->size != current_end) - return -1; - - current_end = entry->start; - } - - return 0; -} - -int cbmem_initialize(void) -{ - struct cbmem_root *root; - uintptr_t top_according_to_root; - - root = get_root(); - - /* No recovery possible since root couldn't be recovered. */ - if (root == NULL) - return cbmem_fail_recovery(); - - /* Sanity check the root. */ - top_according_to_root = (root->size + (uintptr_t)root); - if (get_top_aligned() != top_according_to_root) - return cbmem_fail_recovery(); - - if (root->num_entries > root->max_entries) - return cbmem_fail_recovery(); - - if ((root->max_entries * sizeof(struct cbmem_entry)) > - (root->size - sizeof(struct cbmem_root_pointer) - sizeof(*root))) - return cbmem_fail_recovery(); - - /* Validate current entries. */ - if (validate_entries(root)) - return cbmem_fail_recovery(); - -#if defined(__PRE_RAM__) - /* Lock the root in the romstage on a recovery. The assumption is that - * recovery is called during romstage on the S3 resume path. */ - root->locked = 1; -#endif - - /* Complete migration to CBMEM. */ - cbmem_run_init_hooks(); - - /* Recovery successful. */ - return 0; -} - -int cbmem_recovery(int is_wakeup) -{ - int rv = 0; - if (!is_wakeup) - cbmem_initialize_empty(); - else - rv = cbmem_initialize(); - return rv; -} - -static uintptr_t cbmem_base(void) -{ - struct cbmem_root *root; - uintptr_t low_addr; - - root = get_root(); - - if (root == NULL) - return 0; - - low_addr = (uintptr_t)root; - /* a low address is low. */ - low_addr &= 0xffffffff; - - /* Assume the lowest address is the last one added. */ - if (root->num_entries > 0) { - low_addr = root->entries[root->num_entries - 1].start; - } - - return low_addr; -} - - -const struct cbmem_entry *cbmem_entry_add(u32 id, u64 size64) -{ - struct cbmem_root *root; - const struct cbmem_entry *entry; - uintptr_t base; - u32 size; - u32 aligned_size; - - entry = cbmem_entry_find(id); - - if (entry != NULL) - return entry; - - /* Only handle sizes <= UINT_MAX internally. */ - if (size64 > (u64)UINT_MAX) - return NULL; - - size = size64; - - root = get_root(); - - if (root == NULL) - return NULL; - - /* Nothing can be added once it is locked down. */ - if (root->locked) - return NULL; - - if (root->max_entries == root->num_entries) - return NULL; - - aligned_size = ALIGN(size, DYN_CBMEM_ALIGN_SIZE); - base = cbmem_base(); - base -= aligned_size; - - return cbmem_entry_append(root, id, base, aligned_size); -} - -void *cbmem_add(u32 id, u64 size) -{ - const struct cbmem_entry *entry; - - entry = cbmem_entry_add(id, size); - - if (entry == NULL) - return NULL; - - return cbmem_entry_start(entry); -} - -/* Retrieve a region provided a given id. */ -const struct cbmem_entry *cbmem_entry_find(u32 id) -{ - struct cbmem_root *root; - const struct cbmem_entry *entry; - unsigned int i; - - root = get_root(); - - if (root == NULL) - return NULL; - - entry = NULL; - - for (i = 0; i < root->num_entries; i++) { - if (root->entries[i].id == id) { - entry = &root->entries[i]; - break; - } - } - - return entry; -} - -void *cbmem_find(u32 id) -{ - const struct cbmem_entry *entry; - - entry = cbmem_entry_find(id); - - if (entry == NULL) - return NULL; - - return cbmem_entry_start(entry); -} - -/* Remove a reserved region. Returns 0 on success, < 0 on error. Note: A region - * cannot be removed unless it was the last one added. */ -int cbmem_entry_remove(const struct cbmem_entry *entry) -{ - unsigned long entry_num; - struct cbmem_root *root; - - root = get_root(); - - if (root == NULL) - return -1; - - if (root->num_entries == 0) - return -1; - - /* Nothing can be removed. */ - if (root->locked) - return -1; - - entry_num = entry - &root->entries[0]; - - /* If the entry is the last one in the root it can be removed. */ - if (entry_num == (root->num_entries - 1)) { - root->num_entries--; - return 0; - } - - return -1; -} - -u64 cbmem_entry_size(const struct cbmem_entry *entry) -{ - return entry->size; -} - -void *cbmem_entry_start(const struct cbmem_entry *entry) -{ - uintptr_t addr = entry->start; - return (void *)addr; -} - - -#if !defined(__PRE_RAM__) - -void cbmem_add_bootmem(void) -{ - uintptr_t base; - uintptr_t top; - - base = cbmem_base(); - top = get_top_aligned(); - bootmem_add_range(base, top - base, LB_MEM_TABLE); -} - -static const struct { - u32 id; - const char *name; -} cbmem_ids[] = { CBMEM_ID_TO_NAME_TABLE }; - -static void cbmem_print_entry(int n, u32 id, u64 base, u64 size) -{ - int i; - const char *name; - - name = NULL; - for (i = 0; i < ARRAY_SIZE(cbmem_ids); i++) { - if (cbmem_ids[i].id == id) { - name = cbmem_ids[i].name; - break; - } - } - - if (name == NULL) - printk(BIOS_DEBUG, "%08x ", id); - else - printk(BIOS_DEBUG, "%s", name); - printk(BIOS_DEBUG, "%2d. ", n); - printk(BIOS_DEBUG, "%08llx ", base); - printk(BIOS_DEBUG, "%08llx\n", size); -} - -void cbmem_list(void) -{ - unsigned int i; - struct cbmem_root *root; - - root = get_root(); - - if (root == NULL) - return; - - for (i = 0; i < root->num_entries; i++) { - struct cbmem_entry *entry; - - entry = &root->entries[i]; - - cbmem_print_entry(i, entry->id, entry->start, entry->size); - } -} -#endif /* __PRE_RAM__ */ diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c index afe4fa2..03dc883 100644 --- a/src/lib/imd_cbmem.c +++ b/src/lib/imd_cbmem.c @@ -37,12 +37,19 @@ #define SM_ROOT_SIZE 1024 #define SM_ALIGN 32 +#if !defined(__PRE_RAM__) || IS_ENABLED(CONFIG_PLATFORM_HAS_EARLY_WRITABLE_GLOBALS) static struct imd imd_cbmem CAR_GLOBAL = { }; static inline struct imd *cbmem_get_imd(void) { return car_get_var_ptr(&imd_cbmem); } +#else +static inline struct imd *cbmem_get_imd(void) +{ + return NULL; +} +#endif #if ENV_RAMSTAGE void cbmem_set_top(void *ramtop) @@ -63,19 +70,50 @@ static inline const struct imd_entry *cbmem_to_imd(const struct cbmem_entry *e) return (const struct imd_entry *)e; } -void cbmem_initialize_empty(void) +static struct imd *imd_init_backing(struct imd *backing) { struct imd *imd; imd = cbmem_get_imd(); + if (imd != NULL) + return imd; + + imd = backing; imd_handle_init(imd, cbmem_top()); - printk(BIOS_DEBUG, "CBMEM: "); + return imd; +} + +static struct imd *imd_init_backing_with_recover(struct imd *backing) +{ + struct imd *imd; + + imd = imd_init_backing(backing); + + if (imd == NULL || imd_recover(imd)) + return NULL; + + return imd; +} + +void cbmem_initialize_empty(void) +{ + struct imd *imd; + struct imd imd_backing; + + imd = imd_init_backing(&imd_backing); + + if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + imd_handle_init(imd, cbmem_top()); + + printk(BIOS_DEBUG, "CBMEM: %s: ", __func__); if (imd_create_tiered_empty(imd, ROOT_MIN_SIZE, LG_ALIGN, - SM_ROOT_SIZE, SM_ALIGN)) + SM_ROOT_SIZE, SM_ALIGN)) { + printk(BIOS_DEBUG, "failed.\n"); return; + } /* Complete migration to CBMEM. */ cbmem_run_init_hooks(); @@ -91,13 +129,20 @@ static inline int cbmem_fail_recovery(void) int cbmem_initialize(void) { struct imd *imd; + struct imd imd_backing; - imd = cbmem_get_imd(); - - imd_handle_init(imd, cbmem_top()); + imd = imd_init_backing(&imd_backing); - if (imd_recover(imd) != 0) + if (imd == NULL) { + printk(BIOS_DEBUG, "CBMEM: %s recovery failed.\n", __func__); return cbmem_fail_recovery(); + } + + if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + imd_handle_init(imd, cbmem_top()); + + if (imd_recover(imd)) + return 1; #if defined(__PRE_RAM__) /* @@ -128,9 +173,13 @@ int cbmem_recovery(int is_wakeup) const struct cbmem_entry *cbmem_entry_add(u32 id, u64 size64) { struct imd *imd; + struct imd imd_backing; const struct imd_entry *e; - imd = cbmem_get_imd(); + imd = imd_init_backing_with_recover(&imd_backing); + + if (imd == NULL) + return NULL; e = imd_entry_find_or_add(imd, id, size64); @@ -153,9 +202,13 @@ void *cbmem_add(u32 id, u64 size) const struct cbmem_entry *cbmem_entry_find(u32 id) { struct imd *imd; + struct imd imd_backing; const struct imd_entry *e; - imd = cbmem_get_imd(); + imd = imd_init_backing_with_recover(&imd_backing); + + if (imd == NULL) + return NULL; e = imd_entry_find(imd, id); @@ -178,23 +231,41 @@ void *cbmem_find(u32 id) * cannot be removed unless it was the last one added. */ int cbmem_entry_remove(const struct cbmem_entry *entry) { - const struct imd_entry *e = cbmem_to_imd(entry); + struct imd *imd; + struct imd imd_backing; + + imd = imd_init_backing_with_recover(&imd_backing); + + if (imd == NULL) + return -1; - return imd_entry_remove(cbmem_get_imd(), e); + return imd_entry_remove(imd, cbmem_to_imd(entry)); } u64 cbmem_entry_size(const struct cbmem_entry *entry) { - const struct imd_entry *e = cbmem_to_imd(entry); + struct imd *imd; + struct imd imd_backing; + + imd = imd_init_backing_with_recover(&imd_backing); - return imd_entry_size(cbmem_get_imd(), e); + if (imd == NULL) + return 0; + + return imd_entry_size(imd, cbmem_to_imd(entry)); } void *cbmem_entry_start(const struct cbmem_entry *entry) { - const struct imd_entry *e = cbmem_to_imd(entry); + struct imd *imd; + struct imd imd_backing; + + imd = imd_init_backing_with_recover(&imd_backing); + + if (imd == NULL) + return NULL; - return imd_entry_at(cbmem_get_imd(), e); + return imd_entry_at(imd, cbmem_to_imd(entry)); } #if !defined(__PRE_RAM__)

1 0

Patch set updated for coreboot: 088972c coreboot: differentiate on early reliable writable globals
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8943 -gerrit commit 088972c2f630bc52c33904447d3eb9a0138e1141 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Mar 24 09:20:45 2015 -0500 coreboot: differentiate on early reliable writable globals There is a big difference between the boards supported in coreboot and the properties they provide within each stage during the bootflow. The leads to core infrastructure relying on supporting the least common denominator when writing APIs. Therefore, provide PLATFORM_HAS_EARLY_WRITABLE_GLOBALS which indicates that the platform has reliable writable global variables in the early stages of boot. For x86 that would be romstage, and for the other architetures which have SRAM it would encompass bootblock and romstage. Change-Id: I2cefeaee0551ee241e138fcee0d199679002c3be Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/Kconfig | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/Kconfig b/src/Kconfig index 7aee478..2625266 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -293,6 +293,25 @@ config SYSTEM_TYPE_LAPTOP default n bool +config PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + bool + default y if !ARCH_X86 + help + This option signals to the rest of the infrastructure that + the platform supports writable globals in bootblock and + romstage. Fox traditional x86 systems without any SRAM this + would mean cache-as-ram globals are migrated correctly from + the CAR area once memory is trained. After the migration the + variables are accessible using the CAR API. This behavior + puts such x86 systems on par with ARM and MIPS systems. + +config PLATFORM_NO_EARLY_WRITABLE_GLOBALS + bool + default y if !PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + help + This is just the opposite of PLATFORM_HAS_EARLY_WRITABLE_GLOBALS + to enable cleaner Makefiles. + menu "Chipset" comment "CPU"

1 0

Patch set updated for coreboot: 69cdb1b cbfs: remove run_address()
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9124 -gerrit commit 69cdb1b30e5e0c88d84fca525847b9d58c31fd1d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 11:09:03 2015 -0500 cbfs: remove run_address() The run_address() function is not used. Remove it. Change-Id: I96de4cf0a529b08943ff8281cedead642eb415de Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/cbfs.h | 3 --- src/lib/cbfs.c | 14 -------------- 2 files changed, 17 deletions(-) diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 2478c4c..84fe251 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -76,9 +76,6 @@ void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, const void *address); -// Utility functions -int run_address(void *f); - /* Defined in individual arch / board implementation. */ int init_default_cbfs_media(struct cbfs_media *media); diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 54ec8d0..0fddb53 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -203,18 +203,4 @@ void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, return NULL; } -/** - * run_address is passed the address of a function taking no parameters and - * jumps to it, returning the result. - * @param f the address to call as a function. - * @return value returned by the function. - */ - -int run_address(void *f) -{ - int (*v) (void); - v = f; - return v(); -} - #endif

1 0

Patch set updated for coreboot: 7d8fa15 cbfs: add cbfs_serialized.h header file
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9125 -gerrit commit 7d8fa1513402a5b6623628385a00d6fc9b4c763b Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 11:05:26 2015 -0500 cbfs: add cbfs_serialized.h header file The serialized format of CBFS is separate from the APIs used to traverse and read from CBFS. Separate those out so they can be consumed as a standalone header. Change-Id: I09f71d9c474ee9f23a62b0062ffa777963d1a4dd Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/include/arch/cbfs.h | 5 +- src/include/cbfs_core.h | 121 +------------------------ src/include/cbfs_serialized.h | 184 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 189 insertions(+), 121 deletions(-) diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h index 964eb4e..f2aed3b 100644 --- a/src/arch/x86/include/arch/cbfs.h +++ b/src/arch/x86/include/arch/cbfs.h @@ -20,7 +20,10 @@ #ifndef __INCLUDE_ARCH_CBFS__ #define __INCLUDE_ARCH_CBFS__ -#include <cbfs_core.h> +#include <arch/byteorder.h> +#include <cbfs_serialized.h> + +#define CBFS_SUBHEADER(_p) ( (void *) ((((uint8_t *) (_p)) + ntohl((_p)->offset))) ) static struct cbfs_file *walkcbfs_head(char *target) { diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h index b01a307..c71cc26 100644 --- a/src/include/cbfs_core.h +++ b/src/include/cbfs_core.h @@ -54,86 +54,10 @@ #include <endian.h> #include <stddef.h> #include <stdint.h> - -/** These are standard values for the known compression - algorithms that coreboot knows about for stages and - payloads. Of course, other CBFS users can use whatever - values they want, as long as they understand them. */ - -#define CBFS_COMPRESS_NONE 0 -#define CBFS_COMPRESS_LZMA 1 - -/** These are standard component types for well known - components (i.e - those that coreboot needs to consume. - Users are welcome to use any other value for their - components */ - -#define CBFS_TYPE_STAGE 0x10 -#define CBFS_TYPE_PAYLOAD 0x20 -#define CBFS_TYPE_OPTIONROM 0x30 -#define CBFS_TYPE_BOOTSPLASH 0x40 -#define CBFS_TYPE_RAW 0x50 -#define CBFS_TYPE_VSA 0x51 -#define CBFS_TYPE_MBI 0x52 -#define CBFS_TYPE_MICROCODE 0x53 -#define CBFS_COMPONENT_CMOS_DEFAULT 0xaa -#define CBFS_COMPONENT_CMOS_LAYOUT 0x01aa - -#define CBFS_HEADER_MAGIC 0x4F524243 -#define CBFS_HEADER_VERSION1 0x31313131 -#define CBFS_HEADER_VERSION2 0x31313132 -#define CBFS_HEADER_VERSION CBFS_HEADER_VERSION2 +#include <cbfs_serialized.h> #define CBFS_HEADER_INVALID_ADDRESS ((void*)(0xffffffff)) -/** this is the master cbfs header - it need to be located somewhere available - to bootblock (to load romstage). Where it actually lives is up to coreboot. - On x86, a pointer to this header will live at 0xFFFFFFFC. - For other platforms, you need to define CONFIG_CBFS_HEADER_ROM_OFFSET */ - -struct cbfs_header { - uint32_t magic; - uint32_t version; - uint32_t romsize; - uint32_t bootblocksize; - uint32_t align; - uint32_t offset; - uint32_t architecture; - uint32_t pad[1]; -} __attribute__((packed)); - -/* "Unknown" refers to CBFS headers version 1, - * before the architecture was defined (i.e., x86 only). - */ -#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF -#define CBFS_ARCHITECTURE_X86 0x00000001 -#define CBFS_ARCHITECTURE_ARM 0x00000010 - -/** This is a component header - every entry in the CBFS - will have this header. - - This is how the component is arranged in the ROM: - - -------------- <- 0 - component header - -------------- <- sizeof(struct component) - component name - -------------- <- offset - data - ... - -------------- <- offset + len -*/ - -#define CBFS_FILE_MAGIC "LARCHIVE" - -struct cbfs_file { - char magic[8]; - uint32_t len; - uint32_t type; - uint32_t checksum; - uint32_t offset; -} __attribute__((packed)); - #define CBFS_NAME(_c) (((char *) (_c)) + sizeof(struct cbfs_file)) #define CBFS_SUBHEADER(_p) ( (void *) ((((uint8_t *) (_p)) + ntohl((_p)->offset))) ) @@ -143,49 +67,6 @@ struct cbfs_file { */ #ifndef __ROMCC__ -/*** Component sub-headers ***/ - -/* Following are component sub-headers for the "standard" - component types */ - -/** This is the sub-header for stage components. Stages are - loaded by coreboot during the normal boot process */ - -struct cbfs_stage { - uint32_t compression; /** Compression type */ - uint64_t entry; /** entry point */ - uint64_t load; /** Where to load in memory */ - uint32_t len; /** length of data to load */ - uint32_t memlen; /** total length of object in memory */ -} __attribute__((packed)); - -/** this is the sub-header for payload components. Payloads - are loaded by coreboot at the end of the boot process */ - -struct cbfs_payload_segment { - uint32_t type; - uint32_t compression; - uint32_t offset; - uint64_t load_addr; - uint32_t len; - uint32_t mem_len; -} __attribute__((packed)); - -struct cbfs_payload { - struct cbfs_payload_segment segments; -}; - -#define PAYLOAD_SEGMENT_CODE 0x45444F43 -#define PAYLOAD_SEGMENT_DATA 0x41544144 -#define PAYLOAD_SEGMENT_BSS 0x20535342 -#define PAYLOAD_SEGMENT_PARAMS 0x41524150 -#define PAYLOAD_SEGMENT_ENTRY 0x52544E45 - -struct cbfs_optionrom { - uint32_t compression; - uint32_t len; -} __attribute__((packed)); - #define CBFS_MEDIA_INVALID_MAP_ADDRESS ((void*)(0xffffffff)) #define CBFS_DEFAULT_MEDIA ((void*)(0x0)) diff --git a/src/include/cbfs_serialized.h b/src/include/cbfs_serialized.h new file mode 100644 index 0000000..ecb5870 --- /dev/null +++ b/src/include/cbfs_serialized.h @@ -0,0 +1,184 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> + * Copyright (C) 2012 Google, Inc. + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * This file is dual-licensed. You can choose between: + * - The GNU GPL, version 2, as published by the Free Software Foundation + * - The revised BSD license (without advertising clause) + * + * --------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + * --------------------------------------------------------------------------- + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * --------------------------------------------------------------------------- + */ + +#ifndef _CBFS_SERIALIZED_H_ +#define _CBFS_SERIALIZED_H_ + +#include <stdint.h> + +/** These are standard values for the known compression + algorithms that coreboot knows about for stages and + payloads. Of course, other CBFS users can use whatever + values they want, as long as they understand them. */ + +#define CBFS_COMPRESS_NONE 0 +#define CBFS_COMPRESS_LZMA 1 + +/** These are standard component types for well known + components (i.e - those that coreboot needs to consume. + Users are welcome to use any other value for their + components */ + +#define CBFS_TYPE_STAGE 0x10 +#define CBFS_TYPE_PAYLOAD 0x20 +#define CBFS_TYPE_OPTIONROM 0x30 +#define CBFS_TYPE_BOOTSPLASH 0x40 +#define CBFS_TYPE_RAW 0x50 +#define CBFS_TYPE_VSA 0x51 +#define CBFS_TYPE_MBI 0x52 +#define CBFS_TYPE_MICROCODE 0x53 +#define CBFS_COMPONENT_CMOS_DEFAULT 0xaa +#define CBFS_COMPONENT_CMOS_LAYOUT 0x01aa + +#define CBFS_HEADER_MAGIC 0x4F524243 +#define CBFS_HEADER_VERSION1 0x31313131 +#define CBFS_HEADER_VERSION2 0x31313132 +#define CBFS_HEADER_VERSION CBFS_HEADER_VERSION2 + +/** this is the master cbfs header - it need to be located somewhere available + to bootblock (to load romstage). Where it actually lives is up to coreboot. + On x86, a pointer to this header will live at 0xFFFFFFFC. + For other platforms, you need to define CONFIG_CBFS_HEADER_ROM_OFFSET */ + +struct cbfs_header { + uint32_t magic; + uint32_t version; + uint32_t romsize; + uint32_t bootblocksize; + uint32_t align; + uint32_t offset; + uint32_t architecture; + uint32_t pad[1]; +} __attribute__((packed)); + +/* "Unknown" refers to CBFS headers version 1, + * before the architecture was defined (i.e., x86 only). + */ +#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF +#define CBFS_ARCHITECTURE_X86 0x00000001 +#define CBFS_ARCHITECTURE_ARM 0x00000010 + +/** This is a component header - every entry in the CBFS + will have this header. + + This is how the component is arranged in the ROM: + + -------------- <- 0 + component header + -------------- <- sizeof(struct component) + component name + -------------- <- offset + data + ... + -------------- <- offset + len +*/ + +#define CBFS_FILE_MAGIC "LARCHIVE" + +struct cbfs_file { + char magic[8]; + uint32_t len; + uint32_t type; + uint32_t checksum; + uint32_t offset; +} __attribute__((packed)); + +/* + * ROMCC does not understand uint64_t, so we hide future definitions as they are + * unlikely to be ever needed from ROMCC + */ +#ifndef __ROMCC__ + +/*** Component sub-headers ***/ + +/* Following are component sub-headers for the "standard" + component types */ + +/** This is the sub-header for stage components. Stages are + loaded by coreboot during the normal boot process */ + +struct cbfs_stage { + uint32_t compression; /** Compression type */ + uint64_t entry; /** entry point */ + uint64_t load; /** Where to load in memory */ + uint32_t len; /** length of data to load */ + uint32_t memlen; /** total length of object in memory */ +} __attribute__((packed)); + +/** this is the sub-header for payload components. Payloads + are loaded by coreboot at the end of the boot process */ + +struct cbfs_payload_segment { + uint32_t type; + uint32_t compression; + uint32_t offset; + uint64_t load_addr; + uint32_t len; + uint32_t mem_len; +} __attribute__((packed)); + +struct cbfs_payload { + struct cbfs_payload_segment segments; +}; + +#define PAYLOAD_SEGMENT_CODE 0x45444F43 +#define PAYLOAD_SEGMENT_DATA 0x41544144 +#define PAYLOAD_SEGMENT_BSS 0x20535342 +#define PAYLOAD_SEGMENT_PARAMS 0x41524150 +#define PAYLOAD_SEGMENT_ENTRY 0x52544E45 + +struct cbfs_optionrom { + uint32_t compression; + uint32_t len; +} __attribute__((packed)); + +#endif /* __ROMCC__ */ + +#endif /* _CBFS_SERIALIZED_H_ */

1 0

Patch set updated for coreboot: b8df707 cbfs: remove cbfs_core.h includes
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9126 -gerrit commit b8df7079cca986dc9c3c30150171dbacbf805cbf Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 21:04:18 2015 -0500 cbfs: remove cbfs_core.h includes Some of the files which include cbfs_core.h don't even need the header definition while others just need the cbfs API which can be obtained from cbfs.h. Change-Id: I34f3b7c67f64380dcf957e662ffca2baefc31a90 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/gma/intel_ddi.c | 1 - src/lib/rmodule.c | 2 +- src/mainboard/google/falco/gma.c | 1 - src/mainboard/google/link/i915.c | 1 - src/mainboard/google/peppy/gma.c | 1 - src/mainboard/intel/wtm2/i915.c | 1 - src/soc/nvidia/tegra124/spi.c | 1 - src/soc/nvidia/tegra132/spi.c | 1 - 8 files changed, 1 insertion(+), 8 deletions(-) diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index e51fb9c..9127060 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -42,7 +42,6 @@ #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> -#include <cbfs_core.h> #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index 2aed676..d7dc969 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -18,7 +18,7 @@ */ #include <assert.h> #include <cbmem.h> -#include <cbfs_core.h> +#include <cbfs.h> #include <stdint.h> #include <stdlib.h> #include <string.h> diff --git a/src/mainboard/google/falco/gma.c b/src/mainboard/google/falco/gma.c index 6e3afdb..018075c 100644 --- a/src/mainboard/google/falco/gma.c +++ b/src/mainboard/google/falco/gma.c @@ -34,7 +34,6 @@ #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> -#include <cbfs_core.h> #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c index a9028dd..e377e43 100644 --- a/src/mainboard/google/link/i915.c +++ b/src/mainboard/google/link/i915.c @@ -38,7 +38,6 @@ #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> -#include <cbfs_core.h> #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> diff --git a/src/mainboard/google/peppy/gma.c b/src/mainboard/google/peppy/gma.c index 953dad9..8997da6 100644 --- a/src/mainboard/google/peppy/gma.c +++ b/src/mainboard/google/peppy/gma.c @@ -34,7 +34,6 @@ #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> -#include <cbfs_core.h> #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> diff --git a/src/mainboard/intel/wtm2/i915.c b/src/mainboard/intel/wtm2/i915.c index 72957a0..3fb8acb 100644 --- a/src/mainboard/intel/wtm2/i915.c +++ b/src/mainboard/intel/wtm2/i915.c @@ -34,7 +34,6 @@ #include <smbios.h> #include <device/pci.h> #include <ec/google/chromeec/ec.h> -#include <cbfs_core.h> #include <cpu/x86/tsc.h> #include <cpu/x86/cache.h> diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index 78a17d9..b88306b 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -20,7 +20,6 @@ #include <assert.h> #include <cbfs.h> -#include <cbfs_core.h> #include <inttypes.h> #include <spi-generic.h> #include <spi_flash.h> diff --git a/src/soc/nvidia/tegra132/spi.c b/src/soc/nvidia/tegra132/spi.c index 882a6ad..219998c 100644 --- a/src/soc/nvidia/tegra132/spi.c +++ b/src/soc/nvidia/tegra132/spi.c @@ -20,7 +20,6 @@ #include <assert.h> #include <cbfs.h> -#include <cbfs_core.h> #include <inttypes.h> #include <spi-generic.h> #include <spi_flash.h>

1 0

Patch set updated for coreboot: b0ea15c cbfs: move cbfs.c to cbfs_gpl.c
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9127 -gerrit commit b0ea15c58a3a926dfbac861b1b7b7062f5b46cb9 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 21:17:17 2015 -0500 cbfs: move cbfs.c to cbfs_gpl.c In order to prepare for a new cbfs API move cbfs.c to cbfs_gpl.c. That way replacement implementatoins can be dropped in with the intent of making code review easier. Change-Id: Ifb732261aabfe94545cdd5f673e9f1422ad46085 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/cbfs.h | 63 +----------- src/include/cbfs_declarations.h | 82 ++++++++++++++++ src/lib/Makefile.inc | 10 +- src/lib/cbfs.c | 206 ---------------------------------------- src/lib/cbfs_gpl.c | 206 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 296 insertions(+), 271 deletions(-) diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 84fe251..315684e 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -1,14 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013-2015 Google, Inc. + * Copyright 2015 Google Inc. * - * This file is dual-licensed. You can choose between: - * - The GNU GPL, version 2, as published by the Free Software Foundation - * - The revised BSD license (without advertising clause) - * - * --------------------------------------------------------------------------- * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -20,63 +14,12 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - * --------------------------------------------------------------------------- - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * --------------------------------------------------------------------------- + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #ifndef _CBFS_H_ #define _CBFS_H_ -#include <cbfs_core.h> - -int init_backing_media(struct cbfs_media **media, struct cbfs_media *backing); -void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, - uint16_t device, void * dest); -void *cbfs_load_stage(struct cbfs_media *media, const char *name); -void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset); -/* Load a stage from a prog structure. Returns < 0 on error. 0 on success. */ -struct prog; -int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog); - -/* Simple buffer for streaming media. */ -struct cbfs_simple_buffer { - char *buffer; - size_t allocated; - size_t size; - size_t last_allocate; -}; - -void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, - struct cbfs_media *media, - size_t offset, size_t count); - -void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, - const void *address); - -/* Defined in individual arch / board implementation. */ -int init_default_cbfs_media(struct cbfs_media *media); +#include <cbfs_declarations.h> #endif diff --git a/src/include/cbfs_declarations.h b/src/include/cbfs_declarations.h new file mode 100644 index 0000000..2ac9c08 --- /dev/null +++ b/src/include/cbfs_declarations.h @@ -0,0 +1,82 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> + * Copyright (C) 2013-2015 Google, Inc. + * + * This file is dual-licensed. You can choose between: + * - The GNU GPL, version 2, as published by the Free Software Foundation + * - The revised BSD license (without advertising clause) + * + * --------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + * --------------------------------------------------------------------------- + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * --------------------------------------------------------------------------- + */ + +#ifndef _CBFS_DECLARATIONS_H_ +#define _CBFS_DECLARATIONS_H_ + +#include <cbfs_core.h> + +int init_backing_media(struct cbfs_media **media, struct cbfs_media *backing); +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void * dest); +void *cbfs_load_stage(struct cbfs_media *media, const char *name); +void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset); +/* Load a stage from a prog structure. Returns < 0 on error. 0 on success. */ +struct prog; +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog); + +/* Simple buffer for streaming media. */ +struct cbfs_simple_buffer { + char *buffer; + size_t allocated; + size_t size; + size_t last_allocate; +}; + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count); + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address); + +/* Defined in individual arch / board implementation. */ +int init_default_cbfs_media(struct cbfs_media *media); + +#endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 2d7f500..619f34f 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -19,7 +19,7 @@ subdirs-y += loaders bootblock-y += prog_ops.c -bootblock-y += cbfs.c cbfs_core.c +bootblock-y += cbfs_gpl.c cbfs_core.c bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -28,7 +28,7 @@ bootblock-y += memcmp.c verstage-y += prog_ops.c verstage-y += delay.c -verstage-y += cbfs.c +verstage-y += cbfs_gpl.c verstage-y += memcmp.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c @@ -42,7 +42,7 @@ $(foreach arch,$(ARCH_SUPPORTED),\ $(eval rmodules_$(arch)-y += memcmp.c)) romstage-$(CONFIG_I2C_TPM) += delay.c -romstage-y += cbfs.c cbfs_core.c +romstage-y += cbfs_gpl.c cbfs_core.c romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c @@ -72,7 +72,7 @@ smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += delay.c ramstage-y += fallback_boot.c ramstage-y += compute_ip_checksum.c -ramstage-y += cbfs.c cbfs_core.c +ramstage-y += cbfs_gpl.c cbfs_core.c ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c ramstage-y += lzma.c lzmadecode.c ramstage-y += stack.c @@ -113,7 +113,7 @@ romstage-y += cbmem_stage_cache.c endif -smm-y += cbfs.c cbfs_core.c memcmp.c +smm-y += cbfs_gpl.c cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c bootblock-y += version.c diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c deleted file mode 100644 index 0fddb53..0000000 --- a/src/lib/cbfs.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008, Jordan Crouse <jordan(a)cosmicpenguin.net> - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - - -#include <program_loading.h> -#include "cbfs_core.h" - -#ifndef __SMM__ -static inline int tohex4(unsigned int c) -{ - return (c <= 9) ? (c + '0') : (c - 10 + 'a'); -} - -static void tohex16(unsigned int val, char* dest) -{ - dest[0] = tohex4(val>>12); - dest[1] = tohex4((val>>8) & 0xf); - dest[2] = tohex4((val>>4) & 0xf); - dest[3] = tohex4(val & 0xf); -} - -void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, - uint16_t device, void *dest) -{ - char name[17] = "pciXXXX,XXXX.rom"; - struct cbfs_optionrom *orom; - uint8_t *src; - - tohex16(vendor, name+3); - tohex16(device, name+8); - - orom = (struct cbfs_optionrom *) - cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM, NULL); - - if (orom == NULL) - return NULL; - - /* They might have specified a dest address. If so, we can decompress. - * If not, there's not much hope of decompressing or relocating the rom. - * in the common case, the expansion rom is uncompressed, we - * pass 0 in for the dest, and all we have to do is find the rom and - * return a pointer to it. - */ - - /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */ - src = (uint8_t *)orom; // + sizeof(struct cbfs_optionrom); - - if (! dest) - return src; - - if (!cbfs_decompress(ntohl(orom->compression), - src, - dest, - ntohl(orom->len))) - return NULL; - - return dest; -} - -static int cbfs_load_prog_stage_by_offset(struct cbfs_media *media, - struct prog *prog, ssize_t offset) -{ - struct cbfs_stage stage; - struct cbfs_media backing_store; - - if (init_backing_media(&media, &backing_store)) - return -1; - - if (cbfs_read(media, &stage, offset, sizeof(stage)) != sizeof(stage)) { - ERROR("ERROR: failed to read stage header\n"); - return -1; - } - - LOG("loading stage @ 0x%llx (%d bytes), entry @ 0x%llx\n", - stage.load, stage.memlen, stage.entry); - - /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)(uintptr_t)stage.load, 0, stage.memlen); - - if (stage.compression == CBFS_COMPRESS_NONE) { - if (cbfs_read(media, (void *)(uintptr_t)stage.load, - offset + sizeof(stage), stage.len) != stage.len) { - ERROR("ERROR: Reading stage failed.\n"); - return -1; - } - } else { - void *data = media->map(media, offset + sizeof(stage), - stage.len); - if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { - ERROR("ERROR: Mapping stage failed.\n"); - return -1; - } - if (!cbfs_decompress(stage.compression, data, - (void *)(uintptr_t)stage.load, stage.len)) - return -1; - media->unmap(media, data); - } - - arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); - DEBUG("stage loaded\n"); - - prog_set_area(prog, (void *)(uintptr_t)stage.load, stage.memlen); - prog_set_entry(prog, (void *)(uintptr_t)stage.entry, NULL); - - return 0; -} - -int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog) -{ - struct cbfs_file file; - ssize_t offset; - struct cbfs_media backing_store; - - if (init_backing_media(&media, &backing_store)) - return -1; - - offset = cbfs_locate_file(media, &file, prog->name); - if (offset < 0 || file.type != CBFS_TYPE_STAGE) - return -1; - - if (cbfs_load_prog_stage_by_offset(media, prog, offset) < 0) - return -1; - - return 0; -} - -void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) -{ - struct prog prog = { - .name = NULL, - }; - - if (cbfs_load_prog_stage_by_offset(media, &prog, offset) < 0) - return (void *)-1; - - return prog_entry(&prog); -} - -void *cbfs_load_stage(struct cbfs_media *media, const char *name) -{ - struct prog prog = { - .name = name, - }; - - if (cbfs_load_prog_stage(media, &prog) < 0) - return (void *)-1; - - return prog_entry(&prog); -} - -/* Simple buffer */ - -void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, - struct cbfs_media *media, - size_t offset, size_t count) { - void *address = buffer->buffer + buffer->allocated; - DEBUG("simple_buffer_map(offset=%zd, count=%zd): " - "allocated=%zd, size=%zd, last_allocate=%zd\n", - offset, count, buffer->allocated, buffer->size, - buffer->last_allocate); - if (buffer->allocated + count >= buffer->size) - return CBFS_MEDIA_INVALID_MAP_ADDRESS; - if (media->read(media, address, offset, count) != count) { - ERROR("simple_buffer: fail to read %zd bytes from 0x%zx\n", - count, offset); - return CBFS_MEDIA_INVALID_MAP_ADDRESS; - } - buffer->allocated += count; - buffer->last_allocate = count; - return address; -} - -void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, - const void *address) { - // TODO Add simple buffer management so we can free more than last - // allocated one. - DEBUG("simple_buffer_unmap(address=0x%p): " - "allocated=%zd, size=%zd, last_allocate=%zd\n", - address, buffer->allocated, buffer->size, - buffer->last_allocate); - if ((buffer->buffer + buffer->allocated - buffer->last_allocate) == - address) { - buffer->allocated -= buffer->last_allocate; - buffer->last_allocate = 0; - } - return NULL; -} - -#endif diff --git a/src/lib/cbfs_gpl.c b/src/lib/cbfs_gpl.c new file mode 100644 index 0000000..0fddb53 --- /dev/null +++ b/src/lib/cbfs_gpl.c @@ -0,0 +1,206 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008, Jordan Crouse <jordan(a)cosmicpenguin.net> + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + + +#include <program_loading.h> +#include "cbfs_core.h" + +#ifndef __SMM__ +static inline int tohex4(unsigned int c) +{ + return (c <= 9) ? (c + '0') : (c - 10 + 'a'); +} + +static void tohex16(unsigned int val, char* dest) +{ + dest[0] = tohex4(val>>12); + dest[1] = tohex4((val>>8) & 0xf); + dest[2] = tohex4((val>>4) & 0xf); + dest[3] = tohex4(val & 0xf); +} + +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void *dest) +{ + char name[17] = "pciXXXX,XXXX.rom"; + struct cbfs_optionrom *orom; + uint8_t *src; + + tohex16(vendor, name+3); + tohex16(device, name+8); + + orom = (struct cbfs_optionrom *) + cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM, NULL); + + if (orom == NULL) + return NULL; + + /* They might have specified a dest address. If so, we can decompress. + * If not, there's not much hope of decompressing or relocating the rom. + * in the common case, the expansion rom is uncompressed, we + * pass 0 in for the dest, and all we have to do is find the rom and + * return a pointer to it. + */ + + /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */ + src = (uint8_t *)orom; // + sizeof(struct cbfs_optionrom); + + if (! dest) + return src; + + if (!cbfs_decompress(ntohl(orom->compression), + src, + dest, + ntohl(orom->len))) + return NULL; + + return dest; +} + +static int cbfs_load_prog_stage_by_offset(struct cbfs_media *media, + struct prog *prog, ssize_t offset) +{ + struct cbfs_stage stage; + struct cbfs_media backing_store; + + if (init_backing_media(&media, &backing_store)) + return -1; + + if (cbfs_read(media, &stage, offset, sizeof(stage)) != sizeof(stage)) { + ERROR("ERROR: failed to read stage header\n"); + return -1; + } + + LOG("loading stage @ 0x%llx (%d bytes), entry @ 0x%llx\n", + stage.load, stage.memlen, stage.entry); + + /* Stages rely the below clearing so that the bss is initialized. */ + memset((void *)(uintptr_t)stage.load, 0, stage.memlen); + + if (stage.compression == CBFS_COMPRESS_NONE) { + if (cbfs_read(media, (void *)(uintptr_t)stage.load, + offset + sizeof(stage), stage.len) != stage.len) { + ERROR("ERROR: Reading stage failed.\n"); + return -1; + } + } else { + void *data = media->map(media, offset + sizeof(stage), + stage.len); + if (data == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("ERROR: Mapping stage failed.\n"); + return -1; + } + if (!cbfs_decompress(stage.compression, data, + (void *)(uintptr_t)stage.load, stage.len)) + return -1; + media->unmap(media, data); + } + + arch_segment_loaded(stage.load, stage.memlen, SEG_FINAL); + DEBUG("stage loaded\n"); + + prog_set_area(prog, (void *)(uintptr_t)stage.load, stage.memlen); + prog_set_entry(prog, (void *)(uintptr_t)stage.entry, NULL); + + return 0; +} + +int cbfs_load_prog_stage(struct cbfs_media *media, struct prog *prog) +{ + struct cbfs_file file; + ssize_t offset; + struct cbfs_media backing_store; + + if (init_backing_media(&media, &backing_store)) + return -1; + + offset = cbfs_locate_file(media, &file, prog->name); + if (offset < 0 || file.type != CBFS_TYPE_STAGE) + return -1; + + if (cbfs_load_prog_stage_by_offset(media, prog, offset) < 0) + return -1; + + return 0; +} + +void *cbfs_load_stage_by_offset(struct cbfs_media *media, ssize_t offset) +{ + struct prog prog = { + .name = NULL, + }; + + if (cbfs_load_prog_stage_by_offset(media, &prog, offset) < 0) + return (void *)-1; + + return prog_entry(&prog); +} + +void *cbfs_load_stage(struct cbfs_media *media, const char *name) +{ + struct prog prog = { + .name = name, + }; + + if (cbfs_load_prog_stage(media, &prog) < 0) + return (void *)-1; + + return prog_entry(&prog); +} + +/* Simple buffer */ + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count) { + void *address = buffer->buffer + buffer->allocated; + DEBUG("simple_buffer_map(offset=%zd, count=%zd): " + "allocated=%zd, size=%zd, last_allocate=%zd\n", + offset, count, buffer->allocated, buffer->size, + buffer->last_allocate); + if (buffer->allocated + count >= buffer->size) + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + if (media->read(media, address, offset, count) != count) { + ERROR("simple_buffer: fail to read %zd bytes from 0x%zx\n", + count, offset); + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + } + buffer->allocated += count; + buffer->last_allocate = count; + return address; +} + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address) { + // TODO Add simple buffer management so we can free more than last + // allocated one. + DEBUG("simple_buffer_unmap(address=0x%p): " + "allocated=%zd, size=%zd, last_allocate=%zd\n", + address, buffer->allocated, buffer->size, + buffer->last_allocate); + if ((buffer->buffer + buffer->allocated - buffer->last_allocate) == + address) { + buffer->allocated -= buffer->last_allocate; + buffer->last_allocate = 0; + } + return NULL; +} + +#endif

1 0

Patch set updated for coreboot: e760be1 coreboot: add region infrastructure
by Aaron Durbin 31 Mar '15

31 Mar '15

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9128 -gerrit commit e760be1d3483f7c3e783b369938cccf343c189f5 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Mar 26 14:39:07 2015 -0500 coreboot: add region infrastructure The region infrastructure provides a means of abstracting access to different types of storage such as SPI flash, MMC, or just plain memory. The regions are represented by region devices which can be chained together forming subregions of the larger region. Change-Id: I803f97567ef0505691a69975c282fde1215ea6da Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/region.h | 100 ++++++++++++++++++++++++++++++++++++++++++ src/lib/Makefile.inc | 4 ++ src/lib/region.c | 121 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+) diff --git a/src/include/region.h b/src/include/region.h new file mode 100644 index 0000000..4f8cda1 --- /dev/null +++ b/src/include/region.h @@ -0,0 +1,100 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _REGION_H_ +#define _REGION_H_ + +#include <stdint.h> +#include <stddef.h> + +/* + * Region support. + * + * Regions are intended to abstract away the access mechanisms for blocks of + * data. This could be SPI, eMMC, or a memory region as the backing store. + * They are accessed through a region_device. Subregions can be made by + * chaining together multiple region_devices. + */ + +struct region_device; + +/* + * Returns NULL on error otherwise a buffer is returned with the conents of + * the requested data at offset of size. + */ +void *rdev_mmap(const struct region_device *rd, size_t offset, size_t size); + +/* Unmap a previously mapped area. Returns 0 on success, < 0 on error. */ +int rdev_munmap(const struct region_device *rd, void *mapping); + +/* + * Returns < 0 on error otherwise returns size of data read at provided + * offset filling in the buffer passed. + */ +ssize_t rdev_readat(const struct region_device *rd, void *b, size_t offset, + size_t size); + + +/**************************************** + * Implementation of a region device * + ****************************************/ + +/* + * Create a child region of the parent provided the sub-region is within + * the parent's region. Returns < 0 on error otherwise 0 on success. Note + * that the child device only calls through the parent's operations. + */ +int rdev_chain(struct region_device *child, const struct region_device *parent, + size_t offset, size_t size); + + +/* A region_device operations. */ +struct region_device_ops { + void *(*mmap)(const struct region_device *, size_t, size_t); + int (*munmap)(const struct region_device *, void *); + ssize_t (*readat)(const struct region_device *, void *, size_t, size_t); +}; + +struct region { + size_t offset; + size_t size; +}; + +struct region_device { + const struct region_device *root; + const struct region_device_ops *ops; + struct region region; +}; + +#define REGION_DEV_INIT(ops_, offset_, size_) \ + { \ + .root = NULL, \ + .ops = (ops_), \ + .region = { \ + .offset = (offset_), \ + .size = (size_), \ + }, \ + } + +static inline size_t region_sz(const struct region *r) +{ + return r->size; +} + +#endif /* _REGION_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 619f34f..d641b11 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -25,11 +25,13 @@ bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c bootblock-y += memchr.c bootblock-y += memcmp.c +bootblock-y += region.c verstage-y += prog_ops.c verstage-y += delay.c verstage-y += cbfs_gpl.c verstage-y += memcmp.c +verstage-y += region.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c verstage-y += tlcl.c @@ -112,6 +114,8 @@ ramstage-y += cbmem_stage_cache.c romstage-y += cbmem_stage_cache.c endif +romstage-y += region.c +ramstage-y += region.c smm-y += cbfs_gpl.c cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c diff --git a/src/lib/region.c b/src/lib/region.c new file mode 100644 index 0000000..cf74784 --- /dev/null +++ b/src/lib/region.c @@ -0,0 +1,121 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <region.h> +#include <string.h> + +static inline size_t region_offset(const struct region *r) +{ + return r->offset; +} + +static inline size_t region_end(const struct region *r) +{ + return region_sz(r) + region_offset(r); +} + +static int is_subregion(const struct region *p, const struct region *c) +{ + if (region_offset(c) < region_offset(p)) + return 0; + + if (region_sz(c) > region_sz(p)) + return 0; + + if (region_end(c) > region_end(p)) + return 0; + + return 1; +} + +static int normalize_and_ok(const struct region *outer, struct region *inner) +{ + inner->offset += region_offset(outer); + return is_subregion(outer, inner); +} + +static const struct region_device *rdev_root(const struct region_device *rdev) +{ + if (rdev->root == NULL) + return rdev; + return rdev->root; +} + +void *rdev_mmap(const struct region_device *rd, size_t offset, size_t size) +{ + const struct region_device *rdev; + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&rd->region, &req)) + return NULL; + + rdev = rdev_root(rd); + + return rdev->ops->mmap(rdev, req.offset, req.size); +} + +int rdev_munmap(const struct region_device *rd, void *mapping) +{ + const struct region_device *rdev; + + rdev = rdev_root(rd); + + return rdev->ops->munmap(rdev, mapping); +} + +ssize_t rdev_readat(const struct region_device *rd, void *b, size_t offset, + size_t size) +{ + const struct region_device *rdev; + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&rd->region, &req)) + return -1; + + rdev = rdev_root(rd); + + return rdev->ops->readat(rdev, b, req.offset, req.size); +} + +int rdev_chain(struct region_device *child, const struct region_device *parent, + size_t offset, size_t size) +{ + struct region req = { + .offset = offset, + .size = size, + }; + + if (!normalize_and_ok(&parent->region, &req)) + return -1; + + /* Keep track of root region device. Note the offsets are relative + * to the root device. */ + child->root = rdev_root(parent); + child->ops = NULL; + child->region.offset = req.offset; + child->region.size = req.size; + + return 0; +}

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coreboot-gerrit March 2015