Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9129
-gerrit
commit 0535c431033a9b4e9237dbad136481e95a77a77d
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Thu Mar 26 12:29:12 2015 -0500
coreboot: add memory pool infrastructure
The memory pool infrastructure provides an allocator with
very simple free()ing semantics: only the most recent allocation
can be free from the pool. However, it can be reset and when
not used any longer.
Change-Id: I5ae9ab35bb769d78bbc2866c5ae3b5ce2cdce5fa
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/include/mem_pool.h | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++
src/lib/Makefile.inc | 5 ++++
src/lib/mem_pool.c | 51 +++++++++++++++++++++++++++++++++++
3 files changed, 129 insertions(+)
diff --git a/src/include/mem_pool.h b/src/include/mem_pool.h
new file mode 100644
index 0000000..ca01fcb
--- /dev/null
+++ b/src/include/mem_pool.h
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _MEM_POOL_H_
+#define _MEM_POOL_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+/*
+ * The memory pool allows one to allocate memory from a fixed size buffer
+ * that also allows freeing semantics for reuse. However, the current
+ * limitation is that the most recent allocation is the only one that
+ * can be freed. If one tries to free any allocation that isn't the
+ * most recently allocated it will result in a leak within the memory pool.
+ *
+ * The memory returned by allocations are at least 8 byte aligned. Note
+ * that this requires the backing buffer to start on at least an 8 byte
+ * alignment.
+ */
+
+struct mem_pool {
+ uint8_t *buf;
+ size_t size;
+ uint8_t *last_alloc;
+ size_t free_offset;
+};
+
+#define MEM_POOL_INIT(buf_, size_) \
+ { \
+ .buf = (buf_), \
+ .size = (size_), \
+ .last_alloc = NULL, \
+ .free_offset = 0, \
+ }
+
+static inline void mem_pool_reset(struct mem_pool *mp)
+{
+ mp->last_alloc = NULL;
+ mp->free_offset = 0;
+}
+
+/* Initialize a memory pool. */
+static inline void mem_pool_init(struct mem_pool *mp, void *buf, size_t sz)
+{
+ mp->buf = buf;
+ mp->size = sz;
+ mem_pool_reset(mp);
+}
+
+/* Allocate requested size from the memory pool. NULL returned on error. */
+void *mem_pool_alloc(struct mem_pool *mp, size_t sz);
+
+/* Free allocation from memory pool. */
+void mem_pool_free(struct mem_pool *mp, void *alloc);
+
+#endif /* _MEM_POOL_H_ */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 6f9b3b0..64a2623 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -25,6 +25,7 @@ bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
bootblock-y += memchr.c
bootblock-y += memcmp.c
+bootblock-y += mem_pool.c
bootblock-y += region.c
verstage-y += prog_ops.c
@@ -36,6 +37,7 @@ verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
verstage-y += tlcl.c
verstage-$(CONFIG_GENERIC_UDELAY) += timer.c
+verstage-y += mem_pool.c
romstage-y += prog_ops.c
romstage-y += memchr.c
@@ -114,6 +116,9 @@ ramstage-$(RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c
romstage-$(RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c
endif
+romstage-y += mem_pool.c
+ramstage-y += mem_pool.c
+
romstage-y += region.c
ramstage-y += region.c
diff --git a/src/lib/mem_pool.c b/src/lib/mem_pool.c
new file mode 100644
index 0000000..b3b2f5e
--- /dev/null
+++ b/src/lib/mem_pool.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <mem_pool.h>
+#include <stdlib.h>
+
+void *mem_pool_alloc(struct mem_pool *mp, size_t sz)
+{
+ void *p;
+
+ /* Make all allocations be at least 8 byte aligned. */
+ sz = ALIGN_UP(sz, 8);
+
+ /* Determine if any space available. */
+ if ((mp->size - mp->free_offset) < sz)
+ return NULL;
+
+ p = &mp->buf[mp->free_offset];
+
+ mp->free_offset += sz;
+ mp->last_alloc = p;
+
+ return p;
+}
+
+void mem_pool_free(struct mem_pool *mp, void *p)
+{
+ /* Determine if p was the most recent allocation. */
+ if (p == NULL || mp->last_alloc != p)
+ return;
+
+ mp->free_offset = mp->last_alloc - mp->buf;
+ /* No way to track allocation before this one. */
+ mp->last_alloc = NULL;
+}
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9130
-gerrit
commit db8e74c90bfb2067527b06e56fd6c043b6e26d7d
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Thu Mar 26 14:55:34 2015 -0500
x86: set smbios rom size based on CONFIG_ROM_SIZE
Instead of relying on the CBFS header's romsize field use
the CONFIG_ROM_SIZE Kconfig variable. That value is what is
used to create the rom file as it is. Therefore, just remove
the dependency.
Change-Id: If855d7378df20080061e27e4988e96aee233d1e0
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/arch/x86/boot/smbios.c | 10 +---------
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c
index 4b96d61..4c3490d 100644
--- a/src/arch/x86/boot/smbios.c
+++ b/src/arch/x86/boot/smbios.c
@@ -28,7 +28,6 @@
#include <device/device.h>
#include <arch/cpu.h>
#include <cpu/x86/name.h>
-#include <cbfs_core.h>
#include <arch/byteorder.h>
#include <elog.h>
#include <memory_info.h>
@@ -258,14 +257,7 @@ static int smbios_write_type0(unsigned long *current, int handle)
vboot_data->vbt10 = (u32)t->eos + (version_offset - 1);
#endif
- {
- const struct cbfs_header *header;
- u32 romsize = CONFIG_ROM_SIZE;
- header = cbfs_get_header(CBFS_DEFAULT_MEDIA);
- if (header != CBFS_HEADER_INVALID_ADDRESS)
- romsize = ntohl(header->romsize);
- t->bios_rom_size = (romsize / 65535) - 1;
- }
+ t->bios_rom_size = (CONFIG_ROM_SIZE / 65535) - 1;
t->system_bios_major_release = 4;
t->bios_characteristics =
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8986
-gerrit
commit cccf7c610d72ffd790842ddd5bc8bfdf9b343c07
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Tue Mar 24 11:33:03 2015 -0500
baytrail: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
in that CAR region can be migrated and the data can be maintained
across the CAR tear down boundary.
Change-Id: I232613ebb641eb9d8fc61af4ba8d2e9b66ec5e51
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/soc/intel/baytrail/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 214a1ac..fbd2b01 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -21,6 +21,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select PARALLEL_MP
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8984
-gerrit
commit 3d23eeb00fb29340ad84b15559da3792349db883
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Mar 25 10:44:53 2015 -0500
broadwell: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
in that CAR region can be migrated and the data can be maintained
across the CAR tear down boundary.
Change-Id: Iff3372fabc684bf8742e8f7fbfde9fbc105a7aa7
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/soc/intel/broadwell/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index c147663..c81fa6e 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select IOAPIC
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select REG_SCRIPT
Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8985
-gerrit
commit 3d5800457203a1b5340bd13e4a8989a57bb03058
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Mar 25 10:45:20 2015 -0500
haswell: select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
This platform supports PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
in that CAR region can be migrated and the data can be maintained
across the CAR tear down boundary.
Change-Id: If131e26b719828647b9fe66f30fc0c87dbcb185f
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/cpu/intel/haswell/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 741b677..7352c63 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_CONSTANT_RATE
select SMM_TSEG
select SMM_MODULES
+ select PLATFORM_HAS_EARLY_WRITABLE_GLOBALS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select SUPPORT_CPU_UCODE_IN_CBFS