the following patch was just integrated into master:
commit ac76ed9998f95cb54d3862ce491402038340e9aa
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Nov 19 11:40:43 2015 -0700
console: Add help for serial IO port selection
Add help and a comment about the serial IO port selection to give the
user better feedback when a port index is selected.
Change-Id: I4c1614be51aee0286308fbc5c24554e218120bf7
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: http://review.coreboot.org/12487
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/12487 for details.
-gerrit
the following patch was just integrated into master:
commit b50d8fbb6e769df782d5bc3c156cb82d3f646e86
Author: Ben Gardner <gardner.ben(a)gmail.com>
Date: Thu Nov 19 11:43:05 2015 -0600
hexdump: Fix output if length is not a multiple of 16
hexdump currently rounds up length to a multiple of 16.
So, hexdump(ptr, 12) prints 16 hex digits, including 4 garbage bytes.
That isn't desirable and is easy to fix.
Change-Id: I86415fa9bc6cdc84b111e5e1968e39f570f294d9
Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com>
Reviewed-on: http://review.coreboot.org/12486
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/12486 for details.
-gerrit
the following patch was just integrated into master:
commit 2d3d1b7eee52bca47ab08730be99336c021d0f7c
Author: Ben Gardner <gardner.ben(a)gmail.com>
Date: Thu Nov 19 16:12:21 2015 -0600
baytrail: add C0 and D0 stepping decode
The E3800 with ordering code FH8065301487717 is stepping D0, value 0x11.
Add that so the debug log shows 'D0' instead of '??'.
Also, add the C0 stepping decode to fsp_baytrail.
Change-Id: Ibec764fcf5d3f448e38831786a071f5ab6066d67
Signed-off-by: Ben Gardner <gardner.ben(a)gmail.com>
Reviewed-on: http://review.coreboot.org/12488
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/12488 for details.
-gerrit
the following patch was just integrated into master:
commit 42b6265035a58bae254b701ec2a8fcc7d1ebb4a2
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Sat Nov 7 09:15:06 2015 +0100
cpu/amd/car/post_cache_as_ram: Avoid trailing spaces
Looking at the coreboot console logs there are sometimes trailing
whitespaces in the output, for example, if writing `Done` was not
possible.
Adapt the code, that spaces are only added when needed.
Change-Id: Ia0af493ab62b6fab24e8a2629cf5fd67329e0af7
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/12357
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See http://review.coreboot.org/12357 for details.
-gerrit
the following patch was just integrated into master:
commit 4aac08afecd51eb7f3e776d3422767dba0d49030
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Nov 19 18:24:30 2015 -0700
chromeos: Fix Kconfig TPM warnings on systems with no LPC TPM
Put dependecies on CHROMEOS's selection of the Kconfig symbols
TPM_INIT_FAILURE_IS_FATAL and SKIP_TPM_STARTUP_ON_NORMAL_BOOT to match
the dependencies on those symbols where they are defined in
src/drivers/pc80/tpm/Kconfig
The file that uses these only gets built in if CONFIG_LPC_TPM is
selected selected.
The warnings were:
warning: (CHROMEOS) selects TPM_INIT_FAILURE_IS_FATAL which has unmet
direct dependencies (PC80_SYSTEM && LPC_TPM)
warning: (CHROMEOS) selects SKIP_TPM_STARTUP_ON_NORMAL_BOOT which has
unmet direct dependencies (PC80_SYSTEM && LPC_TPM)
Change-Id: I7af00c79050bf511758bf29e3d57f6ff34d2a296
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: http://review.coreboot.org/12497
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/12497 for details.
-gerrit
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12464
-gerrit
commit c183b1a0c10c8522c2998763233670e65408d55b
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Wed Nov 18 15:26:07 2015 -0800
drivers/intel/fsp1_1: Don't include files from blobs / fsp directory
coreboot's binary policy forbids to store include files required to build
the host binaries in the blobs directory. Hence remove the infrastructure
to do so.
Change-Id: I66d57f84cbc392bbfc1f951d13424742d2cff978
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
src/drivers/intel/fsp1_1/Kconfig | 5 -----
src/drivers/intel/fsp1_1/Makefile.inc | 2 --
src/drivers/intel/fsp1_1/include/fsp/soc_binding.h | 2 +-
3 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 4ae3727..51fa314 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -66,11 +66,6 @@ config FSP_IMAGE_ID_STRING
8 ASCII character byte signature string that will help match the FSP
binary to a supported hardware configuration.
-config FSP_INCLUDE_PATH
- string "Path for FSP specific include files"
- help
- The path and filename of the Intel FSP binary for this platform.
-
config FSP_LOC
hex "Intel FSP Binary location in CBFS"
help
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc
index a296b53..f101cc4 100644
--- a/src/drivers/intel/fsp1_1/Makefile.inc
+++ b/src/drivers/intel/fsp1_1/Makefile.inc
@@ -36,8 +36,6 @@ ramstage-y += stage_cache.c
ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include
-# Where FspUpdVpd.h can be picked up from.
-CPPFLAGS_common += -I$(CONFIG_FSP_INCLUDE_PATH)
cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_1/cache_as_ram.inc
diff --git a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h b/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
index 04b01e9..affb43f 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/soc_binding.h
@@ -27,7 +27,7 @@
#pragma pack(push)
/*
- * This file is found by way of the Kconfig FSP_INCLUDE_PATH option. It is
+ * This file is found in the soc / chipset directory. It is
* a per implementation specific header. i.e. different FSP implementations
* for different chipsets.
*/
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12495
-gerrit
commit 69c2130891be534ae58b5c80719457cc795711d6
Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Date: Thu Nov 19 17:12:30 2015 -0800
drivers/intel/fsp1_1: Include rules.h in util.h
util.h uses ENV_* and hence needs to have rules.h
This is required for successful compilation of strago.
Change-Id: I0df35e90e2010aac43ef0a4d900f20c842d3bcb5
Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
---
src/drivers/intel/fsp1_1/include/fsp/util.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h
index 49a7798..5595e73 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/util.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/util.h
@@ -17,6 +17,7 @@
#ifndef FSP1_1_UTIL_H
#define FSP1_1_UTIL_H
+#include <rules.h>
#include <fsp/api.h>
/* Current users expect to get the SoC's FSP definitions by including util.h. */
#include <fsp/soc_binding.h>