coreboot-gerrit August 2014

coreboot-gerrit@coreboot.org

1 participants
1011 discussions

Patch merged into coreboot/master: 27ed80b AMD Steppe Eagle: Add northbridge files for new SoC family
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit 27ed80bce1da2d17fecd342a8150f790939150a1 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Fri Aug 15 11:46:25 2014 -0600 AMD Steppe Eagle: Add northbridge files for new SoC family Add the northbridge file for AMD's new Mullins and Steppe Eagle processor family. Since the processor family name is not the same across AMD's sales and marketing channels, I have elected to use part of the processor ID as the family name. The intent is to reduce confusion since the processor ID is the same for both families. This northbridge support has only been validated on the AMD Embedded variants ("Steppe Eagle"). The AGESA wrappers in coreboot have a function that is intended to mirror the UMA memory allocation performed during memory initialization by AGESA. Update the Steppe Eagle memory allocation to mimic the memory reservation done inside the AGESA BLOB. Change the default CBMEM address, the default video BIOS device ID, and a couple of other defaults to match changes in coreboot community code. The northbridge chip.h specifies how many processor sockets, how many channels, and how many DIMM slots are supported by the northbridge. Steppe Eagle does not permit multisocket systems and has only one memory controller channel. Change-Id: I20d8b78e3b153cda2dd05100fbb75e2ebadd9e08 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6678 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Reviewed-by: Zheng Bao <zheng.bao(a)amd.com> See http://review.coreboot.org/6678 for details. -gerrit

1 0

Patch merged into coreboot/master: 1a59039 AMD Steppe Eagle: New integrated southbridge (Avalon)
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit 1a59039c24cfe5c74a805064d3a360709ad16526 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Sun Aug 10 17:09:15 2014 -0600 AMD Steppe Eagle: New integrated southbridge (Avalon) 00730F01 contains the Avalon southbridge and a Platform Security Processor (PSP). Supporting the PSP requires specific binaries to be included in the ROM. The fletcher utility is used to sign PSP binaries. The IMC access routines are not accessible for newer AMD parts that use pre-compiled AGESA. Change the Hudson code such that the IMC code is not compiled if IMC is not selected in Kconfig. Disable compilation of resume.c if HAVE_ACPI_RESUME is disabled. The newer AMD mainboards will initially be released without ACPI resume support (S3) due to the use of AGESA internals in the existing Hudson routines. The Makefile change allows newer mainboards to avoid the API issues. Change Kconfig such that the FWM flag is always set for PSP-enabled parts. This has the side effect of forcing the generation of the FWM directory in the absence of GEC, IMC, and xHCI. Change-Id: I6d056f54b60a64300841599490b9fafd561c4a7d Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6677 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Reviewed-by: Zheng Bao <zheng.bao(a)amd.com> See http://review.coreboot.org/6677 for details. -gerrit

1 0

Patch merged into coreboot/master: b266c6b AMD Steppe Eagle: Add binary PI vendorcode files
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit b266c6b5448b17647946eb926b07920c28524a55 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Sun Aug 10 23:56:45 2014 -0600 AMD Steppe Eagle: Add binary PI vendorcode files Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. The AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the 3rdparty directory in coreboot.org. The copy commands that were added to the the vendorcode Makefile.inc ensure that only one thread will operate on each source file by using a macro to generate the copy targets. After the change, each copy target will operate on exactly one source file. Due to API issues, coreboot has no way to control the IMC to set up fan control. Set a Kconfig flag that removes the ability to install an IMC BLOB into CBFS. Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6595 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Reviewed-by: Zheng Bao <zheng.bao(a)amd.com> See http://review.coreboot.org/6595 for details. -gerrit

1 0

Patch merged into coreboot/master: 94930e2 lenovo/x220: New port
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit 94930e2622abe5b9e917f32c459041123ce2d273 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Aug 24 22:40:33 2014 +0200 lenovo/x220: New port Change-Id: Ic213948e4d31457dda9b9f2d5a4f92cd34d1e57d Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/6757 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/6757 for details. -gerrit

1 0

Patch merged into coreboot/master: 309fc4c sandybridge: Add native sandybridge
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit 309fc4ce8bad334b88fc653a35baa4f0c5b67fd2 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Aug 24 22:35:29 2014 +0200 sandybridge: Add native sandybridge Change-Id: I1b51310b4387e588c4828563620b0e2770598503 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/6753 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/6753 for details. -gerrit

1 0

Patch set updated for coreboot: 7c324b2 ec/lenovo/h8: Implement thinkpad-acpi compatible LED function
by Vladimir Serbinenko 30 Aug '14

30 Aug '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6790 -gerrit commit 7c324b21bd9a41a74c15ad43a14f08510a14fcfc Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Thu Aug 28 01:41:20 2014 +0200 ec/lenovo/h8: Implement thinkpad-acpi compatible LED function Change-Id: I9998b0b4a1413ab65f1dbdf59b2f84d331ce9c3d Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/ec/lenovo/h8/acpi/ec.asl | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl index 28f095c..3971ec2 100644 --- a/src/ec/lenovo/h8/acpi/ec.asl +++ b/src/ec/lenovo/h8/acpi/ec.asl @@ -75,6 +75,12 @@ Device(EC) Store(Arg0, LEDS) } + /* Not used for coreboot. Provided for compatibility with thinkpad-acpi. */ + Method (LED, 2, NotSerialized) + { + TLED(Or(Arg0, Arg1)) + } + Method (_INI, 0, NotSerialized) { }

1 0

Patch set updated for coreboot: b38fe7d ec/lenovo/h8: Rename LED to avoid conflicting with thinkpad-acpi
by Vladimir Serbinenko 30 Aug '14

30 Aug '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6789 -gerrit commit b38fe7d763dadeed1ea23fbad254c7d3fe3c2635 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Thu Aug 28 01:31:33 2014 +0200 ec/lenovo/h8: Rename LED to avoid conflicting with thinkpad-acpi Change-Id: I9fd7f894d0e611f61e8702e4eacb12d7b81154d8 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/ec/lenovo/h8/acpi/ec.asl | 2 +- src/ec/lenovo/h8/acpi/systemstatus.asl | 28 ++++++++++++++-------------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl index e8d5215..28f095c 100644 --- a/src/ec/lenovo/h8/acpi/ec.asl +++ b/src/ec/lenovo/h8/acpi/ec.asl @@ -70,7 +70,7 @@ Device(EC) Return (ECMD) } - Method (LED, 1, NotSerialized) + Method (TLED, 1, NotSerialized) { Store(Arg0, LEDS) } diff --git a/src/ec/lenovo/h8/acpi/systemstatus.asl b/src/ec/lenovo/h8/acpi/systemstatus.asl index d914e8b..a7024ff 100644 --- a/src/ec/lenovo/h8/acpi/systemstatus.asl +++ b/src/ec/lenovo/h8/acpi/systemstatus.asl @@ -27,37 +27,37 @@ Scope (\_SI) If (LEqual (Arg0, 0)) { /* Indicator off */ - /* power LED off */ - \_SB.PCI0.LPCB.EC.LED(0x00) - /* suspend LED off */ - \_SB.PCI0.LPCB.EC.LED(0x07) + /* power TLED off */ + \_SB.PCI0.LPCB.EC.TLED(0x00) + /* suspend TLED off */ + \_SB.PCI0.LPCB.EC.TLED(0x07) } If (LEqual (Arg0, 1)) { /* working state */ - /* power LED on */ - \_SB.PCI0.LPCB.EC.LED(0x80) - /* suspend LED off */ - \_SB.PCI0.LPCB.EC.LED(0x07) + /* power TLED on */ + \_SB.PCI0.LPCB.EC.TLED(0x80) + /* suspend TLED off */ + \_SB.PCI0.LPCB.EC.TLED(0x07) } If (LEqual (Arg0, 2)) { /* waking state */ /* power LED on */ - \_SB.PCI0.LPCB.EC.LED(0x80) + \_SB.PCI0.LPCB.EC.TLED(0x80) /* suspend LED blinking */ - \_SB.PCI0.LPCB.EC.LED(0xc7) + \_SB.PCI0.LPCB.EC.TLED(0xc7) } If (LEqual (Arg0, 3)) { /* sleep state */ - /* power LED off */ - \_SB.PCI0.LPCB.EC.LED(0x00) - /* suspend LED on */ - \_SB.PCI0.LPCB.EC.LED(0x87) + /* power TLED off */ + \_SB.PCI0.LPCB.EC.TLED(0x00) + /* suspend TLED on */ + \_SB.PCI0.LPCB.EC.TLED(0x87) } } }

1 0

Patch merged into coreboot/master: 3a2310e AMD Steppe Eagle: Add 32-bit Fletcher's Checksum computation
by gerrit＠coreboot.org 30 Aug '14

30 Aug '14

the following patch was just integrated into master: commit 3a2310e05c971e3b46e9e91886bbc467ae49cdb6 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Wed Jul 16 11:25:21 2014 -0600 AMD Steppe Eagle: Add 32-bit Fletcher's Checksum computation The AMD Platform Security Processor (PSP) requires a Fletcher's Checksum at the end of the PSP directory. This code implements a Fletcher's Checksum by reading bytes from stdin and writes the bytes back to stdout with a checksum inserted into the byte stream at the appropriate offset. This utility is used on PSP binaries during coreboot build. Include a runtime debug option such that the command: fletcher --print <file.bin >file_with_cksum.bin will print out the computed checksum value for debugging. The compile-time debug option is retained that allows -DDEBUG to be added to the compilation line. This option has the same effect as "--print". Change-Id: I506a479d8204ca4f8267d53aa152ac4b473dbc75 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6676 Reviewed-by: WANG Siyuan <wangsiyuanbuaa(a)gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao(a)amd.com> See http://review.coreboot.org/6676 for details. -gerrit

1 0

Patch set updated for coreboot: 288ff74 lint: simplify board-status check
by Patrick Georgi 29 Aug '14

29 Aug '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6798 -gerrit commit 288ff741c38ac70a654bdb9cf9f360f75c732931 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Aug 16 22:50:57 2014 +0200 lint: simplify board-status check git can do lots of things by itself, no need to parse its output and redo that. Change-Id: Id2cdd2ea8d34c1ba2b0abddc88e1f3260d74f47d Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/lint/lint-stable-005-board-status | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/lint/lint-stable-005-board-status b/util/lint/lint-stable-005-board-status index ce222e9..32f5cdc 100755 --- a/util/lint/lint-stable-005-board-status +++ b/util/lint/lint-stable-005-board-status @@ -20,7 +20,7 @@ # DESCR: Check that every board has a meaningful board_info.txt LC_ALL=C export LC_ALL -for mobodir in $(git diff --name-status |grep -v "^D" |cut -c3- | sed -n 's,^$src/mainboard/[^/]*/[^/]*$.*$,\1,p'|sort|uniq); do +for mobodir in $(git diff --diff-filter ACMR --name-only src/mainboard | sed -n 's,^$src/mainboard/[^/]*/[^/]*$/.*$,\1,p'|sort|uniq); do board_info="$mobodir/board_info.txt" if ! [ -f "$board_info" ]; then echo "No $board_info found"

1 0

New patch to review for coreboot: f90ddf8 lint: simplify board-status check
by Patrick Georgi 29 Aug '14

29 Aug '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6798 -gerrit commit f90ddf8c8dd00647e3931201145030ad2fe08536 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Aug 16 22:50:57 2014 +0200 lint: simplify board-status check git can do lots of things by itself, no need to parse its output and redo that. Change-Id: Id2cdd2ea8d34c1ba2b0abddc88e1f3260d74f47d Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/lint/lint-stable-005-board-status | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/lint/lint-stable-005-board-status b/util/lint/lint-stable-005-board-status index ce222e9..e06472d 100755 --- a/util/lint/lint-stable-005-board-status +++ b/util/lint/lint-stable-005-board-status @@ -20,7 +20,7 @@ # DESCR: Check that every board has a meaningful board_info.txt LC_ALL=C export LC_ALL -for mobodir in $(git diff --name-status |grep -v "^D" |cut -c3- | sed -n 's,^$src/mainboard/[^/]*/[^/]*$.*$,\1,p'|sort|uniq); do +for mobodir in $(git diff --diff-filter ACMR --name-only src/mainboard | sed -n 's,^$src/mainboard/[^/]*/[^/]*$.*$,\1,p'|sort|uniq); do board_info="$mobodir/board_info.txt" if ! [ -f "$board_info" ]; then echo "No $board_info found"

1 0

← Newer
1
...
6
7
8
9
10
11
12
...
102
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit August 2014