coreboot-gerrit May 2014

coreboot-gerrit@coreboot.org

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1066 discussions

Patch set updated for coreboot: b02372c build: don't call $(CC) -print-libgcc-file-name twice
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5768 -gerrit commit b02372c1c343d1359141960159f46b897b1527e6 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:52:28 2014 +0200 build: don't call $(CC) -print-libgcc-file-name twice Change-Id: Iaeeb8fc58e06c98273520e79999737da9ff3f872 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- toolchain.inc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/toolchain.inc b/toolchain.inc index d998a7e..b615bce 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -63,8 +63,7 @@ STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) CFLAGS_$(1) = $$(CFLAGS_common) $$(CFLAGS_$(2)) CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) -LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ - $(CC_$(2)) -print-libgcc-file-name) +LIBGCC_FILE_NAME_$(1) = $(wildcard $(shell $(CC_$(2)) -print-libgcc-file-name)) endef # initialize standard toolchain (CC,AS and others) for give stage

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Patch set updated for coreboot: 93b6974 build: kill one indirection
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5767 -gerrit commit 93b697422278c587fbe0d7b4fc95fa691e21ddd2 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:02:08 2014 +0200 build: kill one indirection No need to first define X86_32 and then replace every single use of it with its lower cased equivalent. Just start out with the lower case versions in the first place. Change-Id: I1e771ef443db1b8d34018d19a64a9ee489cd8133 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile.inc | 2 +- src/vendorcode/google/chromeos/Makefile.inc | 2 +- toolchain.inc | 16 ++++++---------- 3 files changed, 8 insertions(+), 12 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 9e4c6b0..d098cff 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -149,7 +149,7 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-ramstage-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c $(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index f0289f8..b87d515 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -44,7 +44,7 @@ VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a # up all components in one of the three stages of coreboot, vboot seems # most logical to fall under the romstage. Thus, all references to arch # and other compiler stuff for vboot is using the romstage arch. -VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y)) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-romstage-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. diff --git a/toolchain.inc b/toolchain.inc index f666e0c..d998a7e 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -17,10 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ARCH_SUPPORTED := ARMV7 X86_32 - -ARCH_TO_TOOLCHAIN_X86_32 := x86_32 -ARCH_TO_TOOLCHAIN_ARMV7 := armv7 +ARCH_SUPPORTED := armv7 x86_32 COREBOOT_STANDARD_STAGES := bootblock romstage ramstage @@ -38,8 +35,8 @@ CFLAGS_armv7 = \ toolchain_to_dir = \ $(foreach arch,$(ARCH_SUPPORTED),\ - $(eval CPPFLAGS_$(ARCH_TO_TOOLCHAIN_$(arch)) = \ - -Isrc/arch/$(ARCHDIR-$(ARCH_TO_TOOLCHAIN_$(arch)))/include)) + $(eval CPPFLAGS_$(arch) = \ + -Isrc/arch/$(ARCHDIR-$(arch))/include)) # set_stage_toolchain: Decides the toolchain to be used by every stage # E.g.: If bootblock is x86_32, it sets ARCH-BOOTBLOCK-y = x86_32, whereas @@ -49,7 +46,7 @@ toolchain_to_dir = \ # stages i.e. bootblock, romstage and ramstage, since it acts as the second # parameter to create_class_compiler below in init_standard_toolchain set_stage_toolchain= \ - $(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$(CONFIG_ARCH_$(1)_$(arch)) := $(ARCH_TO_TOOLCHAIN_$(arch)))) + $(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$($(shell echo CONFIG_ARCH_$(1)_$(arch) | tr '[:lower:]' '[:upper:]')) := $(arch))) # create_class_compiler: Used to create compiler tool set for # special classes @@ -73,9 +70,8 @@ endef # initialize standard toolchain (CC,AS and others) for give stage # @1 : stage for which the toolchain is to be initialized init_standard_toolchain = \ - $(eval stage_caps := $(shell printf "%s" $(1) | tr '[:lower:]' '[:upper:]' )) \ - $(eval $(call set_stage_toolchain,$(stage_caps))) \ - $(eval $(call create_class_compiler,$(1),$(ARCH-$(stage_caps)-y))) \ + $(eval $(call set_stage_toolchain,$(1))) \ + $(eval $(call create_class_compiler,$(1),$(ARCH-$(1)-y))) \ $(eval $(call set_stage_libgcc,$(1))) init_stages = \

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Patch set updated for coreboot: c5398c9 build: get rid of a special case
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5766 -gerrit commit c5398c976f0899d9851c04c2ee2c254330c3c0e4 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:20:11 2014 +0200 build: get rid of a special case Don't call things in xcompile i386 and in the buildsystem x86_32 and then bridge things so they match. just call it the same everywhere. Change-Id: Ieef5f03f7aafb0b0a606fbe5a2386e310d2b0e94 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- toolchain.inc | 3 --- util/xcompile/xcompile | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/toolchain.inc b/toolchain.inc index dca00fc..f666e0c 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -81,9 +81,6 @@ init_standard_toolchain = \ init_stages = \ $(foreach stage,$(COREBOOT_STANDARD_STAGES),$(eval $(call init_standard_toolchain,$(stage)))) -# This mapping is created to have consistency with xcompile naming -$(eval $(call create_class_compiler,x86_32,i386)) - $(eval $(call toolchain_to_dir)) $(call init_stages) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 0ac2bec..b342de3 100644 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -181,7 +181,7 @@ arch_config_aarch64() { } arch_config_x86() { - TARCH="i386" + TARCH="x86_32" TBFDARCH="i386" TCLIST="i386 x86_64" TWIDTH="32"

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Patch set updated for coreboot: 19ef178 build: separate CPPFLAGS from CFLAGS
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5765 -gerrit commit 19ef1781741b49bd1403e458d85d4d7557df9913 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:00:12 2014 +0200 build: separate CPPFLAGS from CFLAGS There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them. Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile | 2 +- Makefile.inc | 16 ++++++++-------- src/arch/armv7/Makefile.inc | 4 ++-- src/arch/x86/Makefile.inc | 2 +- toolchain.inc | 4 ++-- 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/Makefile b/Makefile index c9648c0..3404a51 100644 --- a/Makefile +++ b/Makefile @@ -242,7 +242,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC_$(1)) $(3) -MMD $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< + $(CC_$(1)) $(3) -MMD $$$$(CPPFLAGS_$(1)) $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef diff --git a/Makefile.inc b/Makefile.inc index d76fab9..9e4c6b0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -152,7 +152,7 @@ $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -214,11 +214,11 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -CPPFLAGS := -Isrc -Isrc/include -I$(obj) -CPPFLAGS += -Isrc/device/oprom/include -CPPFLAGS += -include $(src)/include/kconfig.h +CPPFLAGS_common := -Isrc -Isrc/include -I$(obj) +CPPFLAGS_common += -Isrc/device/oprom/include +CPPFLAGS_common += -include $(src)/include/kconfig.h -CFLAGS_common = $(CPPFLAGS) -Os -pipe -g -nostdinc +CFLAGS_common = -Os -pipe -g -nostdinc CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS_common += -Wstrict-aliasing -Wshadow @@ -314,15 +314,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) $(CPPFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 23e0bf6..402c491 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -155,7 +155,7 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ endif # CONFIG_ARCH_ROMSTAGE_ARMV7 @@ -192,7 +192,7 @@ $(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ram ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6ff059c..30f9243 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -193,7 +193,7 @@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" diff --git a/toolchain.inc b/toolchain.inc index ea67ad4..dca00fc 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -64,8 +64,8 @@ OBJCOPY_$(1) := $(OBJCOPY_$(2)) OBJDUMP_$(1) := $(OBJDUMP_$(2)) STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) -CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include -CFLAGS_$(1) = $$(CFLAGS_common) $$(CPPFLAGS_$(1)) $(CFLAGS_$(2)) +CFLAGS_$(1) = $$(CFLAGS_common) $$(CFLAGS_$(2)) +CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ $(CC_$(2)) -print-libgcc-file-name) endef

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Patch merged into coreboot/master: 48e9eb8 libpayload: Fix to properly disable serial console
by gerrit＠coreboot.org 17 May '14

17 May '14

the following patch was just integrated into master: commit 48e9eb89fa52eeb193f7e687bbb7f4e152235b79 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue May 13 12:57:26 2014 +0300 libpayload: Fix to properly disable serial console With coreboot builds with serial console disabled, there is no CB_TAG_SERIAL entry in coreboot tables. We ended up with lib_sysinfo.serial == NULL and serial_hardware_is_present == 1. Change-Id: I9a2fc0b55bf77769f2f2bfbb2b5476bee8083f7d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/5723 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/5723 for details. -gerrit

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New patch to review for coreboot: a47eac1 build: don't call $(CC) -print-libgcc-file-name twice
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5768 -gerrit commit a47eac11f53effaa8dbd6101cd61ae5490592aa8 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:52:28 2014 +0200 build: don't call $(CC) -print-libgcc-file-name twice Change-Id: Iaeeb8fc58e06c98273520e79999737da9ff3f872 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- toolchain.inc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/toolchain.inc b/toolchain.inc index b93639a..444a709 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -64,8 +64,7 @@ READELF_$(1) := $(READELF_$(2)) CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include CFLAGS_$(1) = $$(CFLAGS_common) $(CFLAGS_$(2)) CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) -LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ - $(CC_$(2)) -print-libgcc-file-name) +LIBGCC_FILE_NAME_$(1) = $(wildcard $(shell $(CC_$(2)) -print-libgcc-file-name)) endef # initialize standard toolchain (CC,AS and others) for give stage

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New patch to review for coreboot: ab88270 build: kill one indirection
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5767 -gerrit commit ab882705b11e9b05896383de6a41b66341266ac9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:02:08 2014 +0200 build: kill one indirection No need to first define X86_32 and then replace every single use of it with its lower cased equivalent. Just start out with the lower case versions in the first place. Change-Id: I1e771ef443db1b8d34018d19a64a9ee489cd8133 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile.inc | 2 +- src/vendorcode/google/chromeos/Makefile.inc | 2 +- toolchain.inc | 16 ++++++---------- 3 files changed, 8 insertions(+), 12 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 9e4c6b0..d098cff 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -149,7 +149,7 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-ramstage-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c $(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index f0289f8..b87d515 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -44,7 +44,7 @@ VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a # up all components in one of the three stages of coreboot, vboot seems # most logical to fall under the romstage. Thus, all references to arch # and other compiler stuff for vboot is using the romstage arch. -VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y)) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-romstage-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. diff --git a/toolchain.inc b/toolchain.inc index 8c62be0..b93639a 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -17,10 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ARCH_SUPPORTED := ARMV7 X86_32 - -ARCH_TO_TOOLCHAIN_X86_32 := x86_32 -ARCH_TO_TOOLCHAIN_ARMV7 := armv7 +ARCH_SUPPORTED := armv7 x86_32 COREBOOT_STANDARD_STAGES := bootblock romstage ramstage @@ -38,8 +35,8 @@ CFLAGS_armv7 = \ toolchain_to_dir = \ $(foreach arch,$(ARCH_SUPPORTED),\ - $(eval CPPFLAGS_$(ARCH_TO_TOOLCHAIN_$(arch)) = \ - -Isrc/arch/$(ARCHDIR-$(ARCH_TO_TOOLCHAIN_$(arch)))/include)) + $(eval CPPFLAGS_$(arch) = \ + -Isrc/arch/$(ARCHDIR-$(arch))/include)) # set_stage_toolchain: Decides the toolchain to be used by every stage # E.g.: If bootblock is x86_32, it sets ARCH-BOOTBLOCK-y = x86_32, whereas @@ -49,7 +46,7 @@ toolchain_to_dir = \ # stages i.e. bootblock, romstage and ramstage, since it acts as the second # parameter to create_class_compiler below in init_standard_toolchain set_stage_toolchain= \ - $(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$(CONFIG_ARCH_$(1)_$(arch)) := $(ARCH_TO_TOOLCHAIN_$(arch)))) + $(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$($(shell echo CONFIG_ARCH_$(1)_$(arch) | tr '[:lower:]' '[:upper:]')) := $(arch))) # create_class_compiler: Used to create compiler tool set for # special classes @@ -74,9 +71,8 @@ endef # initialize standard toolchain (CC,AS and others) for give stage # @1 : stage for which the toolchain is to be initialized init_standard_toolchain = \ - $(eval stage_caps := $(shell printf "%s" $(1) | tr '[:lower:]' '[:upper:]' )) \ - $(eval $(call set_stage_toolchain,$(stage_caps))) \ - $(eval $(call create_class_compiler,$(1),$(ARCH-$(stage_caps)-y))) \ + $(eval $(call set_stage_toolchain,$(1))) \ + $(eval $(call create_class_compiler,$(1),$(ARCH-$(1)-y))) \ $(eval $(call set_stage_libgcc,$(1))) init_stages = \

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New patch to review for coreboot: 6bded8f build: get rid of a special case
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5766 -gerrit commit 6bded8fcefd6d83b91ffafb378f9f383a3fb6ccc Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:20:11 2014 +0200 build: get rid of a special case Don't call things in xcompile i386 and in the buildsystem x86_32 and then bridge things so they match. just call it the same everywhere. Change-Id: Ieef5f03f7aafb0b0a606fbe5a2386e310d2b0e94 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- toolchain.inc | 3 --- util/xcompile/xcompile | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/toolchain.inc b/toolchain.inc index 4e06775..8c62be0 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -82,9 +82,6 @@ init_standard_toolchain = \ init_stages = \ $(foreach stage,$(COREBOOT_STANDARD_STAGES),$(eval $(call init_standard_toolchain,$(stage)))) -# This mapping is created to have consistency with xcompile naming -$(eval $(call create_class_compiler,x86_32,i386)) - $(eval $(call toolchain_to_dir)) $(call init_stages) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 0ac2bec..b342de3 100644 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -181,7 +181,7 @@ arch_config_aarch64() { } arch_config_x86() { - TARCH="i386" + TARCH="x86_32" TBFDARCH="i386" TCLIST="i386 x86_64" TWIDTH="32"

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New patch to review for coreboot: 1a7e94d build: separate CPPFLAGS from CFLAGS
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5765 -gerrit commit 1a7e94d44cdd0ae73320481ecd75ed8e1c85ef29 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 14:00:12 2014 +0200 build: separate CPPFLAGS from CFLAGS There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them. Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile | 2 +- Makefile.inc | 16 ++++++++-------- src/arch/x86/Makefile.inc | 2 +- toolchain.inc | 3 ++- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index c9648c0..3404a51 100644 --- a/Makefile +++ b/Makefile @@ -242,7 +242,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC_$(1)) $(3) -MMD $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< + $(CC_$(1)) $(3) -MMD $$$$(CPPFLAGS_$(1)) $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef diff --git a/Makefile.inc b/Makefile.inc index d76fab9..9e4c6b0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -152,7 +152,7 @@ $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(CPPFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -214,11 +214,11 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -CPPFLAGS := -Isrc -Isrc/include -I$(obj) -CPPFLAGS += -Isrc/device/oprom/include -CPPFLAGS += -include $(src)/include/kconfig.h +CPPFLAGS_common := -Isrc -Isrc/include -I$(obj) +CPPFLAGS_common += -Isrc/device/oprom/include +CPPFLAGS_common += -include $(src)/include/kconfig.h -CFLAGS_common = $(CPPFLAGS) -Os -pipe -g -nostdinc +CFLAGS_common = -Os -pipe -g -nostdinc CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS_common += -Wstrict-aliasing -Wshadow @@ -314,15 +314,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) $(CPPFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) $(CPPFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6ff059c..30f9243 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -193,7 +193,7 @@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) $(CPPFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" diff --git a/toolchain.inc b/toolchain.inc index ea67ad4..4e06775 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -65,7 +65,8 @@ OBJDUMP_$(1) := $(OBJDUMP_$(2)) STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include -CFLAGS_$(1) = $$(CFLAGS_common) $$(CPPFLAGS_$(1)) $(CFLAGS_$(2)) +CFLAGS_$(1) = $$(CFLAGS_common) $(CFLAGS_$(2)) +CPPFLAGS_$(1) = $$(CPPFLAGS_common) $$(CPPFLAGS_$(2)) LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ $(CC_$(2)) -print-libgcc-file-name) endef

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New patch to review for coreboot: a0cc698 build: CPPFLAGS is more common than INCLUDES
by Patrick Georgi 17 May '14

17 May '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5764 -gerrit commit a0cc698682791ad75dd2cc78cb61845a2d3e9f81 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat May 17 13:53:11 2014 +0200 build: CPPFLAGS is more common than INCLUDES Rename INCLUDES to CPPFLAGS since the latter is more commonly used for preprocessor options. Change-Id: I522bb01c44856d0eccf221fa43d2d644bdf01d69 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile.inc | 9 ++++----- src/arch/armv7/Makefile.inc | 6 +++--- src/arch/x86/Makefile.inc | 8 ++++---- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/drivers/intel/fsp/Makefile.inc | 2 +- src/northbridge/intel/fsp_sandybridge/Makefile.inc | 2 +- src/soc/intel/baytrail/Makefile.inc | 2 +- src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 +- src/vendorcode/google/chromeos/Makefile.inc | 3 +-- toolchain.inc | 6 +++--- 10 files changed, 20 insertions(+), 22 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index b139403..d76fab9 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -214,12 +214,11 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -INCLUDES := -Isrc -Isrc/include -I$(obj) -INCLUDES += -Isrc/device/oprom/include -# abspath is a workaround for romcc -INCLUDES += -include $(src)/include/kconfig.h +CPPFLAGS := -Isrc -Isrc/include -I$(obj) +CPPFLAGS += -Isrc/device/oprom/include +CPPFLAGS += -include $(src)/include/kconfig.h -CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc +CFLAGS_common = $(CPPFLAGS) -Os -pipe -g -nostdinc CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS_common += -Wstrict-aliasing -Wshadow diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 806198e..23e0bf6 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -41,7 +41,7 @@ stages_o = $(obj)/arch/armv7/stages.o $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_armv7) -I. $(INCLUDES) $(INCLUDES_armv7) -c -o $@ $< -marm + $(CC_armv7) -I. $(CPPFLAGS) $(CPPFLAGS_armv7) -c -o $@ $< -marm endif # CONFIG_ARCH_ARMV7 @@ -86,10 +86,10 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \ + $(CC_bootblock) $(bootblock-c-ccopts) $(CPPFLAGS) $(CPPFLAGS_bootblock) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ + $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(CPPFLAGS) $(CPPFLAGS_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index b02df5a..6ff059c 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -123,9 +123,9 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC_bootblock) $(CPPFLAGS) $(CPPFLAGS_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) -I. $(CPPFLAGS) $(CPPFLAGS_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" @@ -188,7 +188,7 @@ $(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@ + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(CPPFLAGS) $(CPPFLAGS_romstage) $< -o $@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @@ -256,7 +256,7 @@ $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) $(CPPFLAGS) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ endif # CONFIG_ARCH_ROMSTAGE_X86_32 diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 6004462..8345002 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,6 +9,6 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),) ifneq ($(wildcard $(shell realpath -L "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),) -INCLUDES += -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CPPFLAGS += -I$(CONFIG_MICROCODE_INCLUDE_PATH) endif endif diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp/Makefile.inc index 9e083ec..86c3a85 100644 --- a/src/drivers/intel/fsp/Makefile.inc +++ b/src/drivers/intel/fsp/Makefile.inc @@ -22,7 +22,7 @@ romstage-y += fsp_util.c ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c -INCLUDES += -Isrc/drivers/intel/fsp +CPPFLAGS += -Isrc/drivers/intel/fsp ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y) cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc diff --git a/src/northbridge/intel/fsp_sandybridge/Makefile.inc b/src/northbridge/intel/fsp_sandybridge/Makefile.inc index f5dbbe4..952c008 100644 --- a/src/northbridge/intel/fsp_sandybridge/Makefile.inc +++ b/src/northbridge/intel/fsp_sandybridge/Makefile.inc @@ -32,6 +32,6 @@ romstage-y += ../../../arch/x86/lib/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c -INCLUDES += -I$(src)/northbridge/intel/fsp_sandybridge/fsp +CPPFLAGS += -I$(src)/northbridge/intel/fsp_sandybridge/fsp $(obj)/northbridge/intel/fsp_sandybridge/acpi.ramstage.o : $(obj)/build.h diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index f93435b..179f2a6 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c -INCLUDES += -Isrc/soc/intel/baytrail/ +CPPFLAGS += -Isrc/soc/intel/baytrail/ # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index a1d3e62..fdb0431 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -70,4 +70,4 @@ endif PHONY += bd82x6x_add_me -INCLUDES += -I$(src)/southbridge/intel/fsp_bd82x6x +CPPFLAGS += -I$(src)/southbridge/intel/fsp_bd82x6x diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 2dcb03a..f0289f8 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -48,8 +48,7 @@ VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. -VB_INCLUDES += -I$(VB_SOURCE)/firmware/include -INCLUDES += $(VB_INCLUDES) +CPPFLAGS += -I$(VB_SOURCE)/firmware/include VBOOT_STUB_ELF = $(obj)/vendorcode/google/chromeos/vbootstub.elf VBOOT_STUB = $(VBOOT_STUB_ELF).rmod diff --git a/toolchain.inc b/toolchain.inc index 576e744..ea67ad4 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -38,7 +38,7 @@ CFLAGS_armv7 = \ toolchain_to_dir = \ $(foreach arch,$(ARCH_SUPPORTED),\ - $(eval INCLUDES_$(ARCH_TO_TOOLCHAIN_$(arch)) = \ + $(eval CPPFLAGS_$(ARCH_TO_TOOLCHAIN_$(arch)) = \ -Isrc/arch/$(ARCHDIR-$(ARCH_TO_TOOLCHAIN_$(arch)))/include)) # set_stage_toolchain: Decides the toolchain to be used by every stage @@ -64,8 +64,8 @@ OBJCOPY_$(1) := $(OBJCOPY_$(2)) OBJDUMP_$(1) := $(OBJDUMP_$(2)) STRIP_$(1) := $(STRIP_$(2)) READELF_$(1) := $(READELF_$(2)) -INCLUDES_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include -CFLAGS_$(1) = $$(CFLAGS_common) $$(INCLUDES_$(1)) $(CFLAGS_$(2)) +CPPFLAGS_$(1) = -Isrc/arch/$(ARCHDIR-$(2))/include +CFLAGS_$(1) = $$(CFLAGS_common) $$(CPPFLAGS_$(1)) $(CFLAGS_$(2)) LIBGCC_FILE_NAME_$(1) = $(shell [ -r `$(CC_$(2)) -print-libgcc-file-name` ] && \ $(CC_$(2)) -print-libgcc-file-name) endef

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coreboot-gerrit May 2014