coreboot-gerrit November 2014

coreboot-gerrit@coreboot.org

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1441 discussions

Patch merged into coreboot/master: d7d0c81 gigabyte/ga-b75m-d3h: Add new Intel mainboard
by gerrit＠coreboot.org 02 Nov '14

02 Nov '14

the following patch was just integrated into master: commit d7d0c8134854cba72f0c3fe25946b27ce0364b43 Author: Damien Zammit <damien(a)zamaudio.com> Date: Thu Oct 23 22:06:38 2014 +1100 gigabyte/ga-b75m-d3h: Add new Intel mainboard This is based on LENOVO X230 port. Board boots to linux via SATA. Remaining Issues: 1. Native raminit sometimes fails with "timC write discovery failed" even without changing the ram configuration. I suggest altering the native raminit code so that it reboots if that message appears to give a chance for the boot process to recover. 2. VGA does not work. Native graphics initialization only supports LVDS and the VGA Option ROM still hangs when run in SeaBIOS 3. USB does not work. SeaBIOS/GRUB2 do not detect devices connected to USB ports 4. Sound needs corrected codec verb settings Change-Id: Ib465a4824ef1a71ab6aa17bd40fc281215c6d44f Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: http://review.coreboot.org/7020 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7020 for details. -gerrit

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Patch merged into coreboot/master: bf30ae6 intel/bd82x6x: Add new current for native USB ports
by gerrit＠coreboot.org 02 Nov '14

02 Nov '14

the following patch was just integrated into master: commit bf30ae63a9cf747aea8eebc7568d404e8b132c75 Author: Damien Zammit <damien(a)zamaudio.com> Date: Wed Oct 29 08:58:28 2014 +1100 intel/bd82x6x: Add new current for native USB ports Change-Id: I88ef36b94b961a318d280d8de1b8721fcbeb93b0 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: http://review.coreboot.org/7237 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7237 for details. -gerrit

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Patch merged into coreboot/master: 49c70b6 amd/agesa/f15: Invalid inline asm in gcc-intrin.h
by gerrit＠coreboot.org 02 Nov '14

02 Nov '14

the following patch was just integrated into master: commit 49c70b6182ffbc71368148b2b449883a0e6cc89c Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 05:32:32 2014 +1100 amd/agesa/f15: Invalid inline asm in gcc-intrin.h Forward port commit: db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm Change-Id: I52da16b39293c8aeff150db83b8b1aeaa232c205 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7299 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> See http://review.coreboot.org/7299 for details. -gerrit

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Patch merged into coreboot/master: a28dda4 amd/agesa/f12: Invalid inline asm in gcc-intrin.h
by gerrit＠coreboot.org 02 Nov '14

02 Nov '14

the following patch was just integrated into master: commit a28dda489cf0fabad4d624e376deaa8f7f46a45d Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 05:34:35 2014 +1100 amd/agesa/f12: Invalid inline asm in gcc-intrin.h Forward port commit: db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm Change-Id: Ife26fb5eca5164e72b5e55eba90757253765b633 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7300 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> See http://review.coreboot.org/7300 for details. -gerrit

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Patch merged into coreboot/master: 913e27e amd/agesa/f10: Invalid inline asm in gcc-intrin.h
by gerrit＠coreboot.org 02 Nov '14

02 Nov '14

the following patch was just integrated into master: commit 913e27ec333910df135fdcf303ef688fd4a2e666 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 05:35:18 2014 +1100 amd/agesa/f10: Invalid inline asm in gcc-intrin.h Forward port commit: db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm Change-Id: Ic1bd19087a4500ba0ca9e312ea351e301ab42518 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7301 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> See http://review.coreboot.org/7301 for details. -gerrit

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New patch to review for coreboot: b5d48df mainboard/*/debug.c: Remove duplicate or dead code
by Edward O'Callaghan 02 Nov '14

02 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7316 -gerrit commit b5d48df3122fe0d3a7ab82fbaf79b0551f2efa11 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Nov 2 10:17:10 2014 +1100 mainboard/*/debug.c: Remove duplicate or dead code We already have these implemented in 'lib/debug.c'. Will fix '.c' includes in follow ups. Change-Id: I1586d8864db7f93515214ef9a4458ebc618bf61c Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/arima/hdama/debug.c | 66 --------------------------- src/mainboard/intel/eagleheights/debug.c | 66 --------------------------- src/mainboard/intel/eagleheights/romstage.c | 2 +- src/mainboard/intel/jarrell/debug.c | 66 --------------------------- src/mainboard/intel/jarrell/romstage.c | 2 +- src/mainboard/supermicro/x6dai_g/debug.c | 66 --------------------------- src/mainboard/supermicro/x6dai_g/romstage.c | 2 +- src/mainboard/supermicro/x6dhe_g/debug.c | 66 --------------------------- src/mainboard/supermicro/x6dhe_g/romstage.c | 2 +- src/mainboard/supermicro/x6dhe_g2/debug.c | 66 --------------------------- src/mainboard/supermicro/x6dhe_g2/romstage.c | 2 +- src/mainboard/supermicro/x6dhr_ig/debug.c | 66 --------------------------- src/mainboard/supermicro/x6dhr_ig/romstage.c | 2 +- src/mainboard/supermicro/x6dhr_ig2/debug.c | 66 --------------------------- src/mainboard/supermicro/x6dhr_ig2/romstage.c | 2 +- 15 files changed, 7 insertions(+), 535 deletions(-) diff --git a/src/mainboard/arima/hdama/debug.c b/src/mainboard/arima/hdama/debug.c index a6f0d55..bcb918e 100644 --- a/src/mainboard/arima/hdama/debug.c +++ b/src/mainboard/arima/hdama/debug.c @@ -1,70 +1,4 @@ -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - static void dump_spd_registers(int controllers, const struct mem_controller *ctrl) { int n; diff --git a/src/mainboard/intel/eagleheights/debug.c b/src/mainboard/intel/eagleheights/debug.c index e5795b6..d2c3d58 100644 --- a/src/mainboard/intel/eagleheights/debug.c +++ b/src/mainboard/intel/eagleheights/debug.c @@ -131,55 +131,6 @@ static inline void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static inline void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static inline void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static inline void dump_bar14(unsigned dev) { int i; @@ -208,23 +159,6 @@ static inline void dump_bar14(unsigned dev) print_debug("\n"); } -static inline void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - static inline void dump_spd_registers(void) { unsigned device; diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index e35140b..c03c7d7 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -37,6 +37,7 @@ #include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/intel/i3100/i3100.h" #include "southbridge/intel/i3100/i3100.h" +#include "lib/debug.c" // XXX #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) @@ -71,7 +72,6 @@ static inline int spd_read_byte(u16 device, u8 address) #include "northbridge/intel/i3100/raminit.c" #include "lib/generic_sdram.c" #include "northbridge/intel/i3100/reset_test.c" -#include "debug.c" #include <spd.h> #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) diff --git a/src/mainboard/intel/jarrell/debug.c b/src/mainboard/intel/jarrell/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/intel/jarrell/debug.c +++ b/src/mainboard/intel/jarrell/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c index f1cf4c3..fb4d483 100644 --- a/src/mainboard/intel/jarrell/romstage.c +++ b/src/mainboard/intel/jarrell/romstage.c @@ -18,6 +18,7 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" #include <spd.h> +#include "lib/debug.c" // XXX #define SIO_GPIO_BASE 0x680 #define SIO_XBUS_BASE 0x4880 @@ -35,7 +36,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/intel/e7520/raminit.c" #include "lib/generic_sdram.c" -#include "debug.c" #include "arch/x86/lib/stages.c" #include <cpu/intel/romstage.h> diff --git a/src/mainboard/supermicro/x6dai_g/debug.c b/src/mainboard/supermicro/x6dai_g/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/supermicro/x6dai_g/debug.c +++ b/src/mainboard/supermicro/x6dai_g/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c index 0385cad..bd9eda7 100644 --- a/src/mainboard/supermicro/x6dai_g/romstage.c +++ b/src/mainboard/supermicro/x6dai_g/romstage.c @@ -11,7 +11,7 @@ #include "northbridge/intel/e7525/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" +#include "lib/debug.c" // XXX #include "watchdog.c" #include "southbridge/intel/esb6300/reset.c" #include "superio/winbond/w83627hf/early_serial.c" diff --git a/src/mainboard/supermicro/x6dhe_g/debug.c b/src/mainboard/supermicro/x6dhe_g/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/supermicro/x6dhe_g/debug.c +++ b/src/mainboard/supermicro/x6dhe_g/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c index 405a2bc..74660c6 100644 --- a/src/mainboard/supermicro/x6dhe_g/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g/romstage.c @@ -11,7 +11,7 @@ #include "northbridge/intel/e7520/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" +#include "lib/debug.c" // XXX #include "watchdog.c" #include "southbridge/intel/esb6300/reset.c" #include "superio/winbond/w83627hf/early_serial.c" diff --git a/src/mainboard/supermicro/x6dhe_g2/debug.c b/src/mainboard/supermicro/x6dhe_g2/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/supermicro/x6dhe_g2/debug.c +++ b/src/mainboard/supermicro/x6dhe_g2/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 48945eb..928cf09 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -10,7 +10,7 @@ #include "superio/nsc/pc87427/pc87427.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" +#include "lib/debug.c" // XXX #include "watchdog.c" #include "southbridge/intel/i82801ex/reset.c" #include "superio/nsc/pc87427/early_init.c" diff --git a/src/mainboard/supermicro/x6dhr_ig/debug.c b/src/mainboard/supermicro/x6dhr_ig/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/supermicro/x6dhr_ig/debug.c +++ b/src/mainboard/supermicro/x6dhr_ig/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c index 08b0ccd..cada380 100644 --- a/src/mainboard/supermicro/x6dhr_ig/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c @@ -9,7 +9,7 @@ #include "northbridge/intel/e7520/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" +#include "lib/debug.c" // XXX #include "watchdog.c" #include "southbridge/intel/i82801ex/reset.c" #include "superio/winbond/w83627hf/early_serial.c" diff --git a/src/mainboard/supermicro/x6dhr_ig2/debug.c b/src/mainboard/supermicro/x6dhr_ig2/debug.c index 93199d7..b92a75d 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/debug.c +++ b/src/mainboard/supermicro/x6dhr_ig2/debug.c @@ -109,55 +109,6 @@ static void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static void dump_bar14(unsigned dev) { int i; @@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev) print_debug("\n"); } -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - #if 0 static void dump_spd_registers(const struct mem_controller *ctrl) { diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index dfe0da2..09930ec 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -9,7 +9,7 @@ #include "northbridge/intel/e7520/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" -#include "debug.c" +#include "lib/debug.c" // XXX #include "watchdog.c" #include "southbridge/intel/i82801ex/reset.c" #include "superio/winbond/w83627hf/early_serial.c"

1 0

New patch to review for coreboot: b8f18b7 mainboard/intel/eagleheights/debug.c: Remove dead code
by Edward O'Callaghan 02 Nov '14

02 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7315 -gerrit commit b8f18b7a6322283629306ec7de477780bf73fc78 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Nov 2 10:20:50 2014 +1100 mainboard/intel/eagleheights/debug.c: Remove dead code We already have these in 'lib/debug.c'. Change-Id: I9c03ace9cef6bab05a6bf30d9506929696079a47 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/intel/eagleheights/debug.c | 66 -------------------------------- 1 file changed, 66 deletions(-) diff --git a/src/mainboard/intel/eagleheights/debug.c b/src/mainboard/intel/eagleheights/debug.c index e5795b6..d2c3d58 100644 --- a/src/mainboard/intel/eagleheights/debug.c +++ b/src/mainboard/intel/eagleheights/debug.c @@ -131,55 +131,6 @@ static inline void siodump(void) return; } -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static inline void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static inline void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - static inline void dump_bar14(unsigned dev) { int i; @@ -208,23 +159,6 @@ static inline void dump_bar14(unsigned dev) print_debug("\n"); } -static inline void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - static inline void dump_spd_registers(void) { unsigned device;

1 0

New patch to review for coreboot: 4e48f09 mainboard/arisma/hdama: Remove some dead code
by Edward O'Callaghan 02 Nov '14

02 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7314 -gerrit commit 4e48f097e9981105d52efebd703e79330aeb6059 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Nov 2 10:17:10 2014 +1100 mainboard/arisma/hdama: Remove some dead code We already have these in 'lib/debug.c'. Change-Id: Iac9bf57425c07ffe808d906b4e44a48b789bdc59 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/arima/hdama/debug.c | 66 --------------------------------------- 1 file changed, 66 deletions(-) diff --git a/src/mainboard/arima/hdama/debug.c b/src/mainboard/arima/hdama/debug.c index a6f0d55..bcb918e 100644 --- a/src/mainboard/arima/hdama/debug.c +++ b/src/mainboard/arima/hdama/debug.c @@ -1,70 +1,4 @@ -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} - static void dump_spd_registers(int controllers, const struct mem_controller *ctrl) { int n;

1 0

Patch set updated for coreboot: 06fd1f8 include/*: Clarify correct typing of 'struct device *'
by Edward O'Callaghan 01 Nov '14

01 Nov '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7311 -gerrit commit 06fd1f8543b5d8db002d1b43e43dc03ae2b7b5ae Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 13:55:04 2014 +1100 include/*: Clarify correct typing of 'struct device *' Disambiguate 'device_t' into 'struct device *', 'pci_devfn_t' and 'pnp_devfn_t' component types where appropriate. Change-Id: I114341d745b8852217ca335a2c957917507de8f9 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/include/cpu/amd/model_fxx_rev.h | 7 ++-- src/include/device/agp.h | 2 +- src/include/device/cardbus.h | 4 +-- src/include/device/device.h | 69 ++++++++++++++++++------------------- src/include/device/pci.h | 30 ++++++++-------- src/include/device/pci_ops.h | 24 ++++++------- src/include/device/pciexp.h | 2 +- src/include/device/pcix.h | 2 +- src/include/device/pnp.h | 38 ++++++++++---------- src/include/device/smbus.h | 54 ++++++++++++++--------------- src/include/reg_script.h | 6 ++-- 11 files changed, 119 insertions(+), 119 deletions(-) diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index 1e85596..c3ef4e9 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -1,4 +1,5 @@ #include <arch/cpu.h> +#include <arch/io.h> int init_processor_name(void); @@ -59,7 +60,7 @@ static int is_e0_later_in_bsp(int nodeid) return !is_cpu_pre_e0(); } // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid,2); val_old = pci_read_config32(dev, 0x80); val = val_old; @@ -101,7 +102,7 @@ static inline int is_cpu_pre_f2(void) static inline int is_cpu_f0_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff00) == 0x40f00; @@ -109,7 +110,7 @@ static inline int is_cpu_f0_in_bsp(int nodeid) static inline int is_cpu_pre_f2_in_bsp(int nodeid) { uint32_t dword; - device_t dev; + pci_devfn_t dev; dev = PCI_DEV(0, 0x18+nodeid, 3); dword = pci_read_config32(dev, 0xfc); return (dword & 0xfff0f) < 0x40f02; diff --git a/src/include/device/agp.h b/src/include/device/agp.h index be2b833..b3791fe 100644 --- a/src/include/device/agp.h +++ b/src/include/device/agp.h @@ -7,7 +7,7 @@ unsigned int agp_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); -unsigned int agp_scan_bridge(device_t dev, unsigned int max); +unsigned int agp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_agp_ops_bus; diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h index 45ae24f..4443c15 100644 --- a/src/include/device/cardbus.h +++ b/src/include/device/cardbus.h @@ -5,8 +5,8 @@ #include <device/device.h> -void cardbus_read_resources(device_t dev); -void cardbus_enable_resources(device_t dev); +void cardbus_read_resources(struct device *dev); +void cardbus_enable_resources(struct device *dev); extern struct device_operations default_cardbus_ops_bus; diff --git a/src/include/device/device.h b/src/include/device/device.h index c67205c..fe8dbed 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -41,19 +41,19 @@ struct smbios_type11; struct acpi_rsdp; struct device_operations { - void (*read_resources)(device_t dev); - void (*set_resources)(device_t dev); - void (*enable_resources)(device_t dev); - void (*init)(device_t dev); - void (*final)(device_t dev); - unsigned int (*scan_bus)(device_t bus, unsigned int _max); - void (*enable)(device_t dev); - void (*disable)(device_t dev); - void (*set_link)(device_t dev, unsigned int link); + void (*read_resources)(struct device *dev); + void (*set_resources)(struct device *dev); + void (*enable_resources)(struct device *dev); + void (*init)(struct device *dev); + void (*final)(struct device *dev); + unsigned int (*scan_bus)(struct device *bus, unsigned int _max); + void (*enable)(struct device *dev); + void (*disable)(struct device *dev); + void (*set_link)(struct device *dev, unsigned int link); void (*reset_bus)(struct bus *bus); #if CONFIG_GENERATE_SMBIOS_TABLES - int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current); - void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t); + int (*get_smbios_data)(struct device *dev, int *handle, unsigned long *current); + void (*get_smbios_strings)(struct device *dev, struct smbios_type11 *t); #endif #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) && IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES) unsigned long (*write_acpi_tables)(unsigned long start, struct acpi_rsdp *rsdp); @@ -62,7 +62,7 @@ struct device_operations { #endif const struct pci_operations *ops_pci; const struct smbus_bus_operations *ops_smbus_bus; - const struct pci_bus_operations * (*ops_pci_bus)(device_t dev); + const struct pci_bus_operations * (*ops_pci_bus)(struct device *dev); const struct pnp_mode_ops *ops_pnp_mode; }; @@ -76,9 +76,8 @@ static inline void device_noop(struct device *dev) {} struct bus { - - ROMSTAGE_CONST struct device * dev; /* This bridge device */ - ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ + ROMSTAGE_CONST struct device *dev; /* This bridge device */ + ROMSTAGE_CONST struct device *children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ unsigned bridge_ctrl; /* Bridge control register */ unsigned char link_num; /* The index of this link */ @@ -98,7 +97,7 @@ struct pci_irq_info { unsigned int ioapic_irq_pin; unsigned int ioapic_src_pin; unsigned int ioapic_dst_id; - unsigned int ioapic_flags; + unsigned int ioapic_flags; }; struct device { @@ -159,7 +158,7 @@ extern uint64_t uma_memory_size; #endif /* Generic device interface functions */ -device_t alloc_dev(struct bus *parent, struct device_path *path); +struct device *alloc_dev(struct bus *parent, struct device_path *path); void dev_initialize_chips(void); void dev_enumerate(void); void dev_configure(void); @@ -175,30 +174,30 @@ unsigned int scan_bus(struct device *bus, unsigned int _max); void assign_resources(struct bus *bus); void enumerate_static_device(void); void enumerate_static_devices(void); -const char *dev_name(device_t dev); -const char *dev_path(device_t dev); -u32 dev_path_encode(device_t dev); +const char *dev_name(struct device *dev); +const char *dev_path(struct device *dev); +u32 dev_path_encode(struct device *dev); const char *bus_path(struct bus *bus); -void dev_set_enabled(device_t dev, int enable); +void dev_set_enabled(struct device *dev, int enable); void disable_children(struct bus *bus); /* Option ROM helper functions */ void run_bios(struct device *dev, unsigned long addr); /* Helper functions */ -device_t find_dev_path(struct bus *parent, struct device_path *path); -device_t alloc_find_dev(struct bus *parent, struct device_path *path); -device_t dev_find_device (u16 vendor, u16 device, device_t from); -device_t dev_find_class (unsigned int class, device_t from); -device_t dev_find_slot (unsigned int bus, unsigned int devfn); -device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); -device_t dev_find_slot_pnp(u16 port, u16 device); -device_t dev_find_lapic(unsigned apic_id); +struct device *find_dev_path(struct bus *parent, struct device_path *path); +struct device *alloc_find_dev(struct bus *parent, struct device_path *path); +struct device *dev_find_device (u16 vendor, u16 device, struct device *from); +struct device *dev_find_class (unsigned int class, struct device *from); +struct device *dev_find_slot (unsigned int bus, unsigned int devfn); +struct device *dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); +struct device *dev_find_slot_pnp(u16 port, u16 device); +struct device *dev_find_lapic(unsigned apic_id); int dev_count_cpu(void); void remap_bsp_lapic(struct bus *cpu_bus); -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread); +struct device *add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); +void set_cpu_topology(struct device *cpu, unsigned node, unsigned package, unsigned core, unsigned thread); #define amd_cpu_topology(cpu, node, core) \ set_cpu_topology(cpu, node, 0, core, 0) @@ -207,7 +206,7 @@ void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned co set_cpu_topology(cpu, 0, package, core, thread) /* Debug functions */ -void print_resource_tree(struct device * root, int debug_level, +void print_resource_tree(struct device *root, int debug_level, const char *msg); void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum); void show_devs_subtree(struct device *root, int debug_level, const char *msg); @@ -226,9 +225,9 @@ void show_all_devs_resources(int debug_level, const char* msg); extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max); -unsigned int scan_static_bus(device_t bus, unsigned int _max); +unsigned int scan_static_bus(struct device *bus, unsigned int _max); -void fixed_mem_resource(device_t dev, unsigned long index, +void fixed_mem_resource(struct device *dev, unsigned long index, unsigned long basek, unsigned long sizek, unsigned long type); @@ -257,7 +256,7 @@ u32 find_pci_tolm(struct bus *bus); ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus, unsigned int devfn); -ROMSTAGE_CONST struct device *dev_find_next_pci_device( +ROMSTAGE_CONST struct device * dev_find_next_pci_device( ROMSTAGE_CONST struct device *previous_dev); ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 0670da4..3688322 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -32,7 +32,7 @@ /* Common pci operations without a standard interface */ struct pci_operations { /* set the Subsystem IDs for the PCI device */ - void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device); + void (*set_subsystem)(struct device *dev, unsigned vendor, unsigned device); }; /* Common pci bus operations */ @@ -62,35 +62,35 @@ extern struct pci_driver epci_drivers[]; extern struct device_operations default_pci_ops_dev; extern struct device_operations default_pci_ops_bus; -void pci_dev_read_resources(device_t dev); -void pci_bus_read_resources(device_t dev); -void pci_dev_set_resources(device_t dev); -void pci_dev_enable_resources(device_t dev); -void pci_bus_enable_resources(device_t dev); +void pci_dev_read_resources(struct device *dev); +void pci_bus_read_resources(struct device *dev); +void pci_dev_set_resources(struct device *dev); +void pci_dev_enable_resources(struct device *dev); +void pci_bus_enable_resources(struct device *dev); void pci_bus_reset(struct bus *bus); -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); -unsigned int do_pci_scan_bridge(device_t bus, unsigned int max, +struct device *pci_probe_dev(struct device *dev, struct bus *bus, unsigned devfn); +unsigned int do_pci_scan_bridge(struct device *bus, unsigned int max, unsigned int (*do_scan_bus)(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max)); -unsigned int pci_scan_bridge(device_t bus, unsigned int max); +unsigned int pci_scan_bridge(struct device *bus, unsigned int max); unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max); uint8_t pci_moving_config8(struct device *dev, unsigned reg); uint16_t pci_moving_config16(struct device *dev, unsigned reg); uint32_t pci_moving_config32(struct device *dev, unsigned reg); struct resource *pci_get_resource(struct device *dev, unsigned long index); -void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); +void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device); void pci_dev_init(struct device *dev); -unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev); +unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev); const char * pin_to_str(int pin); -int get_pci_irq_pins(device_t dev, device_t *parent_bdg); +int get_pci_irq_pins(struct device *dev, struct device **parent_bdg); void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4]); #define PCI_IO_BRIDGE_ALIGN 4096 #define PCI_MEM_BRIDGE_ALIGN (1024*1024) -static inline const struct pci_operations *ops_pci(device_t dev) +static inline const struct pci_operations *ops_pci(struct device *dev) { const struct pci_operations *pops; pops = 0; @@ -106,8 +106,8 @@ static inline const struct pci_operations *ops_pci(device_t dev) unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); #else /* !__PRE_RAM__ */ -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(device_t dev, unsigned cap); +unsigned pci_find_next_capability(struct device *dev, unsigned cap, unsigned last); +unsigned pci_find_capability(struct device *dev, unsigned cap); #endif /* __PRE_RAM__ */ void pci_early_bridge_init(void); diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h index ae58a01..920475a 100644 --- a/src/include/device/pci_ops.h +++ b/src/include/device/pci_ops.h @@ -6,20 +6,20 @@ #include <arch/pci_ops.h> #ifndef __SIMPLE_DEVICE__ -u8 pci_read_config8(device_t dev, unsigned int where); -u16 pci_read_config16(device_t dev, unsigned int where); -u32 pci_read_config32(device_t dev, unsigned int where); -void pci_write_config8(device_t dev, unsigned int where, u8 val); -void pci_write_config16(device_t dev, unsigned int where, u16 val); -void pci_write_config32(device_t dev, unsigned int where, u32 val); +u8 pci_read_config8(struct device *dev, unsigned int where); +u16 pci_read_config16(struct device *dev, unsigned int where); +u32 pci_read_config32(struct device *dev, unsigned int where); +void pci_write_config8(struct device *dev, unsigned int where, u8 val); +void pci_write_config16(struct device *dev, unsigned int where, u16 val); +void pci_write_config32(struct device *dev, unsigned int where, u32 val); #if CONFIG_MMCONF_SUPPORT -u8 pci_mmio_read_config8(device_t dev, unsigned int where); -u16 pci_mmio_read_config16(device_t dev, unsigned int where); -u32 pci_mmio_read_config32(device_t dev, unsigned int where); -void pci_mmio_write_config8(device_t dev, unsigned int where, u8 val); -void pci_mmio_write_config16(device_t dev, unsigned int where, u16 val); -void pci_mmio_write_config32(device_t dev, unsigned int where, u32 val); +u8 pci_mmio_read_config8(struct device *dev, unsigned int where); +u16 pci_mmio_read_config16(struct device *dev, unsigned int where); +u32 pci_mmio_read_config32(struct device *dev, unsigned int where); +void pci_mmio_write_config8(struct device *dev, unsigned int where, u8 val); +void pci_mmio_write_config16(struct device *dev, unsigned int where, u16 val); +void pci_mmio_write_config32(struct device *dev, unsigned int where, u32 val); #endif #endif diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h index 87a5002..c7ff4f5 100644 --- a/src/include/device/pciexp.h +++ b/src/include/device/pciexp.h @@ -11,7 +11,7 @@ enum aspm_type { unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pciexp_scan_bridge(device_t dev, unsigned int max); +unsigned int pciexp_scan_bridge(struct device *dev, unsigned int max); extern struct device_operations default_pciexp_ops_bus; diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index 4ffab5b..8cc83df 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -4,7 +4,7 @@ unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn, unsigned int max); -unsigned int pcix_scan_bridge(device_t dev, unsigned int max); +unsigned int pcix_scan_bridge(struct device *dev, unsigned int max); const char *pcix_speed(u16 sstatus); extern struct device_operations default_pcix_ops_bus; diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index d0d6fa3..9290056 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -9,21 +9,21 @@ #ifndef __SIMPLE_DEVICE__ /* Primitive PNP resource manipulation */ -void pnp_write_config(device_t dev, u8 reg, u8 value); -u8 pnp_read_config(device_t dev, u8 reg); -void pnp_set_logical_device(device_t dev); -void pnp_set_enable(device_t dev, int enable); -int pnp_read_enable(device_t dev); -void pnp_set_iobase(device_t dev, u8 index, u16 iobase); -void pnp_set_irq(device_t dev, u8 index, u8 irq); -void pnp_set_drq(device_t dev, u8 index, u8 drq); +void pnp_write_config(struct device *dev, u8 reg, u8 value); +u8 pnp_read_config(struct device *dev, u8 reg); +void pnp_set_logical_device(struct device *dev); +void pnp_set_enable(struct device *dev, int enable); +int pnp_read_enable(struct device *dev); +void pnp_set_iobase(struct device *dev, u8 index, u16 iobase); +void pnp_set_irq(struct device *dev, u8 index, u8 irq); +void pnp_set_drq(struct device *dev, u8 index, u8 drq); /* PNP device operations */ -void pnp_read_resources(device_t dev); -void pnp_set_resources(device_t dev); -void pnp_enable_resources(device_t dev); -void pnp_enable(device_t dev); -void pnp_alt_enable(device_t dev); +void pnp_read_resources(struct device *dev); +void pnp_set_resources(struct device *dev); +void pnp_enable_resources(struct device *dev); +void pnp_enable(struct device *dev); +void pnp_alt_enable(struct device *dev); extern struct device_operations pnp_ops; @@ -52,16 +52,16 @@ struct pnp_info { #define PNP_MSC10 0x1000 struct io_info io0, io1, io2, io3; }; -struct resource *pnp_get_resource(device_t dev, unsigned index); +struct resource *pnp_get_resource(struct device *dev, unsigned index); void pnp_enable_devices(struct device *dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info); struct pnp_mode_ops { - void (*enter_conf_mode)(device_t dev); - void (*exit_conf_mode)(device_t dev); + void (*enter_conf_mode)(struct device *dev); + void (*exit_conf_mode)(struct device *dev); }; -void pnp_enter_conf_mode(device_t dev); -void pnp_exit_conf_mode(device_t dev); +void pnp_enter_conf_mode(struct device *dev); +void pnp_exit_conf_mode(struct device *dev); #endif /* ! __SIMPLE_DEVICE__ */ -#endif /* DEVICE_PNP_H */ +#endif /*devICE_PNP_H */ diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index 073d7e2..7002459 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -8,17 +8,17 @@ /* Common SMBus bus operations */ struct smbus_bus_operations { - int (*quick_read) (device_t dev); - int (*quick_write) (device_t dev); - int (*recv_byte) (device_t dev); - int (*send_byte) (device_t dev, u8 value); - int (*read_byte) (device_t dev, u8 addr); - int (*write_byte) (device_t dev, u8 addr, u8 value); - int (*read_word) (device_t dev, u8 addr); - int (*write_word) (device_t dev, u8 addr, u16 value); - int (*process_call)(device_t dev, u8 cmd, u16 data); - int (*block_read) (device_t dev, u8 cmd, u8 bytes, u8 *buffer); - int (*block_write) (device_t dev, u8 cmd, u8 bytes, const u8 *buffer); + int (*quick_read) (struct device *dev); + int (*quick_write) (struct device *dev); + int (*recv_byte) (struct device *dev); + int (*send_byte) (struct device *dev, u8 value); + int (*read_byte) (struct device *dev, u8 addr); + int (*write_byte) (struct device *dev, u8 addr, u8 value); + int (*read_word) (struct device *dev, u8 addr); + int (*write_word) (struct device *dev, u8 addr, u16 value); + int (*process_call)(struct device *dev, u8 cmd, u16 data); + int (*block_read) (struct device *dev, u8 cmd, u8 bytes, u8 *buffer); + int (*block_write) (struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); }; static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) @@ -32,19 +32,19 @@ static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) return bops; } -struct bus *get_pbus_smbus(device_t dev); -int smbus_set_link(device_t dev); - -int smbus_quick_read(device_t dev); -int smbus_quick_write(device_t dev); -int smbus_recv_byte(device_t dev); -int smbus_send_byte(device_t dev, u8 byte); -int smbus_read_byte(device_t dev, u8 addr); -int smbus_write_byte(device_t dev, u8 addr, u8 val); -int smbus_read_word(device_t dev, u8 addr); -int smbus_write_word(device_t dev, u8 addr, u16 val); -int smbus_process_call(device_t dev, u8 cmd, u16 data); -int smbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buffer); -int smbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buffer); - -#endif /* DEVICE_SMBUS_H */ +struct bus *get_pbus_smbus(struct device *dev); +int smbus_set_link(struct device *dev); + +int smbus_quick_read(struct device *dev); +int smbus_quick_write(struct device *dev); +int smbus_recv_byte(struct device *dev); +int smbus_send_byte(struct device *dev, u8 byte); +int smbus_read_byte(struct device *dev, u8 addr); +int smbus_write_byte(struct device *dev, u8 addr, u8 val); +int smbus_read_word(struct device *dev, u8 addr); +int smbus_write_word(struct device *dev, u8 addr, u16 val); +int smbus_process_call(struct device *dev, u8 cmd, u16 data); +int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer); +int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); + +#endif /*devICE_SMBUS_H */ diff --git a/src/include/reg_script.h b/src/include/reg_script.h index 97b4fb0..71be7c2 100644 --- a/src/include/reg_script.h +++ b/src/include/reg_script.h @@ -34,7 +34,7 @@ * are employed: * - Chaining of tables that allow runtime tables to chain to compile-time * tables. - * - Notion of current device (device_t) being worked on. This allows for + * - Notion of current device (struct device *) being worked on. This allows for * PCI config, io, and mmio on a particular device's resources. * * Note that when using REG_SCRIPT_COMMAND_NEXT there is an implicit push @@ -80,7 +80,7 @@ struct reg_script { union { uint32_t id; const struct reg_script *next; - device_t dev; + struct device *dev; unsigned int res_index; }; }; @@ -334,6 +334,6 @@ struct reg_script { _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_END, 0, 0, 0, 0, 0, 0, 0) void reg_script_run(const struct reg_script *script); -void reg_script_run_on_dev(device_t dev, const struct reg_script *step); +void reg_script_run_on_dev(struct device *dev, const struct reg_script *step); #endif /* REG_SCRIPT_H */

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Patch merged into coreboot/master: 27a63d7 superio/fintek/f81216h: Implement device support
by gerrit＠coreboot.org 01 Nov '14

01 Nov '14

the following patch was just integrated into master: commit 27a63d77339ea47133d150e1383fd236a332afe5 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 1 10:19:58 2014 +1100 superio/fintek/f81216h: Implement device support Change-Id: I20a34b569f109dd12af29e9e0cee8f7f6b8ebb80 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/7309 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> See http://review.coreboot.org/7309 for details. -gerrit

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coreboot-gerrit November 2014