coreboot-gerrit May 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 998d0c6 exynos5250/snow: deprecate time.h
by gerrit＠coreboot.org 06 May '13

06 May '13

the following patch was just integrated into master: commit 998d0c6d50cd75a703ae6cb161a406a382cdd8a2 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 16:47:54 2013 -0700 exynos5250/snow: deprecate time.h This re-introduces 2fde966 (http://review.coreboot.org/#/c/3177/) which was reverted due to unsatisfied dependencies. time.h We Hardly Knew Ye. This deprecates time.h which is currently only used by Exynos5250 and Snow. The original idea was to try and unify some of the various timer interfaces and has been supplanted by the monotonic timer API. timer_us() is now obsolete. timer_start() is now mct_start() and is exposed in exynos5250/clk.h. Change-Id: I8e60105629d9da68ed622e89209b3ef6c8e2445b Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/3201 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Mon May 6 04:23:27 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Mon May 6 05:32:07 2013, giving +2 See http://review.coreboot.org/3201 for details. -gerrit

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Patch set updated for coreboot: 8c28434 x86: add TSC_CONSTANT_RATE option
by David Hendricks 06 May '13

06 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3168 -gerrit commit 8c28434cb0a242cfc392ff9412cacb77a230a294 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed May 1 15:27:09 2013 -0500 x86: add TSC_CONSTANT_RATE option Some boards use the local apic for udelay(), but they also provide their own implementation of udelay() for SMM. The reason for using the local apic for udelay() in ramstage is to not have to pay the penalty of calibrating the TSC frequency. Therefore provide a TSC_CONSTANT_RATE option to indicate that TSC calibration is not needed. Instead rely on the presence of a tsc_freq_mhz() function provided by the cpu/board. Additionally, assume that if TSC_CONSTANT_RATE is selected the udelay() function in SMM will be the tsc. Change-Id: I1629c2fbe3431772b4e80495160584fb6f599e9e Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/x86/Kconfig | 7 +++++++ src/cpu/x86/tsc/Makefile.inc | 4 ++++ src/cpu/x86/tsc/delay_tsc.c | 27 ++++++++++++++++++++++++--- src/include/cpu/x86/tsc.h | 4 ++++ 4 files changed, 39 insertions(+), 3 deletions(-) diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 5cf40fa..c64a8e4 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -25,6 +25,13 @@ config UDELAY_TSC bool default n +config TSC_CONSTANT_RATE + def_bool n + depends on UDELAY_TSC + help + This option asserts that the TSC ticks at a known constant rate. + Therefore, no TSC calibration is required. + config TSC_MONOTONIC_TIMER def_bool n depends on UDELAY_TSC diff --git a/src/cpu/x86/tsc/Makefile.inc b/src/cpu/x86/tsc/Makefile.inc index 44bfe85..3bbae84 100644 --- a/src/cpu/x86/tsc/Makefile.inc +++ b/src/cpu/x86/tsc/Makefile.inc @@ -1,2 +1,6 @@ ramstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c +romstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c +ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) +smm-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c +endif diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index e4993d0..0540496 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -5,8 +5,16 @@ #include <smp/spinlock.h> #include <delay.h> +#if !defined(__PRE_RAM__) + static unsigned long clocks_per_usec; +#if CONFIG_TSC_CONSTANT_RATE +static unsigned long calibrate_tsc(void) +{ + return tsc_freq_mhz(); +} +#else /* CONFIG_TSC_CONSTANT_RATE */ #if !CONFIG_TSC_CALIBRATE_WITH_IO #define CLOCK_TICK_RATE 1193180U /* Underlying HZ */ @@ -139,6 +147,7 @@ static unsigned long long calibrate_tsc(void) #endif /* CONFIG_TSC_CALIBRATE_WITH_IO */ +#endif /* CONFIG_TSC_CONSTANT_RATE */ void init_timer(void) { @@ -148,15 +157,27 @@ void init_timer(void) } } +static inline unsigned long get_clocks_per_usec(void) +{ + init_timer(); + return clocks_per_usec; +} +#else /* !defined(__PRE_RAM__) */ +/* romstage calls into cpu/board specific function every time. */ +static inline unsigned long get_clocks_per_usec(void) +{ + return tsc_freq_mhz(); +} +#endif /* !defined(__PRE_RAM__) */ + void udelay(unsigned us) { unsigned long long count; unsigned long long stop; unsigned long long clocks; - init_timer(); clocks = us; - clocks *= clocks_per_usec; + clocks *= get_clocks_per_usec(); count = rdtscll(); stop = clocks + count; while(stop > count) { @@ -165,7 +186,7 @@ void udelay(unsigned us) } } -#if CONFIG_TSC_MONOTONIC_TIMER +#if CONFIG_TSC_MONOTONIC_TIMER && !defined(__PRE_RAM__) && !defined(__SMM__) #include <timer.h> static struct monotonic_counter { diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h index 6ce7f5f..8e49a66 100644 --- a/src/include/cpu/x86/tsc.h +++ b/src/include/cpu/x86/tsc.h @@ -40,4 +40,8 @@ static inline unsigned long long rdtscll(void) } #endif +#if CONFIG_TSC_CONSTANT_RATE +unsigned long tsc_freq_mhz(void); +#endif + #endif /* CPU_X86_TSC_H */

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New patch to review for coreboot: 5f18153 exynos5250/snow: deprecate time.h
by David Hendricks 06 May '13

06 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3201 -gerrit commit 5f1815349a3a4e867b6f97c95c8fa736fbc8ae5c Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu May 2 16:47:54 2013 -0700 exynos5250/snow: deprecate time.h This re-introduces 2fde966 (http://review.coreboot.org/#/c/3177/) which was reverted due to unsatisfied dependencies. time.h We Hardly Knew Ye. This deprecates time.h which is currently only used by Exynos5250 and Snow. The original idea was to try and unify some of the various timer interfaces and has been supplanted by the monotonic timer API. timer_us() is now obsolete. timer_start() is now mct_start() and is exposed in exynos5250/clk.h. Change-Id: I8e60105629d9da68ed622e89209b3ef6c8e2445b Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/cpu/samsung/exynos5250/clk.h | 1 + src/cpu/samsung/exynos5250/mct.c | 12 ++---------- src/cpu/samsung/exynos5250/monotonic_timer.c | 1 - src/include/time.h | 26 -------------------------- src/mainboard/google/snow/bootblock.c | 6 +++--- src/mainboard/google/snow/romstage.c | 1 - 6 files changed, 6 insertions(+), 41 deletions(-) diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 1894c00..828e7d8 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -585,6 +585,7 @@ int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); +void mct_start(void); uint64_t mct_raw_value(void); #endif diff --git a/src/cpu/samsung/exynos5250/mct.c b/src/cpu/samsung/exynos5250/mct.c index 4216643..db76e9d 100644 --- a/src/cpu/samsung/exynos5250/mct.c +++ b/src/cpu/samsung/exynos5250/mct.c @@ -22,7 +22,7 @@ #include <arch/io.h> #include <stdint.h> -#include <time.h> + #include "clk.h" struct __attribute__((packed)) mct_regs @@ -101,16 +101,8 @@ uint64_t mct_raw_value(void) return (upper << 32) | lower; } -void timer_start(void) +void mct_start(void) { writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon); enabled = 1; } - -u32 timer_us(void) -{ - uint64_t raw = mct_raw_value(); - static uint32_t ticks_per_microsecond = MCT_HZ/1000000; - uint32_t usec = raw / ticks_per_microsecond; - return usec; -} diff --git a/src/cpu/samsung/exynos5250/monotonic_timer.c b/src/cpu/samsung/exynos5250/monotonic_timer.c index 85fb208..7c6229b 100644 --- a/src/cpu/samsung/exynos5250/monotonic_timer.c +++ b/src/cpu/samsung/exynos5250/monotonic_timer.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <delay.h> #include <timer.h> -#include <time.h> /* TODO: deprecate in favor of monotonic timer stuff */ #include "clk.h" diff --git a/src/include/time.h b/src/include/time.h deleted file mode 100644 index 2cfcb35..0000000 --- a/src/include/time.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#ifndef TIME_H -#define TIME_H - -void timer_start(void); -u32 timer_us(void); - -#endif /* TIME_H */ diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 4464042..56c2650 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -21,8 +21,8 @@ #include <arch/io.h> #include <cbfs.h> #include <uart.h> -#include <time.h> #include <console/console.h> +#include <cpu/samsung/exynos5250/clk.h> #include <cpu/samsung/exynos5250/periph.h> #include <cpu/samsung/exynos5250/pinmux.h> #include "mainboard.h" @@ -30,10 +30,10 @@ void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { - /* kick off the microsecond timer. + /* kick off the multi-core timer. * We want to do this as early as we can. */ - timer_start(); + mct_start(); if (snow_get_wakeup_state() == SNOW_WAKEUP_DIRECT) { snow_wakeup(); diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index aa3a340..508dac6 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -36,7 +36,6 @@ #include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> #include <arch/stages.h> -#include <time.h> #include <drivers/maxim/max77686/max77686.h> #include <device/i2c.h>

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Patch merged into coreboot/master: 040f25b timer.h: add mono_time_diff_microseconds()
by gerrit＠coreboot.org 05 May '13

05 May '13

the following patch was just integrated into master: commit 040f25b73a9e131d18c2f64a6c3b60e695e3d7d6 Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri May 3 12:28:11 2013 -0700 timer.h: add mono_time_diff_microseconds() The current way to get a simple mono_time difference is: 1. Declare a rela_time struct 2. Assign it the value of mono_time_diff(t1, t2) 3. Get microseconds from it using rela_time_in_microseconds(). This patch adds a simpler method. Now one only needs to call mono_time_diff_microseconds(t1, t2) to obtain the same value which is produced from the above three steps. Change-Id: Ibfc9cd211e48e8e60a0a7703bff09cee3250e88b Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/3190 Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Sun May 5 23:54:39 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Sun May 5 23:57:02 2013, giving +2 See http://review.coreboot.org/3190 for details. -gerrit

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Patch set updated for coreboot: 8755a51 timer.h: add mono_time_diff_microseconds()
by David Hendricks 05 May '13

05 May '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3190 -gerrit commit 8755a51e44f03365beffc2e0f57628b43e3b07da Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri May 3 12:28:11 2013 -0700 timer.h: add mono_time_diff_microseconds() The current way to get a simple mono_time difference is: 1. Declare a rela_time struct 2. Assign it the value of mono_time_diff(t1, t2) 3. Get microseconds from it using rela_time_in_microseconds(). This patch adds a simpler method. Now one only needs to call mono_time_diff_microseconds(t1, t2) to obtain the same value which is produced from the above three steps. Change-Id: Ibfc9cd211e48e8e60a0a7703bff09cee3250e88b Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/include/timer.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/include/timer.h b/src/include/timer.h index e950c81..c32effe 100644 --- a/src/include/timer.h +++ b/src/include/timer.h @@ -155,4 +155,12 @@ static inline long rela_time_in_microseconds(const struct rela_time *rt) return rt->microseconds; } +static inline long mono_time_diff_microseconds(const struct mono_time *t1, + const struct mono_time *t2) +{ + struct rela_time rt; + rt = mono_time_diff(t1, t2); + return rela_time_in_microseconds(&rt); +} + #endif /* TIMER_H */

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New patch to review for coreboot: 589c409 ASUS F2A85-M: romstage.c: Set RAM voltage for non 1.5 Volt case
by Paul Menzel 05 May '13

05 May '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3200 -gerrit commit 589c409da58b580412725f1a7f657b8a1d0ee35f Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sun May 5 12:09:16 2013 +0200 ASUS F2A85-M: romstage.c: Set RAM voltage for non 1.5 Volt case Currently the if statement if (!byte) do_smbus_write_byte(0xb20, 0x15, 0x3, byte); only gets executed if `byte == 0x0`, that means only in the default case where RAM voltage is 1.5 Volts. But the RAM voltage should be changed when configured for the non-default case. So change the predicament to alter the RAM voltage for the non-default cases. Change-Id: I89542479c4cf6d412614bcf4586ea98e097328d6 Reported-by: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/asus/f2a85-m/romstage.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index c2fc75e..a8c8ba0 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -101,7 +101,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* set DDR3 voltage */ byte = CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL; - if (!byte) + /* default is byte = 0x0, so no need to set it in this case */ + if (byte) do_smbus_write_byte(0xb20, 0x15, 0x3, byte); }

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Patch set updated for coreboot: 8893337 ASUS F2A85-M: Provide HD Audio verb table for Realtek ALC887-VD
by Paul Menzel 05 May '13

05 May '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3170 -gerrit commit 88933373cc3b2988e65cf195a2f45d59ba75588e Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Tue Apr 2 20:51:15 2013 +0200 ASUS F2A85-M: Provide HD Audio verb table for Realtek ALC887-VD Use the same HD Audio [1] verb table for the Realtek ALC887-VD audio chip as the one set up by the proprietary vendor BIOS. Linux’ ALSA exposes this pin configuration under the virtual filesystem sysfs. /sys/class/sound/hwC1D0/init_pin_configs The script `alsa-info.sh` [2][3] is able to decode the table. Only one channel audio playback (rear connectors) is tested [4], which worked already before. [1] http://en.wikipedia.org/wiki/Intel_High_Definition_Audio [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2013-March/060717.html [3] http://alsa-project.org/main/index.php/Help_To_Debug [4] http://review.coreboot.org/#/c/3170/2//COMMIT_MSG Change-Id: I17fa2d4ab1e1a6bfd84de94e9e4a91bd67b6a0c0 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/asus/f2a85-m/BiosCallOuts.c | 37 +++++++++++++++++-------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index 0a13208..c4a524f 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -63,29 +63,32 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr) } /** - * AMD Thatcher Platform ALC272 Verb Table + * ASUS F2A85-M board ALC887-VD Verb Table + * + * Copied from `/sys/class/sound/hwC1D0/init_pin_configs` when running + * the vendor BIOS. */ -static const CODEC_ENTRY Thatcher_Alc272_VerbTbl[] = { - {0x11, 0x411111F0}, - {0x12, 0x411111F0}, - {0x13, 0x411111F0}, - {0x14, 0x411111F0}, - {0x15, 0x411111F0}, - {0x16, 0x411111F0}, - {0x17, 0x411111F0}, - {0x18, 0x01a19840}, - {0x19, 0x411111F0}, - {0x1a, 0x01813030}, - {0x1b, 0x411111F0}, - {0x1d, 0x40130605}, - {0x1e, 0x01441120}, - {0x21, 0x01211010}, +const CODEC_ENTRY f2a85_m_alc887_VerbTbl[] = { + {0x11, 0x99430140}, + {0x12, 0x411111f0}, + {0x14, 0x01014010}, + {0x15, 0x01011012}, + {0x16, 0x01016011}, + {0x17, 0x01012014}, + {0x18, 0x01a19850}, + {0x19, 0x02a19c60}, + {0x1a, 0x0181305f}, + {0x1b, 0x02214c20}, + {0x1c, 0x411111f0}, + {0x1d, 0x4005e601}, + {0x1e, 0x01456130}, + {0x1f, 0x411111f0}, {0xff, 0xffffffff} }; static const CODEC_TBL_LIST CodecTableList[] = { - {0x10ec0272, (CODEC_ENTRY*)&Thatcher_Alc272_VerbTbl[0]}, + {0x10ec0887, (CODEC_ENTRY*)&f2a85_m_alc887_VerbTbl[0]}, {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} };

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Patch set updated for coreboot: 18c702e sconfig: Refuse devicetree with leaf "chip"s
by Ronald G. Minnich 05 May '13

05 May '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3189 -gerrit commit 18c702e5703308724fd3b759549956cc822e2746 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri May 3 20:31:56 2013 +0200 sconfig: Refuse devicetree with leaf "chip"s It doesn't make sense to have a chip without any containing device in the device tree, and it creates lots of funny issues when trying to make use of such a tree (ask Ron). Since the right thing is to refuse such devicetrees, this change makes them a syntax error. Change-Id: Ia35b518bd4acd631e78bdf63c4424c0fa6a81229 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/sconfig/sconfig.tab.c_shipped | 122 +++++++++++++++++++------------------ util/sconfig/sconfig.y | 2 +- 2 files changed, 63 insertions(+), 61 deletions(-) diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped index 3a56ac8..1347b89 100644 --- a/util/sconfig/sconfig.tab.c_shipped +++ b/util/sconfig/sconfig.tab.c_shipped @@ -387,16 +387,16 @@ union yyalloc /* YYFINAL -- State number of the termination state. */ #define YYFINAL 3 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 37 +#define YYLAST 48 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 28 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 13 /* YYNRULES -- Number of rules. */ -#define YYNRULES 22 +#define YYNRULES 24 /* YYNRULES -- Number of states. */ -#define YYNSTATES 41 +#define YYNSTATES 46 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 @@ -444,30 +444,30 @@ static const yytype_uint8 yytranslate[] = YYRHS. */ static const yytype_uint8 yyprhs[] = { - 0, 0, 3, 4, 7, 10, 13, 16, 17, 20, - 23, 26, 29, 32, 33, 34, 40, 41, 49, 54, - 59, 63, 68 + 0, 0, 3, 4, 7, 10, 12, 15, 18, 21, + 24, 27, 30, 33, 36, 39, 40, 41, 47, 48, + 56, 61, 66, 70, 75 }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ static const yytype_int8 yyrhs[] = { 29, 0, -1, -1, 30, 33, -1, 31, 35, -1, - 31, 33, -1, 31, 38, -1, -1, 32, 35, -1, - 32, 33, -1, 32, 37, -1, 32, 39, -1, 32, - 40, -1, -1, -1, 3, 12, 34, 31, 9, -1, - -1, 4, 7, 22, 6, 36, 32, 9, -1, 8, - 22, 10, 22, -1, 5, 12, 10, 12, -1, 23, - 22, 22, -1, 23, 22, 22, 24, -1, 25, 22, - 27, 22, -1 + 35, -1, 31, 33, -1, 31, 38, -1, 38, 31, + -1, 33, 31, -1, 32, 35, -1, 32, 33, -1, + 32, 37, -1, 32, 39, -1, 32, 40, -1, -1, + -1, 3, 12, 34, 31, 9, -1, -1, 4, 7, + 22, 6, 36, 32, 9, -1, 8, 22, 10, 22, + -1, 5, 12, 10, 12, -1, 23, 22, 22, -1, + 23, 22, 22, 24, -1, 25, 22, 27, 22, -1 }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ static const yytype_uint8 yyrline[] = { - 0, 35, 35, 35, 37, 37, 37, 37, 39, 39, - 39, 39, 39, 39, 41, 41, 51, 51, 63, 66, - 69, 72, 75 + 0, 35, 35, 35, 37, 37, 37, 37, 37, 37, + 39, 39, 39, 39, 39, 39, 41, 41, 51, 51, + 63, 66, 69, 72, 75 }; #endif @@ -499,17 +499,17 @@ static const yytype_uint16 yytoknum[] = /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_uint8 yyr1[] = { - 0, 28, 30, 29, 31, 31, 31, 31, 32, 32, - 32, 32, 32, 32, 34, 33, 36, 35, 37, 38, - 39, 39, 40 + 0, 28, 30, 29, 31, 31, 31, 31, 31, 31, + 32, 32, 32, 32, 32, 32, 34, 33, 36, 35, + 37, 38, 39, 39, 40 }; /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ static const yytype_uint8 yyr2[] = { - 0, 2, 0, 2, 2, 2, 2, 0, 2, 2, - 2, 2, 2, 0, 0, 5, 0, 7, 4, 4, - 3, 4, 4 + 0, 2, 0, 2, 2, 1, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 0, 0, 5, 0, 7, + 4, 4, 3, 4, 4 }; /* YYDEFACT[STATE-NAME] -- Default reduction number in state STATE-NUM. @@ -517,37 +517,37 @@ static const yytype_uint8 yyr2[] = means the default is an error. */ static const yytype_uint8 yydefact[] = { - 2, 0, 0, 1, 0, 3, 14, 7, 0, 0, - 0, 15, 5, 4, 6, 0, 0, 0, 0, 16, - 19, 13, 0, 0, 17, 0, 0, 9, 8, 10, - 11, 12, 0, 0, 0, 0, 20, 0, 18, 21, - 22 + 2, 0, 0, 1, 0, 3, 16, 0, 0, 0, + 0, 0, 5, 0, 0, 0, 17, 6, 4, 7, + 9, 8, 0, 0, 18, 21, 15, 0, 0, 19, + 0, 0, 11, 10, 12, 13, 14, 0, 0, 0, + 0, 22, 0, 20, 23, 24 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int8 yydefgoto[] = { - -1, 1, 2, 8, 22, 5, 7, 13, 21, 29, - 14, 30, 31 + -1, 1, 2, 10, 27, 11, 7, 12, 26, 34, + 13, 35, 36 }; /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ -#define YYPACT_NINF -9 +#define YYPACT_NINF -10 static const yytype_int8 yypact[] = { - -9, 3, 1, -9, -2, -9, -9, -9, 4, 5, - -1, -9, -9, -9, -9, -8, 7, 9, 6, -9, - -9, -9, -3, 2, -9, 8, 10, -9, -9, -9, - -9, -9, 11, 12, -4, 13, -5, 14, -9, -9, - -9 + -10, 2, 3, -10, -5, -10, -10, 24, 15, 11, + 12, 24, -10, 24, 9, 23, -10, -10, -10, -10, + 24, 24, 28, 25, -10, -10, -10, 1, 13, -10, + 14, 16, -10, -10, -10, -10, -10, 29, 18, 17, + 20, 21, 26, -10, -10, -10 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int8 yypgoto[] = { - -9, -9, -9, -9, -9, -6, -9, 15, -9, -9, - -9, -9, -9 + -10, -10, -10, 19, -10, -2, -10, -7, -10, -10, + -9, -10, -10 }; /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If @@ -556,35 +556,37 @@ static const yytype_int8 yypgoto[] = #define YYTABLE_NINF -1 static const yytype_uint8 yytable[] = { - 4, 9, 12, 3, 4, 23, 24, 4, 9, 10, - 6, 16, 15, 11, 17, 19, 27, 18, 20, 39, - 25, 35, 26, 37, 32, 0, 0, 0, 0, 0, - 33, 0, 34, 0, 36, 38, 40, 28 + 5, 19, 3, 18, 4, 8, 4, 6, 17, 28, + 29, 19, 19, 18, 18, 4, 8, 9, 17, 17, + 33, 16, 14, 15, 30, 32, 31, 4, 8, 9, + 20, 22, 21, 23, 24, 37, 38, 25, 39, 40, + 41, 0, 43, 0, 42, 44, 0, 0, 45 }; #define yypact_value_is_default(yystate) \ - ((yystate) == (-9)) + ((yystate) == (-10)) #define yytable_value_is_error(yytable_value) \ YYID (0) static const yytype_int8 yycheck[] = { - 3, 4, 8, 0, 3, 8, 9, 3, 4, 5, - 12, 12, 7, 9, 22, 6, 22, 10, 12, 24, - 23, 10, 25, 27, 22, -1, -1, -1, -1, -1, - 22, -1, 22, -1, 22, 22, 22, 22 + 2, 10, 0, 10, 3, 4, 3, 12, 10, 8, + 9, 20, 21, 20, 21, 3, 4, 5, 20, 21, + 27, 9, 7, 12, 23, 27, 25, 3, 4, 5, + 11, 22, 13, 10, 6, 22, 22, 12, 22, 10, + 22, -1, 22, -1, 27, 24, -1, -1, 22 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing symbol of state STATE-NUM. */ static const yytype_uint8 yystos[] = { - 0, 29, 30, 0, 3, 33, 12, 34, 31, 4, - 5, 9, 33, 35, 38, 7, 12, 22, 10, 6, - 12, 36, 32, 8, 9, 23, 25, 33, 35, 37, - 39, 40, 22, 22, 22, 10, 22, 27, 22, 24, - 22 + 0, 29, 30, 0, 3, 33, 12, 34, 4, 5, + 31, 33, 35, 38, 7, 12, 9, 33, 35, 38, + 31, 31, 22, 10, 6, 12, 36, 32, 8, 9, + 23, 25, 33, 35, 37, 39, 40, 22, 22, 22, + 10, 22, 27, 22, 24, 22 }; #define yyerrok (yyerrstatus = 0) @@ -1428,7 +1430,7 @@ yyreduce: { postprocess_devtree(); } break; - case 14: + case 16: { (yyval.device) = new_chip(cur_parent, cur_bus, (yyvsp[(2) - (2)].string)); @@ -1436,7 +1438,7 @@ yyreduce: } break; - case 15: + case 17: { cur_parent = (yyvsp[(3) - (5)].device)->parent; @@ -1445,7 +1447,7 @@ yyreduce: } break; - case 16: + case 18: { (yyval.device) = new_device(cur_parent, cur_bus, (yyvsp[(2) - (4)].number), (yyvsp[(3) - (4)].string), (yyvsp[(4) - (4)].number)); @@ -1454,7 +1456,7 @@ yyreduce: } break; - case 17: + case 19: { cur_parent = (yyvsp[(5) - (7)].device)->parent; @@ -1464,27 +1466,27 @@ yyreduce: } break; - case 18: + case 20: { add_resource(cur_parent, (yyvsp[(1) - (4)].number), strtol((yyvsp[(2) - (4)].string), NULL, 0), strtol((yyvsp[(4) - (4)].string), NULL, 0)); } break; - case 19: + case 21: { add_register(cur_parent, (yyvsp[(2) - (4)].string), (yyvsp[(4) - (4)].string)); } break; - case 20: + case 22: { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[(2) - (3)].string), NULL, 16), strtol((yyvsp[(3) - (3)].string), NULL, 16), 0); } break; - case 21: + case 23: { add_pci_subsystem_ids(cur_parent, strtol((yyvsp[(2) - (4)].string), NULL, 16), strtol((yyvsp[(3) - (4)].string), NULL, 16), 1); } break; - case 22: + case 24: { add_ioapic_info(cur_parent, strtol((yyvsp[(2) - (4)].string), NULL, 16), (yyvsp[(3) - (4)].string), strtol((yyvsp[(4) - (4)].string), NULL, 16)); } break; diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 8ea702e..f298ce2 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -34,7 +34,7 @@ static struct device *cur_parent, *cur_bus; %% devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ; -chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ; +chipchildren: chipchildren device | device | chipchildren chip | chipchildren registers | registers chipchildren | chip chipchildren ; devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | /* empty */ ;

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Patch set updated for coreboot: 4066d94 ASUS F2A85-M: Provide HD Audio verb table for Realtek ALC887-VD
by Paul Menzel 05 May '13

05 May '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3170 -gerrit commit 4066d9465429b59da0cdeadbfbc32e2f1d138e2d Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Tue Apr 2 20:51:15 2013 +0200 ASUS F2A85-M: Provide HD Audio verb table for Realtek ALC887-VD Use the same HD Audio [1] verb table for the Realtek ALC887-VD audio chip as the one set up by the proprietary vendor BIOS. Linux’ ALSA exposes this pin configuration under the virtual filesystem sysfs. /sys/class/sound/hwC1D0/init_pin_configs The script `alsa-info.sh` [2][3] is able to decode the table. Only one channel audio playback (rear connectors) is tested [4], which worked already before. [1] http://en.wikipedia.org/wiki/Intel_High_Definition_Audio [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2013-March/060717.html [3] http://alsa-project.org/main/index.php/Help_To_Debug [4] http://review.coreboot.org/#/c/3170/2//COMMIT_MSG Change-Id: I17fa2d4ab1e1a6bfd84de94e9e4a91bd67b6a0c0 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/asus/f2a85-m/BiosCallOuts.c | 37 +++++++++++++++++-------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index 0a13208..02f7f24 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -63,29 +63,32 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr) } /** - * AMD Thatcher Platform ALC272 Verb Table + * ASUS F2A85-M board ALC887-VD Verb Table + * + * Copied from `/sys/class/sound/hwC1D0/init_pin_configs` when running + * the vendor BIOS. */ -static const CODEC_ENTRY Thatcher_Alc272_VerbTbl[] = { - {0x11, 0x411111F0}, - {0x12, 0x411111F0}, - {0x13, 0x411111F0}, - {0x14, 0x411111F0}, - {0x15, 0x411111F0}, - {0x16, 0x411111F0}, - {0x17, 0x411111F0}, - {0x18, 0x01a19840}, - {0x19, 0x411111F0}, - {0x1a, 0x01813030}, - {0x1b, 0x411111F0}, - {0x1d, 0x40130605}, - {0x1e, 0x01441120}, - {0x21, 0x01211010}, +const CODEC_ENTRY f2a85-m_alc887_VerbTbl[] = { + {0x11, 0x99430140}, + {0x12, 0x411111f0}, + {0x14, 0x01014010}, + {0x15, 0x01011012}, + {0x16, 0x01016011}, + {0x17, 0x01012014}, + {0x18, 0x01a19850}, + {0x19, 0x02a19c60}, + {0x1a, 0x0181305f}, + {0x1b, 0x02214c20}, + {0x1c, 0x411111f0}, + {0x1d, 0x4005e601}, + {0x1e, 0x01456130}, + {0x1f, 0x411111f0}, {0xff, 0xffffffff} }; static const CODEC_TBL_LIST CodecTableList[] = { - {0x10ec0272, (CODEC_ENTRY*)&Thatcher_Alc272_VerbTbl[0]}, + {0x10ec0887, (CODEC_ENTRY*)&f2a85-m_alc887_VerbTbl[0]}, {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} };

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Patch set updated for coreboot: 2f1d7cc AMD Fam15tn boards: BiosCallOuts.c: Remove board name from `CodecTableList`
by Paul Menzel 05 May '13

05 May '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3199 -gerrit commit 2f1d7cca7398584f0fb79b657fdbad1ab32ec572 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sat May 4 18:41:54 2013 +0200 AMD Fam15tn boards: BiosCallOuts.c: Remove board name from `CodecTableList` The board name in that variable name is not necessary, as it is not board dependent, that means using the file as a template for making a new coreboot port for another motherboard the variable does not need to be changed, and just increases the code differences between AMD Parmer, AMD Thather and ASUS F2A85-M. So use a generic name. The same was done for AMD Persimmon (and inherited by the LiPPERT FrontRunner/Toucan-AF) in the following commit. commit 5e70766f14253f53190ddd49a544460c6bc1e528 Author: Jens Rottmann <JRottmann(a)LiPPERTembedded.de> Date: Tue Feb 26 15:56:11 2013 +0100 AMD Fam14 boards: reduce unnecessary differences, 2nd attempt Reviewed-on: http://review.coreboot.org/2529 The board name is *not* removed from the `CODEC_ENTRY` variable name as the verb table not only depends on the codec but also on the board [1]. Having the board name in the variable name is a good indicator that the pin configuration needs to be adapted when taking this file as a template for a new port. If it was board independent, a default chip configuration could be used and shared between all boards, which is unfortunately not the case. [1] Unfortunately I was not able to find Jens’ comment in my mail archive and in the Gerrit Web interface. Not sure where it is, but I am sure he made that comment. Change-Id: I440a306cf4ff0a5b1b61d1983d70c66d129904d0 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/mainboard/amd/parmer/BiosCallOuts.c | 4 ++-- src/mainboard/amd/thatcher/BiosCallOuts.c | 4 ++-- src/mainboard/asus/f2a85-m/BiosCallOuts.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mainboard/amd/parmer/BiosCallOuts.c b/src/mainboard/amd/parmer/BiosCallOuts.c index 9592c9d..58bcd02 100644 --- a/src/mainboard/amd/parmer/BiosCallOuts.c +++ b/src/mainboard/amd/parmer/BiosCallOuts.c @@ -83,7 +83,7 @@ static const CODEC_ENTRY Parmer_Alc272_VerbTbl[] = { {0xff, 0xffffffff} }; -static const CODEC_TBL_LIST ParmerCodecTableList[] = +static const CODEC_TBL_LIST CodecTableList[] = { {0x10ec0272, (CODEC_ENTRY*)&Parmer_Alc272_VerbTbl[0]}, {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} @@ -287,7 +287,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); /* Azalia Controller OEM Codec Table Pointer */ - FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&ParmerCodecTableList[0]); + FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); /* Azalia Controller Front Panel OEM Table Pointer */ /* Fan Control */ diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c index 6979522..60a33ed 100644 --- a/src/mainboard/amd/thatcher/BiosCallOuts.c +++ b/src/mainboard/amd/thatcher/BiosCallOuts.c @@ -83,7 +83,7 @@ static const CODEC_ENTRY Thatcher_Alc272_VerbTbl[] = { {0xff, 0xffffffff} }; -static const CODEC_TBL_LIST ThatcherCodecTableList[] = +static const CODEC_TBL_LIST CodecTableList[] = { {0x10ec0272, (CODEC_ENTRY*)&Thatcher_Alc272_VerbTbl[0]}, {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} @@ -287,7 +287,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); /* Azalia Controller OEM Codec Table Pointer */ - FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&ThatcherCodecTableList[0]); + FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); /* Azalia Controller Front Panel OEM Table Pointer */ /* Fan Control */ diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index e913896..0a13208 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -83,7 +83,7 @@ static const CODEC_ENTRY Thatcher_Alc272_VerbTbl[] = { {0xff, 0xffffffff} }; -static const CODEC_TBL_LIST ThatcherCodecTableList[] = +static const CODEC_TBL_LIST CodecTableList[] = { {0x10ec0272, (CODEC_ENTRY*)&Thatcher_Alc272_VerbTbl[0]}, {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} @@ -110,7 +110,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); /* Azalia Controller OEM Codec Table Pointer */ - FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&ThatcherCodecTableList[0]); + FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); /* Azalia Controller Front Panel OEM Table Pointer */ FchParams_env->Imc.ImcEnable = FALSE; FchParams_env->Hwm.HwMonitorEnable = FALSE;

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coreboot-gerrit May 2013