Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3057
-gerrit
commit 1d7455b3f6de516f598c314eda7559126d5482f6
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Mon Apr 8 16:43:25 2013 -0700
ChromeEC: Drop unneeded Kconfig variable EC_GOOGLE_API_ROOT
This used to contain the path for the EC include files, but
those files are included in coreboot now.
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
BUG=none
TEST=emerge-link chromeos-coreboot-link still works
BRANCH=none
Change-Id: I4fce9831c5e21b0a69a6295dbda2580e1ca83369
Reviewed-on: https://gerrit.chromium.org/gerrit/47606
Reviewed-by: Randall Spangler <rspangler(a)chromium.org>
Commit-Queue: Stefan Reinauer <reinauer(a)google.com>
Tested-by: Stefan Reinauer <reinauer(a)google.com>
---
src/ec/google/chromeec/Kconfig | 7 -------
src/ec/google/chromeec/Makefile.inc | 2 --
2 files changed, 9 deletions(-)
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index b8d3444..af9dcbc 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -2,10 +2,3 @@ config EC_GOOGLE_CHROMEEC
bool
help
Google's Chrome EC
-
-config EC_GOOGLE_API_ROOT
- depends on EC_GOOGLE_CHROMEEC
- string "Path to the EC API include file"
- default "/usr/include"
- help
- Path to the ec API file (ec/ec_commands.h).
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index 93ad333..78f3fb5 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -1,5 +1,3 @@
ramstage-y += ec.c
smm-y += ec.c
romstage-y += ec.c
-
-CFLAGS += -I $(call strip_quotes,$(CONFIG_EC_GOOGLE_API_ROOT))
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3056
-gerrit
commit fdf3b9cd0dbc2caeac94bf68acb121629e061aed
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Mon Apr 8 16:48:10 2013 -0700
Rename mainboard vendor Google to GOOGLE
This is what was built into all our products, so make sure
that no utilities get confused by a difference in spelling.
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
BUG=none
TEST=emerge-link chromeos-coreboot-link produces a bootable image
BRANCH=none
Change-Id: Icef8a5a6f976f9f87cb7e065284541ecaa213c1b
Reviewed-on: https://gerrit.chromium.org/gerrit/47607
Reviewed-by: Ronald G. Minnich <rminnich(a)chromium.org>
Commit-Queue: Stefan Reinauer <reinauer(a)google.com>
Tested-by: Stefan Reinauer <reinauer(a)google.com>
---
src/mainboard/google/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/Kconfig b/src/mainboard/google/Kconfig
index e389b59..4061f17 100644
--- a/src/mainboard/google/Kconfig
+++ b/src/mainboard/google/Kconfig
@@ -47,6 +47,6 @@ source "src/mainboard/google/stout/Kconfig"
config MAINBOARD_VENDOR
string
- default "Google"
+ default "GOOGLE"
endif # VENDOR_GOOGLE
Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3053
-gerrit
commit bed6f0e3702ab4a5cc82353db2932c8474903e82
Author: Ronald G. Minnich <rminnich(a)gmail.com>
Date: Tue Apr 9 14:32:32 2013 -0700
GOOGLE/SNOW: clean up the device tree
This is a simpler device tree that is also more correct,
and has graphics settings as well.
Change-Id: I342d8be7dddb76e6992876c73f5c625c926977d3
Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com>
---
src/mainboard/google/snow/devicetree.cb | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb
index 4c88ea8..41ed45e 100644
--- a/src/mainboard/google/snow/devicetree.cb
+++ b/src/mainboard/google/snow/devicetree.cb
@@ -17,16 +17,17 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-# FIXME: this is just a stub for now
chip cpu/samsung/exynos5250
-
-device cpu_cluster 0 on
-end
-
-device domain 0 on
- chip drivers/generic/generic # I2C0 controller
- device i2c 6 on end # ?
- device i2c 9 on end # ?
- end
-end
+ device cpu_cluster 0 on end
+ register "xres" = "1366"
+ register "yres" = "768"
+ register "bpp" = "16"
+ # complex magic timing!
+ register "clkval_f" = "2"
+ register "upper_margin" = "14"
+ register "lower_margin" = "3"
+ register "vsync" = "5"
+ register "left_margin" = "80"
+ register "right_margin" = "48"
+ register "hsync" = "32"
end
the following patch was just integrated into master:
commit 086b369dfc6421c698cd5a386e75fde68cb838dc
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Apr 8 20:01:18 2013 -0700
armv7: replace read/write macros with inlines
This enables type checking for safety as to help prevent errors like
http://review.coreboot.org/#/c/3038/ . Now compilation fails if the
wrong type is passed into readb/readw/readl/writeb/writew/writel
or other macros in io.h.
This also deprecates readw/writew. The previous definition was 16-bits
which is incorrect since wordsize on ARMv7 is 32-bits and there was
only 1 instance of writew (#if 0'd anyway). Going forward we should
always use read{8,16,32} and write{8,16,32} where N specifies the
exact length rather than relying on ambiguous definition of wordsize.
Since many macros relied on __raw_*, which were basically the same
(minus data memory barrier instructions), this patch also gets rid
of __raw_*. There were parts of the code which ended up using these
macros consecutively, for example:
setbits_le32(®s->ch_cfg, SPI_CH_RST);
clrbits_le32(®s->ch_cfg, SPI_CH_RST);
In such cases the safe versions of readl() and writel() should be
used anyway.
Note: This also fixes two dubious casts as to avoid breaking
compilation.
Change-Id: I8850933f68ea3a9b615d00ebd422f7c242268f1c
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3045
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Build-Tested: build bot (Jenkins) at Tue Apr 9 22:37:51 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Wed Apr 10 00:04:57 2013, giving +2
See http://review.coreboot.org/3045 for details.
-gerrit
the following patch was just integrated into master:
commit b959fbb87adb274b442bc6ab812e5a2ce92ca220
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Fri Apr 5 16:11:12 2013 -0700
exynos5: Re-factor I2C code
This re-factors the Exynos5 I2C code to be simpler and use the
new API, and updates users accordingly.
- i2c_read() and i2c_write() functions updated to take bus number
as an argument.
- Get rid of the EEPROM_ADDR_OVERFLOW stuff in i2c_read() and
i2c_write(). If a chip needs special handling we should take care
of it elsewhere, not in every low-level i2c driver.
- All the confusing bus config functions eliminated. No more
i2c_set_early_config() or i2c_set_bus() or i2c_get_bus(). All this
is handled automatically when the caller does a transaction and
specifies the desired bus number.
- i2c_probe() eliminated. We're not a command-line utility.
- Let the compiler place static variables automatically. We don't need
any of this fancy manual data placement.
- Remove dead code while we're at it. This stuff was ported early on
and much of it was left commented out in case we needed it. Some
also includes nested macros which caused gcc to complain.
- Clean up #includes (no more common.h, woohoo!), replace debug() with
printk().
Change-Id: I8e1f974ea4c6c7db9f33b77bbc4fb16008ed0d2a
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3044
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Build-Tested: build bot (Jenkins) at Tue Apr 9 04:11:42 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Wed Apr 10 00:01:02 2013, giving +2
See http://review.coreboot.org/3044 for details.
-gerrit