the following patch was just integrated into master:
commit 5a15a4ea79c8e9cf4e87f2315ed28ea2311beeac
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Sun Dec 29 08:25:47 2013 +0200
AMD K8 (rev-F): Always have RAMINIT_SYSINFO
K8 Rev F raminit code cannot be built without RAMINIT_SYSINFO,
so have the option enabled together with K8_REV_F_SUPPORT.
Also move the option under AMD K8.
Change-Id: I91fa0b4ae7e3e54fbcb4a4f91eb043956cd0fb60
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
See http://review.coreboot.org/4582 for details.
-gerrit
the following patch was just integrated into master:
commit cac276cfb2d8ed7c2bbbf8444785d620e068769b
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Fri Dec 27 14:46:32 2013 +0200
AMD fam10: Drop RAMINIT_SYSINFO
AMD fam10 raminit cannot be built without RAMINIT_SYSINFO, this
is not a true option but copy-paste remainder from AMD K8.
Change-Id: Id8edc112f3bacebd1732304ac9ee6e77cc6263b7
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
See http://review.coreboot.org/4581 for details.
-gerrit
the following patch was just integrated into master:
commit 4ffebd9e9ec456b17f91c7940cadd6ef246b3294
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Fri Dec 27 14:46:13 2013 +0200
via/epia-m700: Drop RAMINIT_SYSINFO
Option is for AMD K8 only.
Change-Id: Ic55288b3cae2c9bf4f347037e7bf5d9bfcf16689
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
See http://review.coreboot.org/4580 for details.
-gerrit
Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4584
-gerrit
commit 6791d3d1228df60c9b1f7231842cebf9eff068df
Author: Patrick Georgi <patrick(a)georgi-clan.de>
Date: Sun Dec 29 18:45:23 2013 +0100
buildsystem: check for coreboot toolchain by default
Other toolchains just don't cut it.
Change-Id: I7a0bdf60d89b5166c9a22c9e9f3f326b28f777b8
Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de>
---
Makefile.inc | 12 ++++++++++++
src/Kconfig | 10 ++++++++++
2 files changed, 22 insertions(+)
diff --git a/Makefile.inc b/Makefile.inc
index 0fb86ce..273c542 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -24,6 +24,18 @@ export KERNELVERSION := $(shell if [ -d "$(top)/.git" -a -f "`which git`" ]; \
else echo 4.0$(KERNELREVISION); fi)
#######################################################################
+# Test for coreboot toolchain (except when explicitely not requested)
+ifneq ($(NOCOMPILE),1)
+# only run if we're doing a build (not for tests, kconfig, ...)
+ifneq ($(CONFIG_ANY_TOOLCHAIN),y)
+_toolchain=$(shell $(CC) -v 2>&1 |grep -q "gcc version .*coreboot toolchain" && echo coreboot)
+ifneq ($(_toolchain),coreboot)
+$(error Please use the coreboot toolchain (or prove that your toolchain works))
+endif
+endif
+endif
+
+#######################################################################
# Basic component discovery
MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))
export MAINBOARDDIR
diff --git a/src/Kconfig b/src/Kconfig
index 1c80b8c..943cdef 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -79,6 +79,16 @@ config COMPILER_LLVM_CLANG
endchoice
+config ANY_TOOLCHAIN
+ bool "Allow building with any toolchain"
+ default n
+ depends on COMPILER_GCC
+ help
+ Many toolchains break when building coreboot since it uses quite
+ unusual linker features. Unless developers explicitely request it,
+ we'll have to assume that they use their distro compiler by mistake.
+ Make sure that using patched compilers is a conscious decision.
+
config SCANBUILD_ENABLE
bool "Build with scan-build for static code analysis"
default n
Dave Frodin (dave.frodin(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4573
-gerrit
commit 0b5fd8c88e71f2e1ac37a163686446f225cc7306
Author: Dave Frodin <dave.frodin(a)se-eng.com>
Date: Thu Dec 26 08:17:16 2013 -0700
superio: Uncomment the w83627uhg UART clock source initialization
The asrock/imb-a180 mainboard is evidently the first mainboard to
use this superio. The imb-a180 actually uses a Nuvoton NCT6627UD
which is the same as the w83627uhg. The default h/w clock setting
is 0. When I added the SIO in the mainboard Kconfig and the SIO
code got built, the builder complained that the set_uart_clock_source() wasn't being used. So I uncommented the calls to that function.
Change-Id: Iedba035237c5c0fa230b02ff4799bb8c1b7bbd4a
Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com>
---
src/superio/winbond/w83627uhg/superio.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c
index 3f1ca38..9de7ac0 100644
--- a/src/superio/winbond/w83627uhg/superio.c
+++ b/src/superio/winbond/w83627uhg/superio.c
@@ -68,22 +68,22 @@ static void w83627uhg_init(device_t dev)
switch(dev->path.pnp.device) {
case W83627UHG_SP1:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_SP2:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_SP3:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_SP4:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_SP5:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_SP6:
- /* set_uart_clock_source(dev, 0); */
+ set_uart_clock_source(dev, 0);
break;
case W83627UHG_KBC:
pc_keyboard_init(&conf->keyboard);
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4583
-gerrit
commit b94c5d0cba4eada51b4296546df423fcb43e0af3
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Sun Dec 29 12:07:54 2013 +0200
AMD (K8/fam10): Rewrite CAR migration in post_cache_as_ram
Old routine copied all of CAR region as-is right below CONFIG_RAMTOP.
Most of this region was reserved to interleave AP CPU address spaces
and unused on BSP CPU. The only part of CAR region requiring a copy
in RAM is the sysinfo structure.
Improved routine changes this as follows:
A region of size 'backup_size' below CONFIG_RAMTOP is cleared. In
case of S3 resume, OS context from this region is first copied to
high memory (CBMEM_ID_RESUME).
At stack switch, CAR stack is discarded. Top of the stack for BSP
is located at 'CONFIG_RAMTOP - car_size' for the remaining part
of the romstage. This region is part of 'backup_size' and was zeroed
before the switch took place.
Before CAR is torn down the region of CAR_GLOBALS (and CAR_CBMEM),
including the relevant sysinfo data for AP nodes memory training,
is copied at 'CONFIG_RAMTOP - car_size'.
Change-Id: Ie45b576aec6a2e006bfcb26b52fdb77c24f72e3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/cpu/amd/car/cache_as_ram.inc | 5 +-
src/cpu/amd/car/post_cache_as_ram.c | 171 ++++++++++++++++++++----------------
2 files changed, 97 insertions(+), 79 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 8f0abce..6d704c5 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -424,10 +424,9 @@ CAR_FAM10_ap_out:
cache_as_ram_switch_stack:
/* Return address. */
popl %eax
- /* Resume memory. */
+ /* New stack. */
popl %eax
- subl $(( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )), %esp
- pushl %eax
+ movl %eax, %esp
call cache_as_ram_new_stack
all_mtrr_msrs:
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 81175da..24acee7 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -8,10 +8,9 @@
#include "cbmem.h"
#include "cpu/amd/car/disable_cache_as_ram.c"
-static inline void print_debug_pcar(const char *strval, uint32_t val)
-{
- printk(BIOS_DEBUG, "%s%08x\n", strval, val);
-}
+#if CONFIG_RAMTOP <= 0x100000
+ #error "You need to set CONFIG_RAMTOP greater than 1M"
+#endif
/* from linux kernel 2.6.32 asm/string_32.h */
@@ -29,37 +28,80 @@ static void inline __attribute__((always_inline)) memcopy(void *dest, const voi
: "memory", "cc");
}
-#if CONFIG_HAVE_ACPI_RESUME
+#define PRINTK_IN_CAR 1
+#define ACTUAL_CAR_SIZE 1
-static inline void *backup_resume(void) {
- void *resume_backup_memory;
- int suspend = acpi_is_wakeup_early();
+#if PRINTK_IN_CAR
+#define print_car_debug(x) print_debug(x)
+#else
+#define print_car_debug(x)
+#endif
+
+extern char _car_data_start[];
+extern char _car_data_end[];
- if (!suspend)
- return NULL;
+#if ACTUAL_CAR_SIZE
+static size_t car_data_size(void)
+{
+ size_t car_size = &_car_data_end[0] - &_car_data_start[0];
+ return ALIGN(64, car_size);
+}
- if (!cbmem_reinit())
- return NULL;
+static size_t backup_size(void)
+{
+ size_t car_size = &_car_data_end[0] - &_car_data_start[0];
+ return ALIGN(1024, car_size + 1024);
+}
+#else
+#define car_data_size() 0x1000
+#define backup_size() 0x2000
+#endif
- resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+static void memcpy_(void *d, const void *s, size_t len)
+{
+#if PRINTK_IN_CAR
+ printk(BIOS_SPEW, " Copy [%08x-%08x] to [%08x - %08x] ... ",
+ (u32) s, (u32) (s + len - 1), (u32) d, (u32) (d + len - 1));
+#endif
+ memcpy(d, s, len);
+}
- /* copy 1MB - 64K to high tables ram_base to prevent memory corruption
- * through stage 2. We could keep stuff like stack and heap in high tables
- * memory completely, but that's a wonderful clean up task for another
- * day.
- */
+static void memset_(void *d, int val, size_t len)
+{
+#if PRINTK_IN_CAR
+ printk(BIOS_SPEW, " Fill [%08x-%08x] ... ", (u32) d, (u32) (d + len - 1));
+#endif
+ memset(d, val, len);
+}
+static void prepare_romstage_ramstack(void *resume_backup_memory)
+{
+ size_t backup_top = backup_size();
+ print_car_debug("Prepare CAR migration and stack regions...");
+#if CONFIG_HAVE_ACPI_RESUME
if (resume_backup_memory) {
- print_debug_pcar("Will copy coreboot region to: ", (uint32_t) resume_backup_memory);
- /* copy only backup only memory used for CAR */
- memcopy(resume_backup_memory+HIGH_MEMORY_SAVE-CONFIG_DCACHE_RAM_SIZE,
- (void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE),
- CONFIG_DCACHE_RAM_SIZE); //inline
+ memcpy_(resume_backup_memory + HIGH_MEMORY_SAVE - backup_top,
+ (void *)(CONFIG_RAMTOP - backup_top), backup_top);
}
-
- return resume_backup_memory;
+#endif
+ memset_((void *)(CONFIG_RAMTOP - backup_top), 0, backup_top);
+ print_car_debug("Done\n");
}
+
+static void prepare_ramstage_region(void *resume_backup_memory)
+{
+ size_t backup_top = backup_size();
+ print_car_debug("Prepare ramstage memory region... ");
+#if CONFIG_HAVE_ACPI_RESUME
+ if (resume_backup_memory) {
+ memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE, HIGH_MEMORY_SAVE - backup_top);
+ memset_((void*) CONFIG_RAMBASE, 0, HIGH_MEMORY_SAVE - backup_top);
+ }
#endif
+ if (!resume_backup_memory)
+ memset_((void*)0, 0, CONFIG_RAMTOP - backup_top);
+ print_car_debug("Done\n");
+}
/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */
@@ -75,56 +117,46 @@ static void vErrata343(void)
#endif
}
-void cache_as_ram_switch_stack(void *resume_backup_memory);
+void cache_as_ram_switch_stack(void * new_stack);
+void cache_as_ram_new_stack (void);
void post_cache_as_ram(void)
{
void *resume_backup_memory = NULL;
-#if 1
- {
- /* Check value of esp to verify if we have enough room for stack in Cache as RAM */
- unsigned v_esp;
- __asm__ volatile (
- "movl %%esp, %0\n\t"
- : "=a" (v_esp)
- );
- print_debug_pcar("v_esp=", v_esp);
- }
-#endif
-
- /* copy data from cache as ram to
- ram need to set CONFIG_RAMTOP to 2M and use var mtrr instead.
- */
-#if CONFIG_RAMTOP <= 0x100000
- #error "You need to set CONFIG_RAMTOP greater than 1M"
-#endif
#if CONFIG_HAVE_ACPI_RESUME
- resume_backup_memory = backup_resume();
+ if (acpi_is_wakeup_early()) {
+ cbmem_reinit();
+ resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+ }
#endif
-
- print_debug("Copying data from cache to RAM -- switching to use RAM as stack... ");
+ prepare_romstage_ramstack(resume_backup_memory);
/* from here don't store more data in CAR */
vErrata343();
- memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
- cache_as_ram_switch_stack(resume_backup_memory);
-}
+ size_t car_size = car_data_size();
+ void *migrated_car = (void *)(CONFIG_RAMTOP - car_size);
-void
-cache_as_ram_new_stack (void *resume_backup_memory);
+ print_car_debug("Copying data from cache to RAM... ");
+ memcpy_(migrated_car, &_car_data_start[0], car_size);
+ print_car_debug("Done\n");
-void
-cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
-{
- /* We can put data to stack again */
+ /* New stack grows right below migrated_car. */
+ print_car_debug("Switching to use RAM as stack... ");
+ cache_as_ram_switch_stack(migrated_car);
- /* only global variable sysinfo in cache need to be offset */
- print_debug("Done\n");
+ /* We do not come back. */
+}
- print_debug("Disabling cache as ram now \n");
+void cache_as_ram_new_stack (void)
+{
+ void *resume_backup_memory = NULL;
+#if PRINTK_IN_CAR
+ printk(BIOS_DEBUG, "Top about %08x ... Done\n", (u32) &resume_backup_memory);
+#endif
+ print_car_debug("Disabling cache as ram now\n");
disable_cache_as_ram_bsp();
disable_cache();
@@ -132,24 +164,11 @@ cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
enable_cache();
#if CONFIG_HAVE_ACPI_RESUME
- /* now copy the rest of the area, using the WB method because we already
- run normal RAM */
- if (resume_backup_memory) {
- memcopy(resume_backup_memory,
- (void *)(CONFIG_RAMBASE),
- (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
+ if (acpi_is_wakeup_early()) {
+ resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
}
#endif
-
- print_debug("Clearing initial memory region: ");
-
-#if CONFIG_HAVE_ACPI_RESUME
- /* clear only coreboot used region of memory. Note: this may break ECC enabled boards */
- memset((void*) CONFIG_RAMBASE, 0, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
-#else
- memset((void*)0, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE));
-#endif
- print_debug("Done\n");
+ prepare_ramstage_region(resume_backup_memory);
set_sysinfo_in_ram(1); // So other core0 could start to train mem
@@ -157,5 +176,5 @@ cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
copy_and_run();
/* We will not return */
- print_debug("should not be here -\n");
+ print_car_debug("should not be here -\n");
}
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4583
-gerrit
commit 673c1050457c42d8162a0d47434a7ed86cf56d2a
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Sun Dec 29 12:07:54 2013 +0200
AMD (K8/fam10): Rewrite CAR migration in post_cache_as_ram
Old routine copied all of CAR region as-is right below CONFIG_RAMTOP.
Most of this region was reserved to interleave AP CPU address spaces
and unused on BSP CPU. The only part of CAR region requiring a copy
in RAM is the sysinfo structure.
Improved routine changes this as follows:
A region of size 'backup_size' below CONFIG_RAMTOP is cleared. In
case of S3 resume, OS context from this region is first copied to
high memory (CBMEM_ID_RESUME).
At stack switch, CAR stack is discarded. Top of the stack for BSP
is located at 'CONFIG_RAMTOP - car_size' for the remaining part
of the romstage. This region is part of 'backup_size' and was zeroed
before the switch took place.
Before CAR is torn down the region of CAR_GLOBALS (and CAR_CBMEM),
including the relevant sysinfo data for AP nodes memory training,
is copied at 'CONFIG_RAMTOP - car_size'.
Change-Id: Ie45b576aec6a2e006bfcb26b52fdb77c24f72e3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/cpu/amd/car/cache_as_ram.inc | 5 +-
src/cpu/amd/car/post_cache_as_ram.c | 170 ++++++++++++++++++++----------------
2 files changed, 96 insertions(+), 79 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 8f0abce..6d704c5 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -424,10 +424,9 @@ CAR_FAM10_ap_out:
cache_as_ram_switch_stack:
/* Return address. */
popl %eax
- /* Resume memory. */
+ /* New stack. */
popl %eax
- subl $(( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )), %esp
- pushl %eax
+ movl %eax, %esp
call cache_as_ram_new_stack
all_mtrr_msrs:
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 81175da..08505ad 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -8,10 +8,9 @@
#include "cbmem.h"
#include "cpu/amd/car/disable_cache_as_ram.c"
-static inline void print_debug_pcar(const char *strval, uint32_t val)
-{
- printk(BIOS_DEBUG, "%s%08x\n", strval, val);
-}
+#if CONFIG_RAMTOP <= 0x100000
+ #error "You need to set CONFIG_RAMTOP greater than 1M"
+#endif
/* from linux kernel 2.6.32 asm/string_32.h */
@@ -29,37 +28,80 @@ static void inline __attribute__((always_inline)) memcopy(void *dest, const voi
: "memory", "cc");
}
-#if CONFIG_HAVE_ACPI_RESUME
+#define PRINTK_IN_CAR 1
+#define ACTUAL_CAR_SIZE 1
-static inline void *backup_resume(void) {
- void *resume_backup_memory;
- int suspend = acpi_is_wakeup_early();
+#if PRINTK_IN_CAR
+#define print_car_debug(x) print_debug(x)
+#else
+#define print_car_debug(x)
+#endif
+
+extern char _car_data_start[];
+extern char _car_data_end[];
- if (!suspend)
- return NULL;
+#if ACTUAL_CAR_SIZE
+static size_t car_data_size(void)
+{
+ size_t car_size = &_car_data_end[0] - &_car_data_start[0];
+ return ALIGN(64, car_size);
+}
- if (!cbmem_reinit())
- return NULL;
+static size_t backup_size(void)
+{
+ size_t car_size = &_car_data_end[0] - &_car_data_start[0];
+ return ALIGN(1024, car_size + 1024);
+}
+#else
+#define car_data_size() 0x1000
+#define backup_size() 0x2000
+#endif
- resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+static void memcpy_(void *d, const void *s, size_t len)
+{
+#if PRINTK_IN_CAR
+ printk(BIOS_SPEW, " Copy [%08x-%08x] to [%08x - %08x] ... ",
+ (u32) s, (u32) (s + len), (u32) d, (u32) (d + len));
+#endif
+ memcpy(d, s, len);
+}
- /* copy 1MB - 64K to high tables ram_base to prevent memory corruption
- * through stage 2. We could keep stuff like stack and heap in high tables
- * memory completely, but that's a wonderful clean up task for another
- * day.
- */
+static void memset_(void *d, int val, size_t len)
+{
+#if PRINTK_IN_CAR
+ printk(BIOS_SPEW, " Fill [%08x-%08x] ... ", (u32) d, (u32) (d + len));
+#endif
+ memset(d, val, len);
+}
+static void prepare_romstage_ramstack(void *resume_backup_memory)
+{
+ size_t backup_top = backup_size();
+ print_car_debug("Prepare CAR migration and stack regions...");
+#if CONFIG_HAVE_ACPI_RESUME
if (resume_backup_memory) {
- print_debug_pcar("Will copy coreboot region to: ", (uint32_t) resume_backup_memory);
- /* copy only backup only memory used for CAR */
- memcopy(resume_backup_memory+HIGH_MEMORY_SAVE-CONFIG_DCACHE_RAM_SIZE,
- (void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE),
- CONFIG_DCACHE_RAM_SIZE); //inline
+ memcpy_(resume_backup_memory + HIGH_MEMORY_SAVE - backup_top,
+ (void *)(CONFIG_RAMTOP - backup_top), backup_top);
}
-
- return resume_backup_memory;
+#endif
+ memset_((void *)(CONFIG_RAMTOP - backup_top), 0, backup_top);
+ print_car_debug("Done\n");
}
+
+static void prepare_ramstage_region(void *resume_backup_memory)
+{
+ size_t backup_top = backup_size();
+ print_car_debug("Prepare ramstage memory region... ");
+#if CONFIG_HAVE_ACPI_RESUME
+ if (resume_backup_memory) {
+ memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE, HIGH_MEMORY_SAVE - backup_top);
+ memset_((void*) CONFIG_RAMBASE, 0, HIGH_MEMORY_SAVE - backup_top);
+ }
#endif
+ if (!resume_backup_memory)
+ memset_((void*)0, 0, CONFIG_RAMTOP - backup_top);
+ print_car_debug("Done\n");
+}
/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */
@@ -75,56 +117,45 @@ static void vErrata343(void)
#endif
}
-void cache_as_ram_switch_stack(void *resume_backup_memory);
+void cache_as_ram_switch_stack(void * new_stack);
+void cache_as_ram_new_stack (void);
void post_cache_as_ram(void)
{
void *resume_backup_memory = NULL;
-#if 1
- {
- /* Check value of esp to verify if we have enough room for stack in Cache as RAM */
- unsigned v_esp;
- __asm__ volatile (
- "movl %%esp, %0\n\t"
- : "=a" (v_esp)
- );
- print_debug_pcar("v_esp=", v_esp);
- }
-#endif
-
- /* copy data from cache as ram to
- ram need to set CONFIG_RAMTOP to 2M and use var mtrr instead.
- */
-#if CONFIG_RAMTOP <= 0x100000
- #error "You need to set CONFIG_RAMTOP greater than 1M"
-#endif
#if CONFIG_HAVE_ACPI_RESUME
- resume_backup_memory = backup_resume();
+ if (acpi_is_wakeup_early()) {
+ cbmem_reinit();
+ resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
+ }
#endif
-
- print_debug("Copying data from cache to RAM -- switching to use RAM as stack... ");
+ prepare_romstage_ramstack(resume_backup_memory);
/* from here don't store more data in CAR */
vErrata343();
- memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
- cache_as_ram_switch_stack(resume_backup_memory);
-}
+ size_t car_size = car_data_size();
+ void *migrated_car = (void *)(CONFIG_RAMTOP - car_size);
-void
-cache_as_ram_new_stack (void *resume_backup_memory);
+ print_car_debug("Copying data from cache to RAM... ");
+ memcpy_(migrated_car, &_car_data_start[0], car_size);
+ print_car_debug("Done\n");
-void
-cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
-{
- /* We can put data to stack again */
+ /* New stack grows right below migrated_car. */
+ print_car_debug("Switching to use RAM as stack... ");
+ cache_as_ram_switch_stack(migrated_car);
+
+ /* We do not come back. */
+}
- /* only global variable sysinfo in cache need to be offset */
- print_debug("Done\n");
+void cache_as_ram_new_stack (void)
+{
+ void *resume_backup_memory = NULL;
- print_debug("Disabling cache as ram now \n");
+ print_car_debug("Done\n");
+ print_car_debug("Disabling cache as ram now\n");
disable_cache_as_ram_bsp();
disable_cache();
@@ -132,24 +163,11 @@ cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
enable_cache();
#if CONFIG_HAVE_ACPI_RESUME
- /* now copy the rest of the area, using the WB method because we already
- run normal RAM */
- if (resume_backup_memory) {
- memcopy(resume_backup_memory,
- (void *)(CONFIG_RAMBASE),
- (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
+ if (acpi_is_wakeup_early()) {
+ resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
}
#endif
-
- print_debug("Clearing initial memory region: ");
-
-#if CONFIG_HAVE_ACPI_RESUME
- /* clear only coreboot used region of memory. Note: this may break ECC enabled boards */
- memset((void*) CONFIG_RAMBASE, 0, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
-#else
- memset((void*)0, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE));
-#endif
- print_debug("Done\n");
+ prepare_ramstage_region(resume_backup_memory);
set_sysinfo_in_ram(1); // So other core0 could start to train mem
@@ -157,5 +175,5 @@ cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
copy_and_run();
/* We will not return */
- print_debug("should not be here -\n");
+ print_car_debug("should not be here -\n");
}