[XS] Change in coreboot[main]: sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping

[Keith Hui (Code Review)]

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85922?usp=email )

Change subject: sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping
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sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping

As xHCI ports 1-4 and OC pins 0-3 are all shared with EHCI,
xhci_overcurrent_mapping should never deviate from the USB 2 (EHCI)
overcurrent mapping specified in the USB port config in the devicetree.

Get the mapping from EHCI and free mainboards from specifying
it separately.

A Ghidra inspection of MRC binary indicates it is doing the same.

After this patch xhci_overcurrent_mapping becomes redundant and
will be removed in a follow-up.

Change-Id: Iab30a07c8df223e4053c5f28df5e5ed926f278f7
Signed-off-by: Keith Hui 
---
M src/southbridge/intel/bd82x6x/usb_xhci.c
1 file changed, 3 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/85922/1

diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index f71a505..358d107 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -7,6 +7,7 @@
 #include "pch.h"
 #include <device/pci_ehci.h>
 #include <device/pci_ops.h>
+#include <southbridge/intel/common/rcba.h>
 #include "chip.h"

static void usb_xhci_init(struct device *dev)
@@ -16,8 +17,8 @@

printk(BIOS_DEBUG, "XHCI: Setting up controller.. ");

-	if (config->xhci_overcurrent_mapping)
-		pci_write_config32(dev, XOCM, config->xhci_overcurrent_mapping);
+	reg32 = RCBA32(USBOCM1) & 0x0f0f0f0f;
+	pci_write_config32(dev, XOCM, reg32);

/* lock overcurrent map */
    pci_or_config32(dev, 0x44, 1);