[M] Change in coreboot[main]: soc/amd/glinda/chipset.cb: Update for glinda - coreboot-gerrit

29 Jan 2025


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Patrick Rudolph has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84376?usp=email )
Change subject: soc/amd/glinda/chipset.cb: Update for glinda
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Patch Set 6:
(1 comment)
File src/soc/amd/glinda/chipset.cb:
https://review.coreboot.org/c/coreboot/+/84376/comment/cc901d8d_736d9fc0?usp... :
PS6, Line 47: gpp_bridge_b
Breaks ACPI PM timer since the PPB is no longer properly configured.
Either the device needs to be hidden by ramstage code or be always on.
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