HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33732
Change subject: src/{northbridge,soc}: Remove not used #include <elog.h> ......................................................................
src/{northbridge,soc}: Remove not used #include <elog.h>
Change-Id: I01e1e356936b85b186d9bd5f1c1e5e3a1157a30b Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/haswell/early_init.c M src/soc/intel/denverton_ns/smihandler.c M src/soc/intel/fsp_broadwell_de/smihandler.c M src/soc/intel/skylake/romstage/romstage.c 4 files changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/33732/1
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c index 6fef0da..606c9c7 100644 --- a/src/northbridge/intel/haswell/early_init.c +++ b/src/northbridge/intel/haswell/early_init.c @@ -20,7 +20,7 @@ #include <device/mmio.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <elog.h> + #include "haswell.h"
static bool peg_hidden[3]; diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c index 4d748b2..6fb4cf6 100644 --- a/src/soc/intel/denverton_ns/smihandler.c +++ b/src/soc/intel/denverton_ns/smihandler.c @@ -24,7 +24,6 @@ #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <device/pci_def.h> -#include <elog.h> #include <intelblocks/fast_spi.h> #include <spi-generic.h> #include <soc/iomap.h> diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c index 854bd76..bb1bbf8 100644 --- a/src/soc/intel/fsp_broadwell_de/smihandler.c +++ b/src/soc/intel/fsp_broadwell_de/smihandler.c @@ -21,7 +21,6 @@ #include <device/pci_def.h> #include <cpu/x86/smm.h> #include <spi-generic.h> -#include <elog.h> #include <soc/lpc.h> #include <soc/iomap.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 29c4774..e0467bb 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -21,7 +21,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> -#include <elog.h> #include <intelblocks/fast_spi.h> #include <intelblocks/pmclib.h> #include <soc/pci_devs.h>
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33732 )
Change subject: src/{northbridge,soc}: Remove not used #include <elog.h> ......................................................................
Patch Set 2: Code-Review+1
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33732 )
Change subject: src/{northbridge,soc}: Remove not used #include <elog.h> ......................................................................
Patch Set 2: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33732 )
Change subject: src/{northbridge,soc}: Remove not used #include <elog.h> ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/33732 )
Change subject: src/{northbridge,soc}: Remove not used #include <elog.h> ......................................................................
src/{northbridge,soc}: Remove not used #include <elog.h>
Change-Id: I01e1e356936b85b186d9bd5f1c1e5e3a1157a30b Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/33732 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: David Guckian Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/haswell/early_init.c M src/soc/intel/denverton_ns/smihandler.c M src/soc/intel/fsp_broadwell_de/smihandler.c M src/soc/intel/skylake/romstage/romstage.c 4 files changed, 1 insertion(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved David Guckian: Looks good to me, but someone else must approve
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c index 6fef0da..606c9c7 100644 --- a/src/northbridge/intel/haswell/early_init.c +++ b/src/northbridge/intel/haswell/early_init.c @@ -20,7 +20,7 @@ #include <device/mmio.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <elog.h> + #include "haswell.h"
static bool peg_hidden[3]; diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c index cba659a..c292e4d 100644 --- a/src/soc/intel/denverton_ns/smihandler.c +++ b/src/soc/intel/denverton_ns/smihandler.c @@ -25,7 +25,6 @@ #include <cpu/x86/smm.h> #include <cpu/intel/em64t100_save_state.h> #include <device/pci_def.h> -#include <elog.h> #include <intelblocks/fast_spi.h> #include <spi-generic.h> #include <soc/iomap.h> diff --git a/src/soc/intel/fsp_broadwell_de/smihandler.c b/src/soc/intel/fsp_broadwell_de/smihandler.c index 854bd76..bb1bbf8 100644 --- a/src/soc/intel/fsp_broadwell_de/smihandler.c +++ b/src/soc/intel/fsp_broadwell_de/smihandler.c @@ -21,7 +21,6 @@ #include <device/pci_def.h> #include <cpu/x86/smm.h> #include <spi-generic.h> -#include <elog.h> #include <soc/lpc.h> #include <soc/iomap.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 2d0de2f..a8bbfb6 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -21,7 +21,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> -#include <elog.h> #include <intelblocks/fast_spi.h> #include <intelblocks/pmclib.h> #include <soc/pci_devs.h>
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Angel Pons (Code Review) -
David Guckian (Code Review)
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HAOUAS Elyes (Code Review)
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Patrick Georgi (Code Review)
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Paul Menzel (Code Review)