Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
docs/librem_mini: update CPU, known issues section
Both 8565U and 8665U CPUs are used in the Librem Mini.
SATA issue updated based on addition of HSIO PHY tuning params and resulting changes.
Change-Id: I33a093ccfea077402e1b3651f9ca5d6d8a2818f8 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M Documentation/mainboard/purism/librem_mini.md 1 file changed, 6 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/46983/1
diff --git a/Documentation/mainboard/purism/librem_mini.md b/Documentation/mainboard/purism/librem_mini.md index be9a3e5..192805f 100644 --- a/Documentation/mainboard/purism/librem_mini.md +++ b/Documentation/mainboard/purism/librem_mini.md @@ -4,7 +4,7 @@
```eval_rst +------------------+--------------------------------------------------+ -| CPU | Intel Core i7-8565U | +| CPU | Intel Core i7-8565U/8665U | +------------------+--------------------------------------------------+ | PCH | Whiskey Lake / Cannon Point LP | +------------------+--------------------------------------------------+ @@ -91,10 +91,11 @@ ## Known issues
* SeaBIOS can be finicky with detecting USB devices - * Booting can sometimes hang when a bootsplash image is used with SeaBIOS - and VGA option ROM display init, related to display mode changing - * Issues with some SATA devices have been mitigated by limiting the SATA speed to 3Gbps - until the correct HSIO PHY settings can be determined. + * Mode switching with VGA option ROM display init can be slow and sometimes hang + * Some SATA devices on the 2.5" interface can have issues operating at 6Gbps, + despite the HSIO PHY settings being set optimally. These devices may show + errors in dmesg and drop down to 3Gbps, but should not fail to boot. + The same issue is present on the AMI vendor firmware.
## Working
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... File Documentation/mainboard/purism/librem_mini.md:
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 94: hang hangs
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 96: HSIO PHY settings being set optimally well, that is an assumption but we don't know
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 97: , no comma
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 1: Code-Review+1
(3 comments)
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... File Documentation/mainboard/purism/librem_mini.md:
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 96: HSIO PHY settings being set optimally
well, that is an assumption but we don't know
"despite having tried many different settings for HSIO PHYs" ?
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 97: ,
no comma
I'd keep the comma, since there's a contrast (but)
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 102: DislpayPort typo
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... File Documentation/mainboard/purism/librem_mini.md:
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 97: 3Gbps nit: 3 Gbps
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46983
to look at the new patch set (#2).
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
docs/librem_mini: update CPU, known issues section
Both 8565U and 8665U CPUs are used in the Librem Mini.
SATA issue updated based on addition of HSIO PHY tuning params and resulting changes.
Change-Id: I33a093ccfea077402e1b3651f9ca5d6d8a2818f8 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M Documentation/mainboard/purism/librem_mini.md 1 file changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/46983/2
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 2:
(5 comments)
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... File Documentation/mainboard/purism/librem_mini.md:
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 94: hang
hangs
Done
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 96: HSIO PHY settings being set optimally
"despite having tried many different settings for HSIO PHYs" ?
Done
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 97: ,
I'd keep the comma, since there's a contrast (but)
Done
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 97: 3Gbps
nit: 3 Gbps
done
https://review.coreboot.org/c/coreboot/+/46983/1/Documentation/mainboard/pur... PS1, Line 102: DislpayPort
typo
fixed
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 2: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
Patch Set 2: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46983 )
Change subject: docs/librem_mini: update CPU, known issues section ......................................................................
docs/librem_mini: update CPU, known issues section
Both 8565U and 8665U CPUs are used in the Librem Mini.
SATA issue updated based on addition of HSIO PHY tuning params and resulting changes.
Change-Id: I33a093ccfea077402e1b3651f9ca5d6d8a2818f8 Signed-off-by: Matt DeVillier matt.devillier@puri.sm Reviewed-on: https://review.coreboot.org/c/coreboot/+/46983 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M Documentation/mainboard/purism/librem_mini.md 1 file changed, 7 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/Documentation/mainboard/purism/librem_mini.md b/Documentation/mainboard/purism/librem_mini.md index be9a3e5..e098a24 100644 --- a/Documentation/mainboard/purism/librem_mini.md +++ b/Documentation/mainboard/purism/librem_mini.md @@ -4,7 +4,7 @@
```eval_rst +------------------+--------------------------------------------------+ -| CPU | Intel Core i7-8565U | +| CPU | Intel Core i7-8565U/8665U | +------------------+--------------------------------------------------+ | PCH | Whiskey Lake / Cannon Point LP | +------------------+--------------------------------------------------+ @@ -91,14 +91,15 @@ ## Known issues
* SeaBIOS can be finicky with detecting USB devices - * Booting can sometimes hang when a bootsplash image is used with SeaBIOS - and VGA option ROM display init, related to display mode changing - * Issues with some SATA devices have been mitigated by limiting the SATA speed to 3Gbps - until the correct HSIO PHY settings can be determined. + * Mode switching with VGA option ROM display init can be slow and sometimes hangs + * Some SATA devices on the 2.5" interface can have issues operating at 6 Gbps, + despite the HSIO PHY settings being set optimally via experimentation. These devices + may show errors in dmesg and drop down to 3 Gbps, but should not fail to boot. + The same issue is present on the AMI vendor firmware.
## Working
- * External displays via HDMI/DislpayPort with VGA option ROM or FSP/GOP init + * External displays via HDMI/DisplayPort with VGA option ROM or FSP/GOP init (no libgfxinit support yet) * SeaBIOS (1.13.x), Tianocore (CorebootPayloadpkg), Heads (Purism downstream) payloads * Ethernet, m.2 2230 Wi-Fi
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Michael Niewöhner (Code Review)